tilew = 8;
xalign = surf_man->hw_info.group_bytes / (tilew * surf->bpe * surf->nsamples);
if (surf->flags & RADEON_SURF_SBUFFER) {
- surf->stencil_offset = 0;
- surf->stencil_tile_split = 0;
xalign = surf_man->hw_info.group_bytes / (tilew * surf->nsamples);
}
xalign = MAX2(tilew, xalign);
unsigned slice_pt;
unsigned i;
- surf->stencil_offset = 0;
/* compute tile values */
tilew = 8;
tileh = 8;
return r;
}
+ surf->stencil_offset = 0;
+ surf->stencil_tile_split = 0;
+
/* check tiling mode */
switch (mode) {
case RADEON_SURF_MODE_LINEAR: