clk: bcm2835: Allow reparenting leaf clocks while they're running.

This falls under the same "we can reprogram glitch-free as long as we
pause generation" rule as updating the div/frac fields.  This can be
used for runtime reclocking of V3D to manage power leakage.

Signed-off-by: Eric Anholt <eric@anholt.net>

diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 9dfaf22..07ddfc0 100644 (file)
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1086,8 +1086,10 @@ static int bcm2835_clock_on(struct clk_hw *hw)
        return 0;
 }
 
-static int bcm2835_clock_set_rate(struct clk_hw *hw,
-                                 unsigned long rate, unsigned long parent_rate)
+static int bcm2835_clock_set_rate_and_parent(struct clk_hw *hw,
+                                            unsigned long rate,
+                                            unsigned long parent_rate,
+                                            u8 parent)
 {
        struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
        struct bcm2835_cprman *cprman = clock->cprman;
@@ -1109,6 +1111,11 @@ static int bcm2835_clock_set_rate(struct clk_hw *hw,
                bcm2835_clock_wait_busy(clock);
        }
 
+       if (parent != 0xff) {
+               ctl &= ~(CM_SRC_MASK << CM_SRC_SHIFT);
+               ctl |= parent << CM_SRC_SHIFT;
+       }
+
        ctl &= ~CM_FRAC;
        ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
        cprman_write(cprman, data->ctl_reg, ctl);
@@ -1120,6 +1127,12 @@ static int bcm2835_clock_set_rate(struct clk_hw *hw,
        return 0;
 }
 
+static int bcm2835_clock_set_rate(struct clk_hw *hw,
+                                 unsigned long rate, unsigned long parent_rate)
+{
+       return bcm2835_clock_set_rate_and_parent(hw, rate, parent_rate, 0xff);
+}
+
 static bool
 bcm2835_clk_is_pllc(struct clk_hw *hw)
 {
@@ -1303,6 +1316,7 @@ static const struct clk_ops bcm2835_clock_clk_ops = {
        .unprepare = bcm2835_clock_off,
        .recalc_rate = bcm2835_clock_get_rate,
        .set_rate = bcm2835_clock_set_rate,
+       .set_rate_and_parent = bcm2835_clock_set_rate_and_parent,
        .determine_rate = bcm2835_clock_determine_rate,
        .set_parent = bcm2835_clock_set_parent,
        .get_parent = bcm2835_clock_get_parent,
@@ -1479,7 +1493,6 @@ static struct clk_hw *bcm2835_register_clock(struct bcm2835_cprman *cprman,
                init.ops = &bcm2835_vpu_clock_clk_ops;
        } else {
                init.ops = &bcm2835_clock_clk_ops;
-               init.flags |= CLK_SET_PARENT_GATE;
 
                /* If the clock wasn't actually enabled at boot, it's not
                 * critical.