.addImm(0)
.addUse(I.getOperand(2).getReg())
.addImm(AArch64::sub_32);
- unsigned BFMDef = MRI.createVirtualRegister(DstRC);
MachineInstr &BFM =
*BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AArch64::BFMXri))
- .addDef(BFMDef)
+ .addDef(I.getOperand(0).getReg())
.addUse(SubToRegDef)
.addUse(SubToRegDef2)
.addImm(32)
liveins: $w0, $w1
; CHECK-LABEL: name: gmerge_s64_s32
- ; CHECK: [[COPY:%[0-9]+]]:gpr32all(s32) = COPY $w0
- ; CHECK: [[COPY1:%[0-9]+]]:gpr32all(s32) = COPY $w1
- ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]](s32), %subreg.sub_32
- ; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY1]](s32), %subreg.sub_32
+ ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY $w0
+ ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY $w1
+ ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32
+ ; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_32
; CHECK: [[BFMXri:%[0-9]+]]:gpr64 = BFMXri [[SUBREG_TO_REG]], [[SUBREG_TO_REG1]], 32, 31
- ; CHECK: $x0 = COPY %2:gpr(s64)
+ ; CHECK: $x0 = COPY [[BFMXri]]
%0(s32) = COPY $w0
%1(s32) = COPY $w1
%2(s64) = G_MERGE_VALUES %0(s32), %1(s32)