First, the siginfo preamble wasn't quite right; we need to indicate
that we are padding up to 4 ints of preamble for 64-bit code, and
then for compat mode we need to pad differently, using only 3 ints.
Second, the C ABI requires a save area of two registers, not two
pointers, since in compat mode we have 64-bit registers all of which
we need to save, even though we only have 32-bit VAs.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* The ABI requires callers to allocate a caller state save area of
* this many bytes at the bottom of each stack frame.
*/
-#ifdef __tile__
-#define C_ABI_SAVE_AREA_SIZE (2 * __SIZEOF_POINTER__)
-#endif
+#define C_ABI_SAVE_AREA_SIZE (2 * (CHIP_WORD_SIZE() / 8))
/**
* The operand to an 'info' opcode directing the backtracer to not
#define __ARCH_SI_TRAPNO
+#ifdef __LP64__
+# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+#endif
+
#include <asm-generic/siginfo.h>
/*
sigset_t uc_sigmask; /* mask last for extensibility */
};
+#define COMPAT_SI_PAD_SIZE ((SI_MAX_SIZE - 3 * sizeof(int)) / sizeof(int))
+
struct compat_siginfo {
int si_signo;
int si_errno;
int si_code;
union {
- int _pad[SI_PAD_SIZE];
+ int _pad[COMPAT_SI_PAD_SIZE];
/* kill() */
struct {