+2015-03-10 Yvan Roux <yvan.roux@linaro.org>
+
+ Backport from trunk r220489.
+ 2015-02-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR ipa/64896
+ * cgraphunit.c (cgraph_node::expand_thunk): If
+ restype is not is_gimple_reg_type nor the thunk_fndecl
+ returns aggregate_value_p, set restmp to a temporary variable
+ instead of resdecl.
+
+2015-03-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/65286
+ * config/rs6000/t-linux: For powerpc64* target set
+ MULTILIB_OSDIRNAMES instead of MULTIARCH_DIRNAME.
+
+2015-03-10 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/53988
+ * config/sh/sh.md (*tst<mode>_t_zero): Remove insns.
+
+2015-03-10 Alan Modra <amodra@gmail.com>
+
+ PR target/65286
+ * config.gcc (powerpc*-*-linux*): Arrange for powerpc64le-linux
+ to be single-arch by default. Set cpu_is_64bit for powerpc64
+ given --with-cpu=native.
+ * config/rs6000/t-fprules: Do not set default MULTILIB vars.
+ * config/rs6000/t-linux (MULTIARCH_DIRNAME): Support powerpc64
+ and powerpc64le.
+ * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Test
+ rs6000_isa_flags rather than TARGET_64BIT.
+
+2015-03-05 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ Backport from trunk
+ 2015-03-03 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR 65138/target
+ * config/rs6000/rs6000-cpus.def (powerpc64le): Add new generic
+ processor type for 64-bit little endian PowerPC.
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal): If
+ -mdebug=reg, print TARGET_DEFAULT. Fix logic to use
+ TARGET_DEFAULT if there is no default cpu. Fix -mdebug=reg
+ printing built-in mask so it does not pass NULL pointers.
+
+ * config/rs6000/rs6000-tables.opt: Regenerate.
+
+ * doc/invoke.texi (IBM RS/6000 and PowerPC options): Document
+ -mcpu=powerpc64le.
+
+ Backport from trunk
+ 2015-01-19 David Edelsohn <dje.gcc@gmail.com>
+
+ * config/rs6000/default64.h: Include rs6000-cpus.def.
+ (TARGET_DEFAULT) [LITTLE_ENDIAN]: Use ISA 2.7 (POWER8).
+ (TARGET_DEFAULT) [BIG_ENDIAN]: Use POWER4.
+ * config/rs6000/driver-rs6000.c (detect_processor_aix): Add POWER7
+ and POWER8.
+ * config/rs6000/linux64.h (PROCESSOR_DEFAULT64): Always default to
+ POWER8.
+ * config/rs6000/rs6000.c (rs6000_file_start): Emit .machine
+ pseudo-op to specify assembler dialect.
+
+2015-03-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ Backport from mainline
+ 2014-11-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ PR target/59593
+ * config/arm/arm.c (dump_minipool): dispatch to consttable pattern
+ based on mode size.
+ * config/arm/arm.md (consttable_1): Make it TARGET_EITHER.
+ (consttable_2): Make it TARGET_EITHER and move HFmode handling from
+ consttable_4 to it.
+ (consttable_4): Move HFmode handling to consttable_2 pattern.
+
+2015-03-03 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ PR target/65249
+ * config/sh/sh.md (symGOT_load): Use R0 reg for operands[2] when
+ called for __stack_chk_guard symbol.
+
+2015-03-03 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/64331
+ * config/avr/avr.c (context.h, tree-pass.h): Include them.
+ (avr_pass_data_recompute_notes): New static variable.
+ (avr_pass_recompute_notes): New class.
+ (avr_register_passes): New static function.
+ (avr_option_override): Call it.
+
+2015-03-03 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/ia64/ia64.c (expand_vec_perm_interleave_2): Use gen_raw_REG
+ to create a register in testing mode.
+
+2015-03-03 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ Backport from mainline
+ 2015-01-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ PR target/64453
+ * config/arm/arm.c (callee_saved_reg_p): Define.
+ (arm_compute_save_reg0_reg12_mask): Use callee_saved_reg_p to check if
+ register is callee saved instead of !call_used_regs[reg].
+ (thumb1_compute_save_reg_mask): Likewise.
+
+2015-02-27 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/63175
+ * builtins.c (get_object_alignment_2): Make sure to re-apply
+ the ANDed mask after recursing to its operand gets us a new
+ misalignment bit position.
+
+2015-02-27 Andrew Pinski <apinski@cavium.com>
+ Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
+
+ * config/aarch64/aarch64.c (*aarch64_load_symref_appropriately):
+ Check whether the destination of SYMBOL_SMALL_TPREL is Pmode.
+
+2015-02-27 Richard Biener <rguenther@suse.de>
+
+ PR lto/65193
+ Backport from mainline
+ 2014-07-24 Jan Hubicka <hubicka@ucw.cz>
+
+ * lto-streamer-out.c (tree_is_indexable): Consider IMPORTED_DECL
+ as non-indexable.
+
+2015-02-25 Peter Bergner <bergner@vnet.ibm.com>
+
+ Backport from mainline
+ 2015-02-25 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
+
+ * config/rs6000/htm.md (tcheck): Fix assembly encoding.
+
+2015-02-26 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ PR target/64569
+ Backported from mainline: r213872, r217446, r217939, r219867
+
+ * config.in [!USED_FOR_TARGET] (HAVE_AS_DOT_MODULE): Undefine.
+ * config/mips/mips.h (FP_ASM_SPEC): New macro.
+ (ASM_SPEC): Use FP_ASM_SPEC.
+ * configure.ac (HAVE_AS_DOT_MODULE): Detect support for .module
+ and FPXX extensions.
+ * configure: Regenerate.
+
+2015-02-25 Jason Merrill <jason@redhat.com>
+
+ * common.opt (-flifetime-dse): New.
+
+2015-02-25 Kai Tietz <ktietz@redhat.com>
+
+ PR tree-optimization/61917
+ * tree-vect-loop.c (vectorizable_reduction): Handle obvious case
+ that reduc_def_stmt is null.
+
+ Merged from mainline
+ PR target/64212
+ * symtab.c (symtab::make_decl_local): Set DECL_IMPORT_P explicit to 0.
+ (symtab::noninterposable_alias): Likewise.
+
+2015-02-25 Richard Biener <rguenther@suse.de>
+ Kai Tietz <ktietz@redhat.com>
+
+ Backported from mainline
+ PR tree-optimization/61917
+ * tree-vect-loop.c (vectorizable_reduction): Allow
+ vect_internal_def without reduction to exit graceful.
+
+2015-02-25 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/65196
+ * config/avr/avr.c (avr_adjust_insn_length): Call recog_memoized
+ only with NONDEBUG_INSN_P.
+
+2015-02-25 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ Backport from mainline
+ 2015-02-23 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ PR target/65153
+ * config/sh/sh.md (movsicc_true+3): Remove peephole.
+ * config/sh/sh-protos.h (replace_n_hard_rtx): Don't declare.
+ * config/sh/sh.c (replace_n_hard_rtx): Remove.
+
+2015-02-24 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2015-02-11 Richard Biener <rguenther@suse.de>
+
+ PR lto/65015
+ * dwarf2out.c (gen_producer_string): Drop -fltrans-output-list
+ and -fresolution.
+
+ 2015-02-13 Richard Biener <rguenther@suse.de>
+
+ PR lto/65015
+ * dwarf2out.c (dwarf2out_finish): Use <artificial> as DW_AT_name
+ for LTO produced CUs.
+
+ 2015-02-16 Richard Biener <rguenther@suse.de>
+
+ PR lto/65015
+ * varasm.c (default_file_start): For LTO produced units
+ emit <artificial> as file directive.
+
+ 2015-01-17 Jan Kratochvil <jan.kratochvil@redhat.com>
+
+ * dwarf2out.c (gen_producer_string): Ignore also OPT_fpreprocessed.
+
+2015-02-23 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline
+ 2015-02-23 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/65163
+ * config/sh/sh.md (swapbsi2, related peephole2): Use const_int -65536
+ instead of const_int 4294901760.
+
+2015-02-23 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2014-11-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/63844
+ * omp-low.c (fixup_child_record_type): Use a restrict qualified
+ referece type for the receiver parameter.
+
+ 2014-11-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/61634
+ * tree-vect-slp.c: Include gimple-walk.h.
+ (vect_detect_hybrid_slp_stmts): Rewrite to propagate hybrid
+ down the SLP tree for one scalar statement.
+ (vect_detect_hybrid_slp_1): New walker function.
+ (vect_detect_hybrid_slp_2): Likewise.
+ (vect_detect_hybrid_slp): Properly handle pattern statements
+ in a pre-scan over all loop stmts.
+
+ 2015-01-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/59354
+ * tree-vect-slp.c (vect_build_slp_tree_1): Treat loads from
+ groups larger than the slp group size as having gaps.
+
+ 2015-02-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/64909
+ * tree-vect-loop.c (vect_estimate_min_profitable_iters): Properly
+ pass a scalar-stmt count estimate to the cost model.
+ * tree-vect-data-refs.c (vect_peeling_hash_get_lowest_cost): Likewise.
+
+2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backport from mainline
+ 2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.md (*aarch64_lshr_sisd_or_int_<mode>3):
+ Mark operand 0 as earlyclobber in 2nd alternative.
+ (1st define_split below *aarch64_lshr_sisd_or_int_<mode>3):
+ Write negated shift amount into QI lowpart operand 0 and use it
+ in the shift step.
+ (2nd define_split below *aarch64_lshr_sisd_or_int_<mode>3): Likewise.
+
+2015-02-20 Georg-Johann Lay <avr@gjlay.de>
+
+ Backport from 2015-02-20 trunk r220847.
+
+ PR target/64452
+ * config/avr/avr.md (pushhi_insn): New insn.
+ (push<mode>1): Push virtual regs in one chunk using pushhi1_insn.
+
+2015-02-20 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2015-01-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/64530
+ * tree-loop-distribution.c (pg_add_dependence_edges): Shuffle
+ back dr1.
+
+ 2015-02-13 Richard Biener <rguenther@suse.de>
+
+ PR lto/64373
+ * lto-streamer-out.c (tree_is_indexable): Guard for NULL
+ DECL_CONTEXT.
+
+ 2015-02-16 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/63593
+ * tree-predcom.c (execute_pred_commoning_chain): Delay removing
+ stmts and releasing SSA names until...
+ (execute_pred_commoning): ... after processing all chains.
+
+ 2015-02-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/65063
+ * tree-predcom.c (determine_unroll_factor): Return 1 if we
+ have replaced looparound PHIs.
+
+2015-02-19 John David Anglin <danlgin@gcc.gnu.org>
+
+ * config/pa/pa.c (pa_reloc_rw_mask): New function.
+ (TARGET_ASM_RELOC_RW_MASK): Define.
+ (pa_cannot_force_const_mem): Revert previous change.
+
+2015-02-19 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2014-12-09 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/64199
+ * fold-const.c (fold_binary_loc): Use TREE_OVERFLOW_P.
+
+ 2015-01-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/64493
+ PR tree-optimization/64495
+ * tree-vect-loop.c (vect_finalize_reduction): For double-reductions
+ assign the proper vectorized PHI to the inner loop exit PHIs.
+
+ 2015-01-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/56273
+ PR tree-optimization/59124
+ PR tree-optimization/64277
+ * tree-vrp.c (vrp_finalize): Emit array-bound warnings only
+ from the first VRP pass.
+
+ 2015-02-19 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2015-01-15 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/64365
+ * tree-data-ref.c (dr_analyze_indices): Make sure that accesses
+ for MEM_REF access functions with the same base can never partially
+ overlap.
+
+2015-02-17 Ilya Tocar <ilya.tocar@intel.com>
+
+ Backported from mainline
+ 2015-01-14 Ilya Tocar <ilya.tocar@intel.com>
+
+ PR target/64387
+ * config/i386/sse.md (vec_unpacks_hi_v8sf): Fix predicate.
+ (vec_unpacks_hi_v16sf): Ditto.
+
+2015-02-15 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.c (pa_secondary_reload): Request a secondary reload
+ for all floading point loads and stores except those using a register
+ index address.
+ * config/pa/pa.md: Add new patterns to load a lo_sum DLT operand
+ to a register.
+
+2015-02-13 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/constraints.md: Change "Q" and "T" constraints to memory
+ constraints.
+ * config/pa/pa.c (pa_cannot_force_const_mem): Don't allow constant
+ symbolic references to data to be forced to constant memory on the
+ SOM target.
+
+2015-02-11 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2015-02-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/64979
+ * tree-stdarg.c (pass_stdarg::execute): Scan phi node args for
+ va_list escapes.
+
+2015-02-11 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/alpha/alpha.md (reload_out<mode>_aligned): Make operands 2
+ and 3 earlyclobber operands.
+
+2015-02-09 Dominik Vogt <vogt@linux.vnet.ibm.com>
+
+ * doc/extend.texi: s/390: Update documentation of hotpatch attribute.
+ * doc/invoke.texi (-mhotpatch): s/390: Update documentation of
+ -mhotpatch= option.
+ * config/s390/s390.opt (mhotpatch): s/390: Remove -mhotpatch and
+ -mno-hotpatch options. Change syntax of -mhotpatch= option.
+ * config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default):
+ Renamed.
+ (s390_hotpatch_trampoline_halfwords_max): Renamed.
+ (s390_hotpatch_hw_max): New name.
+ (s390_hotpatch_trampoline_halfwords): Renamed.
+ (s390_hotpatch_hw_before_label): New name.
+ (get_hotpatch_attribute): Removed.
+ (s390_hotpatch_hw_after_label): New name.
+ (s390_handle_hotpatch_attribute): Add second parameter to hotpatch
+ attribute.
+ (s390_attribute_table): Ditto.
+ (s390_function_num_hotpatch_trampoline_halfwords): Renamed.
+ (s390_function_num_hotpatch_hw): New name.
+ Remove special handling of inline functions and hotpatching.
+ Return number of nops before and after the function label.
+ (s390_can_inline_p): Removed.
+ (s390_asm_output_function_label): Emit a configurable number of nops
+ after the function label.
+ (s390_option_override): Update -mhotpatch= syntax and remove -mhotpatch.
+ (TARGET_CAN_INLINE_P) Removed.
+ (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): New.
+
2015-02-05 Segher Boessenkool <segher@kernel.crashing.org>
PR target/64580
tree addr = TREE_OPERAND (exp, 0);
unsigned ptr_align;
unsigned HOST_WIDE_INT ptr_bitpos;
+ unsigned HOST_WIDE_INT ptr_bitmask = ~0;
+ /* If the address is explicitely aligned, handle that. */
if (TREE_CODE (addr) == BIT_AND_EXPR
&& TREE_CODE (TREE_OPERAND (addr, 1)) == INTEGER_CST)
{
- align = (TREE_INT_CST_LOW (TREE_OPERAND (addr, 1))
- & -TREE_INT_CST_LOW (TREE_OPERAND (addr, 1)));
- align *= BITS_PER_UNIT;
+ ptr_bitmask = TREE_INT_CST_LOW (TREE_OPERAND (addr, 1));
+ ptr_bitmask *= BITS_PER_UNIT;
+ align = ptr_bitmask & -ptr_bitmask;
addr = TREE_OPERAND (addr, 0);
}
= get_pointer_alignment_1 (addr, &ptr_align, &ptr_bitpos);
align = MAX (ptr_align, align);
+ /* Re-apply explicit alignment to the bitpos. */
+ ptr_bitpos &= ptr_bitmask;
+
/* The alignment of the pointer operand in a TARGET_MEM_REF
has to take the variable offset parts into account. */
if (TREE_CODE (exp) == TARGET_MEM_REF)
+2015-03-06 Eric Botcazou <ebotcazou@adacore.com>
+
+ * g++.dg/other/dump-ada-spec-3.C: Remove include and adjust.
+
+2015-03-06 Eric Botcazou <ebotcazou@adacore.com>
+ Jonathan Wakely <jwakely.gcc@gmail.com>
+
+ * c-ada-spec.c (dump_ada_double_name): Fix pasto.
+
+2015-03-05 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR ada/65319
+ * c-ada-spec.c (print_destructor): Remove obsolete code.
+
+2015-02-11 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2015-02-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/64824
+ PR c/64868
+ * c-omp.c (c_finish_omp_atomic): Use TRUNC_DIV_EXPR
+ instead of RDIV_EXPR. Use build_binary_op instead of
+ build2_loc.
+
+2015-02-11 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2014-07-24 Marek Polacek <polacek@redhat.com>
+
+ PR c/57653
+ * c-opts.c (c_finish_options): If -imacros is in effect, return.
+
2015-01-20 Marek Polacek <polacek@redhat.com>
Backport from mainline
pp_underscore (buffer);
- if (DECL_NAME (t1))
+ if (DECL_NAME (t2))
pp_ada_tree_identifier (buffer, DECL_NAME (t2), t2, false);
else
{
print_destructor (pretty_printer *buffer, tree t)
{
tree decl_name = DECL_NAME (DECL_ORIGIN (t));
- const char *s = IDENTIFIER_POINTER (decl_name);
- if (*s == '_')
- {
- for (s += 2; *s != ' '; s++)
- pp_character (buffer, *s);
- }
- else
- {
- pp_string (buffer, "Delete_");
- pp_ada_tree_identifier (buffer, decl_name, t, false);
- }
+ pp_string (buffer, "Delete_");
+ pp_ada_tree_identifier (buffer, decl_name, t, false);
}
/* Return the name of type T. */
return error_mark_node;
}
+ if (opcode == RDIV_EXPR)
+ opcode = TRUNC_DIV_EXPR;
+
/* ??? Validate that rhs does not overlap lhs. */
/* Take and save the address of the lhs. From then on we'll reference it
to do this, and then take it apart again. */
if (swapped)
{
- rhs = build2_loc (loc, opcode, TREE_TYPE (lhs), rhs, lhs);
+ rhs = build_binary_op (loc, opcode, rhs, lhs, 1);
opcode = NOP_EXPR;
}
bool save = in_late_binary_op;
static void
push_command_line_include (void)
{
+ /* This can happen if disabled by -imacros for example.
+ Punt so that we don't set "<command-line>" as the filename for
+ the header. */
+ if (include_cursor > deferred_count)
+ return;
+
if (!done_preinclude)
{
done_preinclude = true;
+2015-02-27 Marek Polacek <polacek@redhat.com>
+
+ Backported from mainline
+ 2015-02-27 Marek Polacek <polacek@redhat.com>
+
+ PR c/65228
+ * c-decl.c (start_decl): Return NULL_TREE if decl is an error node.
+
+2015-02-11 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/64824
+ * c-parser.c (c_parser_binary_expression): Fix OpenMP stack[sp].prec
+ check in the POP macro.
+
+ Backported from mainline
+ 2015-02-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/64824
+ PR c/64868
+ * c-parser.c (c_parser_omp_atomic): Handle RDIV_EXPR.
+
2015-02-01 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
decl = grokdeclarator (declarator, declspecs,
NORMAL, initialized, NULL, &attributes, &expr, NULL,
deprecated_state);
- if (!decl)
- return 0;
+ if (!decl || decl == error_mark_node)
+ return NULL_TREE;
if (expr)
add_stmt (fold_convert (void_type_node, expr));
if (__builtin_expect (omp_atomic_lhs != NULL_TREE, 0) && sp == 1 \
&& c_parser_peek_token (parser)->type == CPP_SEMICOLON \
&& ((1 << stack[sp].prec) \
- & (1 << (PREC_BITOR | PREC_BITXOR | PREC_BITAND | PREC_SHIFT \
- | PREC_ADD | PREC_MULT))) \
+ & ((1 << PREC_BITOR) | (1 << PREC_BITXOR) | (1 << PREC_BITAND) \
+ | (1 << PREC_SHIFT) | (1 << PREC_ADD) | (1 << PREC_MULT))) \
&& stack[sp].op != TRUNC_MOD_EXPR \
&& stack[0].expr.value != error_mark_node \
&& stack[1].expr.value != error_mark_node \
{
case MULT_EXPR:
case TRUNC_DIV_EXPR:
+ case RDIV_EXPR:
case PLUS_EXPR:
case MINUS_EXPR:
case LSHIFT_EXPR:
restmp = gimple_fold_indirect_ref (resdecl);
else if (!is_gimple_reg_type (restype))
{
- restmp = resdecl;
- add_local_decl (cfun, restmp);
- BLOCK_VARS (DECL_INITIAL (current_function_decl)) = restmp;
+ if (aggregate_value_p (resdecl, TREE_TYPE (thunk_fndecl)))
+ {
+ restmp = resdecl;
+ add_local_decl (cfun, restmp);
+ BLOCK_VARS (DECL_INITIAL (current_function_decl)) = restmp;
+ }
+ else
+ restmp = create_tmp_var (restype, "retval");
}
else
restmp = create_tmp_reg (restype, "retval");
Common Ignore
Does nothing. Preserved for backward compatibility.
+flifetime-dse
+Common Report Var(flag_lifetime_dse) Init(1) Optimization
+Tell DSE that the storage for a C++ object is dead when the constructor
+starts and when the destructor finishes.
+
flive-range-shrinkage
Common Report Var(flag_live_range_shrinkage) Init(0) Optimization
Relief of register pressure through live range shrinkage
powerpc*-*-linux*)
tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h rs6000/sysv4.h"
extra_options="${extra_options} rs6000/sysv4.opt"
- tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
+ tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-ppccomm"
extra_objs="$extra_objs rs6000-linux.o"
case ${target} in
powerpc*le-*-*)
tm_file="${tm_file} rs6000/sysv4le.h" ;;
esac
- maybe_biarch=yes
+ case ${target}:${with_cpu} in
+ powerpc64*: | powerpc64*:native) cpu_is_64bit=yes ;;
+ esac
+ maybe_biarch=${cpu_is_64bit}
+ case ${enable_targets} in
+ *powerpc64*) maybe_biarch=yes ;;
+ esac
case ${target} in
powerpc64*-*-linux*spe* | powerpc64*-*-linux*paired*)
- echo "*** Configuration ${target} not supported" 1>&2
+ echo "*** Configuration ${target} not supported" 1>&2
exit 1
;;
powerpc*-*-linux*spe* | powerpc*-*-linux*paired*)
maybe_biarch=
;;
- powerpc64*-*-linux*)
- test x$with_cpu != x || cpu_is_64bit=yes
- maybe_biarch=always
- ;;
esac
- case ${maybe_biarch}:${enable_targets}:${cpu_is_64bit} in
- always:* | yes:*powerpc64* | yes:all:* | yes:*:yes)
+ case ${target}:${enable_targets}:${maybe_biarch} in
+ powerpc64-* | powerpc-*:*:yes | *:*powerpc64-*:yes | *:all:yes \
+ | powerpc64le*:*powerpcle* | powerpc64le*:*powerpc-* \
+ | powerpcle-*:*powerpc64le*:yes)
if test x$cpu_is_64bit = xyes; then
tm_file="${tm_file} rs6000/default64.h"
fi
esac
extra_options="${extra_options} rs6000/linux64.opt"
;;
+ powerpc64*)
+ tm_file="${tm_file} rs6000/default64.h rs6000/linux64.h glibc-stdint.h"
+ extra_options="${extra_options} rs6000/linux64.opt"
+ tmake_file="${tmake_file} rs6000/t-linux"
+ ;;
*)
tm_file="${tm_file} rs6000/linux.h glibc-stdint.h"
- tmake_file="$tmake_file rs6000/t-linux"
+ tmake_file="${tmake_file} rs6000/t-ppcos rs6000/t-linux"
;;
esac
case ${target} in
#endif
+/* Define if the assembler understands .module. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_DOT_MODULE
+#endif
+
+
/* Define if your assembler supports the -no-mul-bug-abort option. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_NO_MUL_BUG_ABORT_OPTION
case SYMBOL_SMALL_TPREL:
{
rtx tp = aarch64_load_tp (NULL);
+
+ if (GET_MODE (dest) != Pmode)
+ tp = gen_lowpart (GET_MODE (dest), tp);
+
emit_insn (gen_tlsle_small (dest, tp, imm));
set_unique_reg_note (get_last_insn (), REG_EQUIV, imm);
return;
(define_insn_and_split "reload_out<mode>_aligned"
[(set (match_operand:I12MODE 0 "memory_operand" "=m")
(match_operand:I12MODE 1 "register_operand" "r"))
- (clobber (match_operand:SI 2 "register_operand" "=r"))
- (clobber (match_operand:SI 3 "register_operand" "=r"))]
+ (clobber (match_operand:SI 2 "register_operand" "=&r"))
+ (clobber (match_operand:SI 3 "register_operand" "=&r"))]
"!TARGET_BWX && (reload_in_progress || reload_completed)"
"#"
"!TARGET_BWX && reload_completed"
fputc ('\n', dump_file);
}
- switch (mp->fix_size)
+ switch (GET_MODE_SIZE (mp->mode))
{
#ifdef HAVE_consttable_1
case 1:
fputs ("\"\n", stream);
}
\f
+/* Whether a register is callee saved or not. This is necessary because high
+ registers are marked as caller saved when optimizing for size on Thumb-1
+ targets despite being callee saved in order to avoid using them. */
+#define callee_saved_reg_p(reg) \
+ (!call_used_regs[reg] \
+ || (TARGET_THUMB1 && optimize_size \
+ && reg >= FIRST_HI_REGNUM && reg <= LAST_HI_REGNUM))
+
/* Compute the register save mask for registers 0 through 12
inclusive. This code is used by arm_compute_save_reg_mask. */
/* In the normal case we only need to save those registers
which are call saved and which are used by this function. */
for (reg = 0; reg <= 11; reg++)
- if (df_regs_ever_live_p (reg) && ! call_used_regs[reg])
+ if (df_regs_ever_live_p (reg) && callee_saved_reg_p (reg))
save_reg_mask |= (1 << reg);
/* Handle the frame pointer as a special case. */
mask = 0;
for (reg = 0; reg < 12; reg ++)
- if (df_regs_ever_live_p (reg) && !call_used_regs[reg])
+ if (df_regs_ever_live_p (reg) && callee_saved_reg_p (reg))
mask |= 1 << reg;
if (flag_pic
if (reg * UNITS_PER_WORD <= (unsigned) arm_size_return_regs ())
reg = LAST_LO_REGNUM;
- if (! call_used_regs[reg])
+ if (callee_saved_reg_p (reg))
mask |= 1 << reg;
}
/* When optimizing for size on Thumb-1, it's better not
to use the HI regs, because of the overhead of
stacking them. */
- for (regno = FIRST_HI_REGNUM;
- regno <= LAST_HI_REGNUM; ++regno)
+ for (regno = FIRST_HI_REGNUM; regno <= LAST_HI_REGNUM; ++regno)
fixed_regs[regno] = call_used_regs[regno] = 1;
}
(define_insn "consttable_1"
[(unspec_volatile [(match_operand 0 "" "")] VUNSPEC_POOL_1)]
- "TARGET_THUMB1"
+ "TARGET_EITHER"
"*
making_const_table = TRUE;
assemble_integer (operands[0], 1, BITS_PER_WORD, 1);
(define_insn "consttable_2"
[(unspec_volatile [(match_operand 0 "" "")] VUNSPEC_POOL_2)]
- "TARGET_THUMB1"
+ "TARGET_EITHER"
"*
- making_const_table = TRUE;
- gcc_assert (GET_MODE_CLASS (GET_MODE (operands[0])) != MODE_FLOAT);
- assemble_integer (operands[0], 2, BITS_PER_WORD, 1);
- assemble_zeros (2);
- return \"\";
- "
+ {
+ rtx x = operands[0];
+ making_const_table = TRUE;
+ switch (GET_MODE_CLASS (GET_MODE (x)))
+ {
+ case MODE_FLOAT:
+ arm_emit_fp16_const (x);
+ break;
+ default:
+ assemble_integer (operands[0], 2, BITS_PER_WORD, 1);
+ assemble_zeros (2);
+ break;
+ }
+ return \"\";
+ }"
[(set_attr "length" "4")
(set_attr "type" "no_insn")]
)
switch (GET_MODE_CLASS (GET_MODE (x)))
{
case MODE_FLOAT:
- if (GET_MODE (x) == HFmode)
- arm_emit_fp16_const (x);
- else
- {
- REAL_VALUE_TYPE r;
- REAL_VALUE_FROM_CONST_DOUBLE (r, x);
- assemble_real (r, GET_MODE (x), BITS_PER_WORD);
- }
- break;
+ {
+ REAL_VALUE_TYPE r;
+ REAL_VALUE_FROM_CONST_DOUBLE (r, x);
+ assemble_real (r, GET_MODE (x), BITS_PER_WORD);
+ break;
+ }
default:
/* XXX: Sometimes gcc does something really dumb and ends up with
a HIGH in a constant pool entry, usually because it's trying to
#include "target-def.h"
#include "params.h"
#include "df.h"
+#include "context.h"
+#include "tree-pass.h"
/* Maximal allowed offset for an address in the LD command */
#define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE))
}
+static const pass_data avr_pass_data_recompute_notes =
+{
+ RTL_PASS, // type
+ "", // name (will be patched)
+ OPTGROUP_NONE, // optinfo_flags
+ false, // has_gate
+ true, // has_execute
+ TV_DF_SCAN, // tv_id
+ 0, // properties_required
+ 0, // properties_provided
+ 0, // properties_destroyed
+ 0, // todo_flags_start
+ // todo_flags_finish
+ TODO_df_finish | TODO_verify_rtl_sharing | TODO_verify_flow
+};
+
+
+class avr_pass_recompute_notes : public rtl_opt_pass
+{
+public:
+ avr_pass_recompute_notes (gcc::context *ctxt, const char *name)
+ : rtl_opt_pass (avr_pass_data_recompute_notes, ctxt)
+ {
+ this->name = name;
+ }
+
+ unsigned int execute (void)
+ {
+ df_note_add_problem ();
+ df_analyze ();
+
+ return 0;
+ }
+}; // avr_pass_recompute_notes
+
+
+static void
+avr_register_passes (void)
+{
+ /* This avr-specific pass (re)computes insn notes, in particular REG_DEAD
+ notes which are used by `avr.c::reg_unused_after' and branch offset
+ computations. These notes must be correct, i.e. there must be no
+ dangling REG_DEAD notes; otherwise wrong code might result, cf. PR64331.
+
+ DF needs (correct) CFG, hence right before free_cfg is the last
+ opportunity to rectify notes. */
+
+ register_pass (new avr_pass_recompute_notes (g, "avr-notes-free-cfg"),
+ PASS_POS_INSERT_BEFORE, "*free_cfg", 1);
+}
+
+
/* Implement `TARGET_OPTION_OVERRIDE'. */
static void
init_machine_status = avr_init_machine_status;
avr_log_set_avr_log();
+
+ /* Register some avr-specific pass(es). There is no canonical place for
+ pass registration. This function is convenient. */
+
+ avr_register_passes ();
}
/* Function to set up the backend function structure. */
It is easier to state this in an insn attribute "adjust_len" than
to clutter up code here... */
- if (-1 == recog_memoized (insn))
+ if (!NONDEBUG_INSN_P (insn)
+ || -1 == recog_memoized (insn))
{
return len;
}
push __zero_reg__"
[(set_attr "length" "1,1")])
+(define_insn "pushhi1_insn"
+ [(set (mem:HI (post_dec:HI (reg:HI REG_SP)))
+ (match_operand:HI 0 "register_operand" "r"))]
+ ""
+ "push %B0\;push %A0"
+ [(set_attr "length" "2")])
+
;; All modes for a multi-byte push. We must include complex modes here too,
;; lest emit_single_push_insn "helpfully" create the auto-inc itself.
(define_mode_iterator MPUSH
[(match_operand:MPUSH 0 "" "")]
""
{
- int i;
-
- // Avoid (subreg (mem)) for non-generic address spaces below. Because
- // of the poor addressing capabilities of these spaces it's better to
- // load them in one chunk. And it avoids PR61443.
-
if (MEM_P (operands[0])
&& !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (operands[0])))
- operands[0] = copy_to_mode_reg (<MODE>mode, operands[0]);
+ {
+ // Avoid (subreg (mem)) for non-generic address spaces. Because
+ // of the poor addressing capabilities of these spaces it's better to
+ // load them in one chunk. And it avoids PR61443.
+
+ operands[0] = copy_to_mode_reg (<MODE>mode, operands[0]);
+ }
+ else if (REG_P (operands[0])
+ && IN_RANGE (REGNO (operands[0]), FIRST_VIRTUAL_REGISTER,
+ LAST_VIRTUAL_REGISTER))
+ {
+ // Byte-wise pushing of virtual regs might result in something like
+ //
+ // (set (mem:QI (post_dec:HI (reg:HI 32 SP)))
+ // (subreg:QI (plus:HI (reg:HI 28)
+ // (const_int 17)) 0))
+ //
+ // after elimination. This cannot be handled by reload, cf. PR64452.
+ // Reload virtuals in one chunk. That way it's possible to reload
+ // above situation and finally
+ //
+ // (set (reg:HI **)
+ // (const_int 17))
+ // (set (reg:HI **)
+ // (plus:HI (reg:HI **)
+ // (reg:HI 28)))
+ // (set (mem:HI (post_dec:HI (reg:HI 32 SP))
+ // (reg:HI **)))
+
+ emit_insn (gen_pushhi1_insn (operands[0]));
+ DONE;
+ }
- for (i = GET_MODE_SIZE (<MODE>mode) - 1; i >= 0; --i)
+ for (int i = GET_MODE_SIZE (<MODE>mode) - 1; i >= 0; --i)
{
rtx part = simplify_gen_subreg (QImode, operands[0], <MODE>mode, i);
if (part != const0_rtx)
(define_expand "vec_unpacks_hi_v8sf"
[(set (match_dup 2)
(vec_select:V4SF
- (match_operand:V8SF 1 "nonimmediate_operand")
+ (match_operand:V8SF 1 "register_operand")
(parallel [(const_int 4) (const_int 5)
(const_int 6) (const_int 7)])))
(set (match_operand:V4DF 0 "register_operand")
(define_expand "vec_unpacks_hi_v16sf"
[(set (match_dup 2)
(vec_select:V8SF
- (match_operand:V16SF 1 "nonimmediate_operand")
+ (match_operand:V16SF 1 "register_operand")
(parallel [(const_int 8) (const_int 9)
(const_int 10) (const_int 11)
(const_int 12) (const_int 13)
gcc_assert (e < nelt);
dfinal.perm[i] = e;
}
- dfinal.op0 = gen_reg_rtx (dfinal.vmode);
+ if (d->testing_p)
+ dfinal.op0 = gen_raw_REG (dfinal.vmode, LAST_VIRTUAL_REGISTER + 1);
+ else
+ dfinal.op0 = gen_reg_rtx (dfinal.vmode);
dfinal.op1 = dfinal.op0;
dfinal.one_operand_p = true;
dremap.target = dfinal.op0;
#define SUBTARGET_ASM_SPEC ""
#endif
+/* FP_ASM_SPEC represents the floating-point options that must be passed
+ to the assembler when FPXX support exists. Prior to that point the
+ assembler could accept the options but were not required for
+ correctness. We only add the options when absolutely necessary
+ because passing -msoft-float to the assembler will cause it to reject
+ all hard-float instructions which may require some user code to be
+ updated. */
+
+#ifdef HAVE_AS_DOT_MODULE
+#define FP_ASM_SPEC "\
+%{mhard-float} %{msoft-float} \
+%{msingle-float} %{mdouble-float}"
+#else
+#define FP_ASM_SPEC
+#endif
+
#undef ASM_SPEC
#define ASM_SPEC "\
%{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} \
%{mfp32} %{mfp64} %{mnan=*} \
%{mshared} %{mno-shared} \
%{msym32} %{mno-sym32} \
-%{mtune=*} \
+%{mtune=*}" \
+FP_ASM_SPEC "\
%(subtarget_asm_spec)"
/* Extra switches sometimes passed to the linker. */
(and (match_code "mem")
(match_test "IS_LO_SUM_DLT_ADDR_P (XEXP (op, 0))")))
-(define_constraint "Q"
+(define_memory_constraint "Q"
"A memory operand that can be used as the destination operand of an
integer store, or the source operand of an integer load. That is
any memory operand that isn't a symbolic, indexed or lo_sum memory
(and (match_code "mem")
(match_test "IS_INDEX_ADDR_P (XEXP (op, 0))")))
-(define_constraint "T"
+(define_memory_constraint "T"
"A memory operand for floating-point loads and stores."
(match_test "floating_point_store_memory_operand (op, mode)"))
static int pa_adjust_cost (rtx, rtx, rtx, int);
static int pa_adjust_priority (rtx, int);
static int pa_issue_rate (void);
+static int pa_reloc_rw_mask (void);
static void pa_som_asm_init_sections (void) ATTRIBUTE_UNUSED;
static section *pa_som_tm_clone_table_section (void) ATTRIBUTE_UNUSED;
static section *pa_select_section (tree, int, unsigned HOST_WIDE_INT)
#define TARGET_ASM_FILE_END output_deferred_plabels
#endif
+#undef TARGET_ASM_RELOC_RW_MASK
+#define TARGET_ASM_RELOC_RW_MASK pa_reloc_rw_mask
+
#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
#define TARGET_PRINT_OPERAND_PUNCT_VALID_P pa_print_operand_punct_valid_p
{
x = XEXP (x, 0);
- /* We don't need an intermediate for indexed and LO_SUM DLT
- memory addresses. When INT14_OK_STRICT is true, it might
- appear that we could directly allow register indirect
- memory addresses. However, this doesn't work because we
- don't support SUBREGs in floating-point register copies
- and reload doesn't tell us when it's going to use a SUBREG. */
- if (IS_INDEX_ADDR_P (x)
- || IS_LO_SUM_DLT_ADDR_P (x))
- return NO_REGS;
+ /* We don't need a secondary reload for indexed memory addresses.
- /* Request intermediate general register. */
- return GENERAL_REGS;
+ When INT14_OK_STRICT is true, it might appear that we could
+ directly allow register indirect memory addresses. However,
+ this doesn't work because we don't support SUBREGs in
+ floating-point register copies and reload doesn't tell us
+ when it's going to use a SUBREG. */
+ if (IS_INDEX_ADDR_P (x))
+ return NO_REGS;
}
/* Request a secondary reload with a general scratch register
return data_section;
}
+/* Implement pa_reloc_rw_mask. */
+
+static int
+pa_reloc_rw_mask (void)
+{
+ /* We force (const (plus (symbol) (const_int))) to memory when the
+ const_int doesn't fit in a 14-bit integer. The SOM linker can't
+ handle this construct in read-only memory and we want to avoid
+ this for ELF. So, we always force an RTX needing relocation to
+ the data section. */
+ return 3;
+}
+
static void
pa_globalize_label (FILE *stream, const char *name)
{
[(set_attr "type" "binary")
(set_attr "length" "4")])
+(define_insn ""
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (lo_sum:SI (match_operand:SI 1 "register_operand" "r")
+ (unspec:SI [(match_operand 2 "" "")] UNSPEC_DLTIND14R)))]
+ "symbolic_operand (operands[2], Pmode)
+ && ! function_label_operand (operands[2], Pmode)
+ && flag_pic"
+ "ldo RT'%G2(%1),%0"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
+(define_insn ""
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (lo_sum:DI (match_operand:DI 1 "register_operand" "r")
+ (unspec:DI [(match_operand 2 "" "")] UNSPEC_DLTIND14R)))]
+ "symbolic_operand (operands[2], Pmode)
+ && ! function_label_operand (operands[2], Pmode)
+ && TARGET_64BIT
+ && flag_pic"
+ "ldo RT'%G2(%1),%0"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
;; Always use addil rather than ldil;add sequences. This allows the
;; HP linker to eliminate the dp relocation if the symbolic operand
;; lives in the TEXT space.
/* Definitions of target machine for GNU compiler,
for 64 bit powerpc linux defaulting to -m64.
- Copyright (C) 2003-2014 Free Software Foundation, Inc.
+ Copyright (C) 2003-2015 Free Software Foundation, Inc.
This file is part of GCC.
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
+#define RS6000_CPU(NAME, CPU, FLAGS)
+#include "rs6000-cpus.def"
+#undef RS6000_CPU
+
#if (TARGET_DEFAULT & MASK_LITTLE_ENDIAN)
#undef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_64BIT | MASK_LITTLE_ENDIAN)
+#define TARGET_DEFAULT (ISA_2_7_MASKS_SERVER | MASK_POWERPC64 | MASK_64BIT | MASK_LITTLE_ENDIAN)
#else
#undef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_64BIT)
+#define TARGET_DEFAULT (MASK_PPC_GFXOPT | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64 | MASK_64BIT)
#endif
/* Subroutines for the gcc driver.
- Copyright (C) 2007-2014 Free Software Foundation, Inc.
+ Copyright (C) 2007-2015 Free Software Foundation, Inc.
This file is part of GCC.
case 0x4000:
return "power6";
+ case 0x8000:
+ return "power7";
+
+ case 0x10000:
+ return "power8";
+
default:
return "powerpc";
}
(unspec_volatile:CC [(match_operand 0 "u3bit_cint_operand" "n")]
UNSPECV_HTM_TCHECK))]
"TARGET_HTM"
- "tcheck. %0"
+ "tcheck %0"
[(set_attr "type" "htm")
(set_attr "length" "4")])
/* Definitions of target machine for GNU compiler,
for 64 bit PowerPC linux.
- Copyright (C) 2000-2014 Free Software Foundation, Inc.
+ Copyright (C) 2000-2015 Free Software Foundation, Inc.
This file is part of GCC.
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_POWER7
#undef PROCESSOR_DEFAULT64
-#ifdef LINUX64_DEFAULT_ABI_ELFv2
#define PROCESSOR_DEFAULT64 PROCESSOR_POWER8
-#else
-#define PROCESSOR_DEFAULT64 PROCESSOR_POWER7
-#endif
/* We don't need to generate entries in .fixup, except when
-mrelocatable or -mrelocatable-lib is given. */
{ \
if (!global_options_set.x_rs6000_alignment_flags) \
rs6000_alignment_flags = MASK_ALIGN_NATURAL; \
- if (TARGET_64BIT) \
+ if (rs6000_isa_flags & OPTION_MASK_64BIT) \
{ \
if (DEFAULT_ABI != ABI_AIX) \
{ \
/* IBM RS/6000 CPU names..
- Copyright (C) 1991-2014 Free Software Foundation, Inc.
+ Copyright (C) 1991-2015 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GCC.
RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
Enum(rs6000_cpu_opt_value) String(powerpc64) Value(52)
EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(53)
+Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(53)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rs64) Value(54)
/* Subroutines used for code generation on IBM RS/6000.
- Copyright (C) 1991-2014 Free Software Foundation, Inc.
+ Copyright (C) 1991-2015 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GCC.
= ((global_init_p || target_option_default_node == NULL)
? NULL : TREE_TARGET_OPTION (target_option_default_node));
+ /* Print defaults. */
+ if ((TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) && global_init_p)
+ rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT);
+
/* Remember the explicit arguments. */
if (global_init_p)
rs6000_isa_flags_explicit = global_options_set.x_rs6000_isa_flags;
}
else
{
- const char *default_cpu = (TARGET_POWERPC64 ? "powerpc64" : "powerpc");
+ /* PowerPC 64-bit LE requires at least ISA 2.07. */
+ const char *default_cpu = ((!TARGET_POWERPC64)
+ ? "powerpc"
+ : ((BYTES_BIG_ENDIAN)
+ ? "powerpc64"
+ : "powerpc64le"));
+
rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
have_cpu = false;
}
& set_masks);
}
else
- rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
- & ~rs6000_isa_flags_explicit);
+ {
+ /* If no -mcpu=<xxx>, inherit any default options that were cleared via
+ POWERPC_MASKS. Originally, TARGET_DEFAULT was used to initialize
+ target_flags via the TARGET_DEFAULT_TARGET_FLAGS hook. When we switched
+ to using rs6000_isa_flags, we need to do the initialization here.
- /* If no -mcpu=<xxx>, inherit any default options that were cleared via
- POWERPC_MASKS. Originally, TARGET_DEFAULT was used to initialize
- target_flags via the TARGET_DEFAULT_TARGET_FLAGS hook. When we switched
- to using rs6000_isa_flags, we need to do the initialization here. */
- if (!have_cpu)
- rs6000_isa_flags |= (TARGET_DEFAULT & ~rs6000_isa_flags_explicit);
+ If there is a TARGET_DEFAULT, use that. Otherwise fall back to using
+ -mcpu=powerpc, -mcpu=powerpc64, or -mcpu=powerpc64le defaults. */
+ HOST_WIDE_INT flags = ((TARGET_DEFAULT) ? TARGET_DEFAULT
+ : processor_target_table[cpu_index].target_enable);
+ rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit);
+ }
if (rs6000_tune_index >= 0)
tune_index = rs6000_tune_index;
target_flags. */
rs6000_builtin_mask = rs6000_builtin_mask_calculate ();
if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
- {
- fprintf (stderr,
- "new builtin mask = " HOST_WIDE_INT_PRINT_HEX ", ",
- rs6000_builtin_mask);
- rs6000_print_builtin_options (stderr, 0, NULL, rs6000_builtin_mask);
- }
+ rs6000_print_builtin_options (stderr, 0, "builtin mask",
+ rs6000_builtin_mask);
/* Initialize all of the registers. */
rs6000_init_hard_regno_mode_ok (global_init_p);
switch_to_section (toc_section);
switch_to_section (text_section);
}
+
+#ifdef USING_ELFOS_H
+ if (rs6000_default_cpu == 0 || rs6000_default_cpu[0] == '\0'
+ || !global_options_set.x_rs6000_cpu_index)
+ {
+ fputs ("\t.machine ", asm_out_file);
+ if ((rs6000_isa_flags & OPTION_MASK_DIRECT_MOVE) != 0)
+ fputs ("power8\n", asm_out_file);
+ else if ((rs6000_isa_flags & OPTION_MASK_POPCNTD) != 0)
+ fputs ("power7\n", asm_out_file);
+ else if ((rs6000_isa_flags & OPTION_MASK_CMPB) != 0)
+ fputs ("power6\n", asm_out_file);
+ else if ((rs6000_isa_flags & OPTION_MASK_POPCNTB) != 0)
+ fputs ("power5\n", asm_out_file);
+ else if ((rs6000_isa_flags & OPTION_MASK_MFCRF) != 0)
+ fputs ("power4\n", asm_out_file);
+ else if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) != 0)
+ fputs ("ppc64\n", asm_out_file);
+ else
+ fputs ("ppc\n", asm_out_file);
+ }
+#endif
}
\f
SOFT_FLOAT_CPUS = e300c2 401 403 405 440 464 476 ec603e 801 821 823 860
MULTILIB_MATCHES_FLOAT = $(foreach cpu, $(SOFT_FLOAT_CPUS), msoft-float=mcpu?$(cpu))
-
-# Build the libraries for both hard and soft floating point by default
-
-MULTILIB_OPTIONS = msoft-float
-MULTILIB_DIRNAMES = soft-float
-MULTILIB_MATCHES = ${MULTILIB_MATCHES_FLOAT}
# do not define the multiarch name if configured for a soft-float cpu
# or soft-float.
ifeq (,$(filter $(with_cpu),$(SOFT_FLOAT_CPUS))$(findstring soft,$(with_float)))
+ifneq (,$(findstring powerpc64,$(target)))
+MULTILIB_OSDIRNAMES := .=../lib64$(call if_multiarch,:powerpc64-linux-gnu)
+else
ifneq (,$(findstring spe,$(target)))
-MULTIARCH_DIRNAME = powerpc-linux-gnuspe$(if $(findstring 8548,$(with_cpu)),,v1)
+MULTIARCH_DIRNAME := powerpc-linux-gnuspe$(if $(findstring 8548,$(with_cpu)),,v1)
else
-MULTIARCH_DIRNAME = powerpc-linux-gnu
+MULTIARCH_DIRNAME := powerpc-linux-gnu
+endif
+endif
+ifneq (,$(findstring powerpcle,$(target)))
+MULTIARCH_DIRNAME := $(subst -linux,le-linux,$(MULTIARCH_DIRNAME))
+endif
+ifneq (,$(findstring powerpc64le,$(target)))
+MULTILIB_OSDIRNAMES := $(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))
endif
endif
bytes on a z10 (or higher) CPU. */
#define PREDICT_DISTANCE (TARGET_Z10 ? 384 : 2048)
-static const int s390_hotpatch_trampoline_halfwords_default = 12;
-static const int s390_hotpatch_trampoline_halfwords_max = 1000000;
-static int s390_hotpatch_trampoline_halfwords = -1;
-
-/* Return the argument of the given hotpatch attribute or the default value if
- no argument is present. */
-
-static inline int
-get_hotpatch_attribute (tree hotpatch_attr)
-{
- const_tree args;
-
- args = TREE_VALUE (hotpatch_attr);
-
- return (args) ?
- TREE_INT_CST_LOW (TREE_VALUE (args)):
- s390_hotpatch_trampoline_halfwords_default;
-}
+static const int s390_hotpatch_hw_max = 1000000;
+static int s390_hotpatch_hw_before_label = 0;
+static int s390_hotpatch_hw_after_label = 0;
/* Check whether the hotpatch attribute is applied to a function and, if it has
an argument, the argument is valid. */
s390_handle_hotpatch_attribute (tree *node, tree name, tree args,
int flags ATTRIBUTE_UNUSED, bool *no_add_attrs)
{
+ tree expr;
+ tree expr2;
+ int err;
+
if (TREE_CODE (*node) != FUNCTION_DECL)
{
warning (OPT_Wattributes, "%qE attribute only applies to functions",
name);
*no_add_attrs = true;
}
- else if (args)
+ if (args != NULL && TREE_CHAIN (args) != NULL)
+ {
+ expr = TREE_VALUE (args);
+ expr2 = TREE_VALUE (TREE_CHAIN (args));
+ }
+ if (args == NULL || TREE_CHAIN (args) == NULL)
+ err = 1;
+ else if (TREE_CODE (expr) != INTEGER_CST
+ || !INTEGRAL_TYPE_P (TREE_TYPE (expr))
+ || TREE_INT_CST_HIGH (expr) != 0
+ || TREE_INT_CST_LOW (expr) > (unsigned int)s390_hotpatch_hw_max)
+ err = 1;
+ else if (TREE_CODE (expr2) != INTEGER_CST
+ || !INTEGRAL_TYPE_P (TREE_TYPE (expr2))
+ || TREE_INT_CST_HIGH (expr2) != 0
+ || TREE_INT_CST_LOW (expr2) > (unsigned int)s390_hotpatch_hw_max)
+ err = 1;
+ else
+ err = 0;
+ if (err)
{
- tree expr = TREE_VALUE (args);
-
- if (TREE_CODE (expr) != INTEGER_CST
- || !INTEGRAL_TYPE_P (TREE_TYPE (expr))
- || TREE_INT_CST_HIGH (expr) != 0
- || TREE_INT_CST_LOW (expr) > (unsigned int)
- s390_hotpatch_trampoline_halfwords_max)
- {
- error ("requested %qE attribute is not a non-negative integer"
- " constant or too large (max. %d)", name,
- s390_hotpatch_trampoline_halfwords_max);
- *no_add_attrs = true;
- }
+ error ("requested %qE attribute is not a comma separated pair of"
+ " non-negative integer constants or too large (max. %d)", name,
+ s390_hotpatch_hw_max);
+ *no_add_attrs = true;
}
return NULL_TREE;
}
static const struct attribute_spec s390_attribute_table[] = {
- { "hotpatch", 0, 1, true, false, false, s390_handle_hotpatch_attribute, false
+ { "hotpatch", 2, 2, true, false, false, s390_handle_hotpatch_attribute, false
},
/* End element. */
{ NULL, 0, 0, false, false, false, NULL, false }
gcc_unreachable ();
}
-/* Returns -1 if the function should not be made hotpatchable. Otherwise it
- returns a number >= 0 that is the desired size of the hotpatch trampoline
- in halfwords. */
+/* Returns false if the function should not be made hotpatchable.
+ Otherwise it assigns the number of NOP halfwords to be emitted
+ before and after the function label to hw_before and hw_after.
+ Both must not be NULL. */
-static int s390_function_num_hotpatch_trampoline_halfwords (tree decl,
- bool do_warn)
+static bool
+s390_function_num_hotpatch_hw (tree decl,
+ int *hw_before,
+ int *hw_after)
{
tree attr;
- if (DECL_DECLARED_INLINE_P (decl)
- || DECL_ARTIFICIAL (decl)
- || MAIN_NAME_P (DECL_NAME (decl)))
+ *hw_before = 0;
+ *hw_after = 0;
+
+ attr = lookup_attribute ("hotpatch", DECL_ATTRIBUTES (decl));
+
+ /* Handle the arguments of the hotpatch attribute. The values
+ specified via attribute might override the cmdline argument
+ values. */
+ if (attr)
{
- /* - Explicitly inlined functions cannot be hotpatched.
- - Artificial functions need not be hotpatched.
- - Making the main function hotpatchable is useless. */
- return -1;
+ tree args = TREE_VALUE (attr);
+
+ *hw_before = TREE_INT_CST_LOW (TREE_VALUE (args));
+ *hw_after = TREE_INT_CST_LOW (TREE_VALUE (TREE_CHAIN (args)));
}
- attr = lookup_attribute ("hotpatch", DECL_ATTRIBUTES (decl));
- if (attr || s390_hotpatch_trampoline_halfwords >= 0)
+ else
{
- if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (decl)))
- {
- if (do_warn)
- warning (OPT_Wattributes, "function %qE with the %qs attribute"
- " is not hotpatchable", DECL_NAME (decl), "always_inline");
- return -1;
- }
- else
- {
- return (attr) ?
- get_hotpatch_attribute (attr) : s390_hotpatch_trampoline_halfwords;
- }
+ /* Use the values specified by the cmdline arguments. */
+ *hw_before = s390_hotpatch_hw_before_label;
+ *hw_after = s390_hotpatch_hw_after_label;
}
- return -1;
-}
-
-/* Hook to determine if one function can safely inline another. */
-
-static bool
-s390_can_inline_p (tree caller, tree callee)
-{
- if (s390_function_num_hotpatch_trampoline_halfwords (callee, false) >= 0)
+ if (*hw_before == 0 && *hw_after == 0)
return false;
- return default_target_can_inline_p (caller, callee);
+ if (decl_function_context (decl) != NULL_TREE)
+ {
+ warning_at (DECL_SOURCE_LOCATION (decl), OPT_mhotpatch_,
+ "hotpatching is not compatible with nested functions");
+ return false;
+ }
+
+ return true;
}
/* Write the extra assembler code needed to declare a function properly. */
s390_asm_output_function_label (FILE *asm_out_file, const char *fname,
tree decl)
{
- int hotpatch_trampoline_halfwords = -1;
+ int hw_before, hw_after;
+ bool hotpatch_p = (decl
+ ? s390_function_num_hotpatch_hw (decl,
+ &hw_before, &hw_after)
+ : false);
- if (decl)
- {
- hotpatch_trampoline_halfwords =
- s390_function_num_hotpatch_trampoline_halfwords (decl, true);
- if (hotpatch_trampoline_halfwords >= 0
- && decl_function_context (decl) != NULL_TREE)
- {
- warning_at (DECL_SOURCE_LOCATION (decl), OPT_mhotpatch,
- "hotpatching is not compatible with nested functions");
- hotpatch_trampoline_halfwords = -1;
- }
- }
-
- if (hotpatch_trampoline_halfwords > 0)
+ if (hotpatch_p)
{
int i;
/* Add a trampoline code area before the function label and initialize it
with two-byte nop instructions. This area can be overwritten with code
that jumps to a patched version of the function. */
- for (i = 0; i < hotpatch_trampoline_halfwords; i++)
+ for (i = 0; i < hw_before; i++)
asm_fprintf (asm_out_file, "\tnopr\t%%r7\n");
/* Note: The function label must be aligned so that (a) the bytes of the
following nop do not cross a cacheline boundary, and (b) a jump address
ASM_OUTPUT_LABEL (asm_out_file, fname);
- /* Output a four-byte nop if hotpatching is enabled. This can be overwritten
- atomically with a relative backwards jump to the trampoline area. */
- if (hotpatch_trampoline_halfwords >= 0)
- asm_fprintf (asm_out_file, "\tnop\t0\n");
+ /* Output a series of NOPs after the function label. */
+ if (hotpatch_p)
+ {
+ while (hw_after > 0)
+ {
+ if (hw_after >= 3 && TARGET_CPU_ZARCH)
+ {
+ asm_fprintf (asm_out_file, "\tbrcl\t\t0,0\n");
+ hw_after -= 3;
+ }
+ else if (hw_after >= 2)
+ {
+ gcc_assert (hw_after == 2 || !TARGET_CPU_ZARCH);
+ asm_fprintf (asm_out_file, "\tnop\t0\n");
+ hw_after -= 2;
+ }
+ else
+ {
+ gcc_assert (hw_after == 1);
+ asm_fprintf (asm_out_file, "\tnopr\t%%r7\n");
+ hw_after -= 1;
+ }
+ }
+ }
}
/* Output machine-dependent UNSPECs occurring in address constant X
{
switch (opt->opt_index)
{
- case OPT_mhotpatch:
- s390_hotpatch_trampoline_halfwords = (opt->value) ?
- s390_hotpatch_trampoline_halfwords_default : -1;
- break;
case OPT_mhotpatch_:
{
- int val;
-
- val = integral_argument (opt->arg);
- if (val == -1)
+ int val1;
+ int val2;
+ char s[256];
+ char *t;
+
+ strncpy (s, opt->arg, 256);
+ s[255] = 0;
+ t = strchr (s, ',');
+ if (t != NULL)
+ {
+ *t = 0;
+ t++;
+ val1 = integral_argument (s);
+ val2 = integral_argument (t);
+ }
+ else
+ {
+ val1 = -1;
+ val2 = -1;
+ }
+ if (val1 == -1 || val2 == -1)
{
/* argument is not a plain number */
- error ("argument to %qs should be a non-negative integer",
- "-mhotpatch=");
+ error ("arguments to %qs should be non-negative integers",
+ "-mhotpatch=n,m");
break;
}
- else if (val > s390_hotpatch_trampoline_halfwords_max)
+ else if (val1 > s390_hotpatch_hw_max
+ || val2 > s390_hotpatch_hw_max)
{
error ("argument to %qs is too large (max. %d)",
- "-mhotpatch=", s390_hotpatch_trampoline_halfwords_max);
+ "-mhotpatch=n,m", s390_hotpatch_hw_max);
break;
}
- s390_hotpatch_trampoline_halfwords = val;
+ s390_hotpatch_hw_before_label = val1;
+ s390_hotpatch_hw_after_label = val2;
break;
}
default:
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE s390_attribute_table
-#undef TARGET_CAN_INLINE_P
-#define TARGET_CAN_INLINE_P s390_can_inline_p
+#undef TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P
+#define TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P hook_bool_const_tree_true
#undef TARGET_SET_UP_BY_PROLOGUE
#define TARGET_SET_UP_BY_PROLOGUE s300_set_up_by_prologue
Target Report RejectNegative Negative(msoft-float) InverseMask(SOFT_FLOAT, HARD_FLOAT)
Enable hardware floating point
-mhotpatch
-Target Report Var(s390_deferred_options) Defer
-Prepend the function label with 12 two-byte Nop instructions, and add a four byte Nop instruction after the label for hotpatching.
-
mhotpatch=
Target RejectNegative Report Joined Var(s390_deferred_options) Defer
-Prepend the function label with the given number of two-byte Nop instructions, and add a four byte Nop instruction after the label for hotpatching.
+Takes two non-negative integer numbers separated by a comma.
+Prepend the function label with the number of two-byte Nop
+instructions indicated by the first. Append Nop instructions
+covering the number of halfwords indicated by the second after the
+label. Nop instructions of the largest possible size are used
+(six, four or two bytes), beginning with the largest possible
+size. Using 0 for both values disables hotpatching.
mlong-double-128
Target Report RejectNegative Negative(mlong-double-64) Mask(LONG_DOUBLE_128)
signed int, enum machine_mode);
extern rtx sh_dwarf_register_span (rtx);
-extern rtx replace_n_hard_rtx (rtx, rtx *, int , int);
extern int shmedia_cleanup_truncate (rtx *, void *);
extern bool sh_contains_memref_p (rtx);
}
}
-/* Replace any occurrence of FROM(n) in X with TO(n). The function does
- not enter into CONST_DOUBLE for the replace.
-
- Note that copying is not done so X must not be shared unless all copies
- are to be modified.
-
- This is like replace_rtx, except that we operate on N_REPLACEMENTS
- replacements simultaneously - FROM(n) is replacements[n*2] and to(n) is
- replacements[n*2+1] - and that we take mode changes into account.
-
- If a replacement is ambiguous, return NULL_RTX.
-
- If MODIFY is zero, don't modify any rtl in place,
- just return zero or nonzero for failure / success. */
-rtx
-replace_n_hard_rtx (rtx x, rtx *replacements, int n_replacements, int modify)
-{
- int i, j;
- const char *fmt;
-
- /* The following prevents loops occurrence when we change MEM in
- CONST_DOUBLE onto the same CONST_DOUBLE. */
- if (x != NULL_RTX && GET_CODE (x) == CONST_DOUBLE)
- return x;
-
- for (i = n_replacements - 1; i >= 0 ; i--)
- if (x == replacements[i*2] && GET_MODE (x) == GET_MODE (replacements[i*2+1]))
- return replacements[i*2+1];
-
- /* Allow this function to make replacements in EXPR_LISTs. */
- if (x == NULL_RTX)
- return NULL_RTX;
-
- if (GET_CODE (x) == SUBREG)
- {
- rtx new_rtx = replace_n_hard_rtx (SUBREG_REG (x), replacements,
- n_replacements, modify);
-
- if (CONST_INT_P (new_rtx))
- {
- x = simplify_subreg (GET_MODE (x), new_rtx,
- GET_MODE (SUBREG_REG (x)),
- SUBREG_BYTE (x));
- if (! x)
- abort ();
- }
- else if (modify)
- SUBREG_REG (x) = new_rtx;
-
- return x;
- }
- else if (REG_P (x))
- {
- unsigned regno = REGNO (x);
- unsigned nregs = (regno < FIRST_PSEUDO_REGISTER
- ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
- rtx result = NULL_RTX;
-
- for (i = n_replacements - 1; i >= 0; i--)
- {
- rtx from = replacements[i*2];
- rtx to = replacements[i*2+1];
- unsigned from_regno, from_nregs, to_regno, new_regno;
-
- if (!REG_P (from))
- continue;
- from_regno = REGNO (from);
- from_nregs = (from_regno < FIRST_PSEUDO_REGISTER
- ? HARD_REGNO_NREGS (from_regno, GET_MODE (from)) : 1);
- if (regno < from_regno + from_nregs && regno + nregs > from_regno)
- {
- if (regno < from_regno
- || regno + nregs > from_regno + nregs
- || !REG_P (to)
- || result)
- return NULL_RTX;
- to_regno = REGNO (to);
- if (to_regno < FIRST_PSEUDO_REGISTER)
- {
- new_regno = regno + to_regno - from_regno;
- if ((unsigned) HARD_REGNO_NREGS (new_regno, GET_MODE (x))
- != nregs)
- return NULL_RTX;
- result = gen_rtx_REG (GET_MODE (x), new_regno);
- }
- else if (GET_MODE (x) <= GET_MODE (to))
- result = gen_lowpart_common (GET_MODE (x), to);
- else
- result = gen_lowpart_SUBREG (GET_MODE (x), to);
- }
- }
- return result ? result : x;
- }
- else if (GET_CODE (x) == ZERO_EXTEND)
- {
- rtx new_rtx = replace_n_hard_rtx (XEXP (x, 0), replacements,
- n_replacements, modify);
-
- if (CONST_INT_P (new_rtx))
- {
- x = simplify_unary_operation (ZERO_EXTEND, GET_MODE (x),
- new_rtx, GET_MODE (XEXP (x, 0)));
- if (! x)
- abort ();
- }
- else if (modify)
- XEXP (x, 0) = new_rtx;
-
- return x;
- }
-
- fmt = GET_RTX_FORMAT (GET_CODE (x));
- for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
- {
- rtx new_rtx;
-
- if (fmt[i] == 'e')
- {
- new_rtx = replace_n_hard_rtx (XEXP (x, i), replacements,
- n_replacements, modify);
- if (!new_rtx)
- return NULL_RTX;
- if (modify)
- XEXP (x, i) = new_rtx;
- }
- else if (fmt[i] == 'E')
- for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- {
- new_rtx = replace_n_hard_rtx (XVECEXP (x, i, j), replacements,
- n_replacements, modify);
- if (!new_rtx)
- return NULL_RTX;
- if (modify)
- XVECEXP (x, i, j) = new_rtx;
- }
- }
-
- return x;
-}
-
rtx
sh_gen_truncate (enum machine_mode mode, rtx x, int need_sign_ext)
{
"tst #255,%0"
[(set_attr "type" "mt_group")])
-;; This pattern might be risky because it also tests the upper bits and not
-;; only the subreg. However, it seems that combine will get to this only
-;; when testing sign/zero extended values. In this case the extended upper
-;; bits do not matter.
-(define_insn "*tst<mode>_t_zero"
- [(set (reg:SI T_REG)
- (eq:SI
- (subreg:QIHI
- (and:SI (match_operand:SI 0 "arith_reg_operand" "%r")
- (match_operand:SI 1 "arith_reg_operand" "r")) <lowpart_le>)
- (const_int 0)))]
- "TARGET_SH1 && TARGET_LITTLE_ENDIAN"
- "tst %0,%1"
- [(set_attr "type" "mt_group")])
-
-(define_insn "*tst<mode>_t_zero"
- [(set (reg:SI T_REG)
- (eq:SI
- (subreg:QIHI
- (and:SI (match_operand:SI 0 "arith_reg_operand" "%r")
- (match_operand:SI 1 "arith_reg_operand" "r")) <lowpart_be>)
- (const_int 0)))]
- "TARGET_SH1 && TARGET_BIG_ENDIAN"
- "tst %0,%1"
- [(set_attr "type" "mt_group")])
-
;; Extract LSB, negate and store in T bit.
(define_insn "tstsi_t_and_not"
[(set (reg:SI T_REG)
replace_rtx (operands[4], operands[0], operands[1]);
})
-(define_peephole2
- [(set (match_operand 0 "any_register_operand" "")
- (match_operand 1 "any_register_operand" ""))
- (set (match_operand 2 "any_register_operand" "") (match_operand 3 "" ""))
- (set (match_operand 4 "" "") (match_operand 5 "" ""))]
- "(HARD_REGNO_NREGS (REGNO (operands[0]), GET_MODE (operands[2]))
- <= HARD_REGNO_NREGS (REGNO (operands[0]), GET_MODE (operands[0])))
- && peep2_reg_dead_p (3, operands[0]) && peep2_reg_dead_p (3, operands[2])
- && ! FIND_REG_INC_NOTE (peep2_next_insn (2), operands[0])
- && ! FIND_REG_INC_NOTE (peep2_next_insn (2), operands[2])
- && ! reg_overlap_mentioned_p (operands[0], operands[3])
- && ! reg_overlap_mentioned_p (operands[2], operands[0])
- && ! reg_overlap_mentioned_p (operands[0], operands[1])
- && (REGNO_REG_CLASS (REGNO (operands[0]))
- == REGNO_REG_CLASS (REGNO (operands[2])))
- && (REGNO_REG_CLASS (REGNO (operands[1]))
- == REGNO_REG_CLASS (REGNO (operands[0])))"
- [(set (match_dup 0) (match_dup 3))
- (set (match_dup 4) (match_dup 5))]
-{
- rtx set1, set2, insn2;
- rtx replacements[4];
-
- /* We want to replace occurrences of operands[0] with operands[1] and
- operands[2] with operands[0] in operands[4]/operands[5].
- Doing just two replace_rtx calls naively would result in the second
- replacement undoing all that the first did if operands[1] and operands[2]
- are identical, so we must do this simultaneously. */
- replacements[0] = operands[0];
- replacements[1] = operands[1];
- replacements[2] = operands[2];
- replacements[3] = operands[0];
- if (!replace_n_hard_rtx (operands[5], replacements, 2, 0)
- || !replace_n_hard_rtx (operands[4], replacements, 2, 0)
- || !replace_n_hard_rtx (operands[2], replacements, 2, 0))
- FAIL;
-
- operands[5] = replace_n_hard_rtx (operands[5], replacements, 2, 1);
- replace_n_hard_rtx (operands[4], replacements, 2, 1);
- operands[2] = replace_n_hard_rtx (operands[2], replacements, 2, 1);
- /* The operands array is aliased to recog_data.operand, which gets
- clobbered by extract_insn, so finish with it now. */
- set1 = gen_rtx_SET (VOIDmode, operands[2], operands[3]);
- set2 = gen_rtx_SET (VOIDmode, operands[4], operands[5]);
- /* ??? The last insn might be a jump insn, but the generic peephole2 code
- always uses emit_insn. */
- /* Check that we don't violate matching constraints or earlyclobbers. */
- extract_insn (emit_insn (set1));
- if (! constrain_operands (1))
- goto failure;
- insn2 = emit (set2);
- if (GET_CODE (insn2) == BARRIER)
- goto failure;
- extract_insn (insn2);
- if (! constrain_operands (1))
- {
- rtx tmp;
- failure:
- tmp = replacements[0];
- replacements[0] = replacements[1];
- replacements[1] = tmp;
- tmp = replacements[2];
- replacements[2] = replacements[3];
- replacements[3] = tmp;
- replace_n_hard_rtx (SET_DEST (set1), replacements, 2, 1);
- replace_n_hard_rtx (SET_DEST (set2), replacements, 2, 1);
- replace_n_hard_rtx (SET_SRC (set2), replacements, 2, 1);
- FAIL;
- }
- DONE;
-})
-
;; The register allocator is rather clumsy in handling multi-way conditional
;; moves, so allow the combiner to make them, and we split them up after
;; reload. */
(define_insn "swapbsi2"
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
(ior:SI (and:SI (match_operand:SI 1 "arith_reg_operand" "r")
- (const_int 4294901760))
+ (const_int -65536)) ;; 0xFFFF0000
(ior:SI (and:SI (ashift:SI (match_dup 1) (const_int 8))
(const_int 65280))
(and:SI (ashiftrt:SI (match_dup 1) (const_int 8))
(define_peephole2
[(set (match_operand:SI 0 "arith_reg_dest" "")
(ior:SI (and:SI (match_operand:SI 1 "arith_reg_operand" "")
- (const_int 4294901760))
+ (const_int -65536)) ;; 0xFFFF0000
(ior:SI (and:SI (ashift:SI (match_dup 1) (const_int 8))
(const_int 65280))
(and:SI (ashiftrt:SI (match_dup 1) (const_int 8))
"TARGET_SH1 && peep2_reg_dead_p (2, operands[0])"
[(set (match_dup 2)
(ior:SI (and:SI (match_operand:SI 1 "arith_reg_operand" "")
- (const_int 4294901760))
+ (const_int -65536)) ;; 0xFFFF0000
(ior:SI (and:SI (ashift:SI (match_dup 1) (const_int 8))
(const_int 65280))
(and:SI (ashiftrt:SI (match_dup 1) (const_int 8))
""
{
rtx mem;
+ bool stack_chk_guard_p = false;
operands[2] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
operands[3] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
+ if (!TARGET_SHMEDIA
+ && flag_stack_protect
+ && GET_CODE (operands[1]) == CONST
+ && GET_CODE (XEXP (operands[1], 0)) == UNSPEC
+ && GET_CODE (XVECEXP (XEXP (operands[1], 0), 0, 0)) == SYMBOL_REF
+ && strcmp (XSTR (XVECEXP (XEXP (operands[1], 0), 0, 0), 0),
+ "__stack_chk_guard") == 0)
+ stack_chk_guard_p = true;
+
+ /* Use R0 to avoid long R0 liveness which stack-protector tends to
+ produce. */
+ if (stack_chk_guard_p && ! reload_in_progress && ! reload_completed)
+ operands[2] = gen_rtx_REG (Pmode, R0_REG);
+
if (TARGET_SHMEDIA)
{
rtx reg = operands[2];
insn to avoid combining (set A (plus rX r12)) and (set op0 (mem A))
when rX is a GOT address for the guard symbol. Ugly but doesn't
matter because this is a rare situation. */
- if (!TARGET_SHMEDIA
- && flag_stack_protect
- && GET_CODE (operands[1]) == CONST
- && GET_CODE (XEXP (operands[1], 0)) == UNSPEC
- && GET_CODE (XVECEXP (XEXP (operands[1], 0), 0, 0)) == SYMBOL_REF
- && strcmp (XSTR (XVECEXP (XEXP (operands[1], 0), 0, 0), 0),
- "__stack_chk_guard") == 0)
+ if (stack_chk_guard_p)
emit_insn (gen_chk_guard_add (operands[3], operands[2]));
else
emit_move_insn (operands[3], gen_rtx_PLUS (Pmode, operands[2],
fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .module support" >&5
+$as_echo_n "checking assembler for .module support... " >&6; }
+if test "${gcc_cv_as_mips_dot_module+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ gcc_cv_as_mips_dot_module=no
+ if test x$gcc_cv_as != x; then
+ $as_echo '.module mips2
+ .module fp=xx' > conftest.s
+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -32 -o conftest.o conftest.s >&5'
+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }
+ then
+ gcc_cv_as_mips_dot_module=yes
+ else
+ echo "configure: failed program was" >&5
+ cat conftest.s >&5
+ fi
+ rm -f conftest.o conftest.s
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_mips_dot_module" >&5
+$as_echo "$gcc_cv_as_mips_dot_module" >&6; }
+if test $gcc_cv_as_mips_dot_module = yes; then
+
+$as_echo "#define HAVE_AS_DOT_MODULE 1" >>confdefs.h
+
+fi
+
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .micromips support" >&5
$as_echo_n "checking assembler for .micromips support... " >&6; }
if test "${gcc_cv_as_micromips_support+set}" = set; then :
[AC_DEFINE(HAVE_AS_GNU_ATTRIBUTE, 1,
[Define if your assembler supports .gnu_attribute.])])
+ gcc_GAS_CHECK_FEATURE([.module support],
+ gcc_cv_as_mips_dot_module,,[-32],
+ [.module mips2
+ .module fp=xx],,
+ [AC_DEFINE(HAVE_AS_DOT_MODULE, 1,
+ [Define if your assembler supports .module.])])
+
gcc_GAS_CHECK_FEATURE([.micromips support],
gcc_cv_as_micromips_support,,[--fatal-warnings],
[.set micromips],,
+2015-03-04 Jason Merrill <jason@redhat.com>
+
+ PR c++/65209
+ PR c++/65309
+ * decl2.c (constrain_visibility_for_template): Handle reference
+ arguments.
+
+2015-02-25 Jason Merrill <jason@redhat.com>
+
+ PR c++/62255
+ * pt.c (instantiate_decl): Handle recursive instantiation of
+ static data member.
+
+ * decl.c (begin_destructor_body): Condition clobber on
+ -flifetime-dse.
+
+2015-02-13 Jason Merrill <jason@redhat.com>
+
+ PR c++/62017
+ * decl.c (begin_destructor_body): Only clobber the as-base part of
+ *this.
+
+2015-02-11 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2015-02-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/64824
+ PR c/64868
+ * parser.c (cp_parser_omp_atomic): Handle RDIV_EXPR.
+
2015-02-04 Ville Voutilainen <ville.voutilainen@gmail.com>
PR c++/64901
initialize_vtbl_ptrs (current_class_ptr);
finish_compound_stmt (compound_stmt);
- /* Insert a cleanup to let the back end know that the object is dead
- when we exit the destructor, either normally or via exception. */
- tree clobber = build_constructor (current_class_type, NULL);
- TREE_THIS_VOLATILE (clobber) = true;
- tree exprstmt = build2 (MODIFY_EXPR, current_class_type,
- current_class_ref, clobber);
- finish_decl_cleanup (NULL_TREE, exprstmt);
+ if (flag_lifetime_dse)
+ {
+ /* Insert a cleanup to let the back end know that the object is dead
+ when we exit the destructor, either normally or via exception. */
+ tree btype = CLASSTYPE_AS_BASE (current_class_type);
+ tree clobber = build_constructor (btype, NULL);
+ TREE_THIS_VOLATILE (clobber) = true;
+ tree bref = build_nop (build_reference_type (btype),
+ current_class_ptr);
+ bref = convert_from_reference (bref);
+ tree exprstmt = build2 (MODIFY_EXPR, btype, bref, clobber);
+ finish_decl_cleanup (NULL_TREE, exprstmt);
+ }
/* And insert cleanups for our bases and members so that they
will be properly destroyed if we throw. */
tree arg = TREE_VEC_ELT (args, i-1);
if (TYPE_P (arg))
vis = type_visibility (arg);
- else if (TREE_TYPE (arg) && POINTER_TYPE_P (TREE_TYPE (arg)))
+ else
{
- STRIP_NOPS (arg);
+ if (REFERENCE_REF_P (arg))
+ arg = TREE_OPERAND (arg, 0);
+ if (TREE_TYPE (arg))
+ STRIP_NOPS (arg);
if (TREE_CODE (arg) == ADDR_EXPR)
arg = TREE_OPERAND (arg, 0);
if (VAR_OR_FUNCTION_DECL_P (arg))
{
case MULT_EXPR:
case TRUNC_DIV_EXPR:
+ case RDIV_EXPR:
case PLUS_EXPR:
case MINUS_EXPR:
case LSHIFT_EXPR:
args,
tf_warning_or_error, NULL_TREE,
/*integral_constant_expression_p=*/false);
- /* Make sure the initializer is still constant, in case of
- circular dependency (template/instantiate6.C). */
- const_init
- = DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (code_pattern);
- cp_finish_decl (d, init, /*init_const_expr_p=*/const_init,
- /*asmspec_tree=*/NULL_TREE,
- LOOKUP_ONLYCONVERTING);
+ /* If instantiating the initializer involved instantiating this
+ again, don't call cp_finish_decl twice. */
+ if (!DECL_INITIAL (d))
+ {
+ /* Make sure the initializer is still constant, in case of
+ circular dependency (template/instantiate6.C). */
+ const_init
+ = DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (code_pattern);
+ cp_finish_decl (d, init, /*init_const_expr_p=*/const_init,
+ /*asmspec_tree=*/NULL_TREE,
+ LOOKUP_ONLYCONVERTING);
+ }
pop_nested_class ();
pop_nested_namespace (ns);
}
prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2
and newer.
-@item hotpatch [(@var{prologue-halfwords})]
+@item hotpatch (@var{halfwords-before-function-label},@var{halfwords-after-function-label})
@cindex @code{hotpatch} attribute
On S/390 System z targets, you can use this function attribute to
-make GCC generate a ``hot-patching'' function prologue. The
-@code{hotpatch} has no effect on funtions that are explicitly
-inline. If the @option{-mhotpatch} or @option{-mno-hotpatch}
-command-line option is used at the same time, the @code{hotpatch}
-attribute takes precedence. If an argument is given, the maximum
-allowed value is 1000000.
+make GCC generate a ``hot-patching'' function prologue. If the
+@option{-mhotpatch=} command-line option is used at the same time,
+the @code{hotpatch} attribute takes precedence. The first of the
+two arguments specifies the number of halfwords to be added before
+the function label. A second argument can be used to specify the
+number of halfwords to be added after the function label. For
+both arguments the maximum allowed value is 1000000.
+
+If both ar guments are zero, hotpatching is disabled.
@item naked
@cindex function without a prologue/epilogue code
-@c Copyright (C) 1988-2014 Free Software Foundation, Inc.
+@c Copyright (C) 1988-2015 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
-m64 -m31 -mdebug -mno-debug -mesa -mzarch @gol
-mtpf-trace -mno-tpf-trace -mfused-madd -mno-fused-madd @gol
-mwarn-framesize -mwarn-dynamicstack -mstack-size -mstack-guard @gol
--mhotpatch[=@var{halfwords}] -mno-hotpatch}
+-mhotpatch=@var{halfwords},@var{halfwords}}
@emph{Score Options}
@gccoptlist{-meb -mel @gol
Enabled for Alpha, AArch64 and x86 at levels @option{-O2},
@option{-O3}, @option{-Os}.
+@item -fno-lifetime-dse
+@opindex fno-lifetime-dse
+In C++ the value of an object is only affected by changes within its
+lifetime: when the constructor begins, the object has an indeterminate
+value, and any changes during the lifetime of the object are dead when
+the object is destroyed. Normally dead store elimination will take
+advantage of this; if your code relies on the value of the object
+storage persisting beyond the lifetime of the object, you can use this
+flag to disable this optimization.
+
@item -flive-range-shrinkage
@opindex flive-range-shrinkage
Attempt to decrease register pressure through register live range
@samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, @samp{powerpc},
-@samp{powerpc64}, and @samp{rs64}.
+@samp{powerpc64}, @samp{powerpc64le}, and @samp{rs64}.
-@option{-mcpu=powerpc}, and @option{-mcpu=powerpc64} specify pure 32-bit
-PowerPC and 64-bit PowerPC architecture machine
-types, with an appropriate, generic processor model assumed for
-scheduling purposes.
+@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
+@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
+endian), 64-bit big endian PowerPC and 64-bit little endian PowerPC
+architecture machine types, with an appropriate, generic processor
+model assumed for scheduling purposes.
The other options specify a specific processor. Code generated under
those options runs best on that processor, and may not run at all on
at an address aligned to the value given by @var{stack-size}.
The @var{stack-guard} option can only be used in conjunction with @var{stack-size}.
-@item -mhotpatch[=@var{halfwords}]
-@itemx -mno-hotpatch
+@item -mhotpatch=@var{pre-halfwords},@var{post-halfwords}
@opindex mhotpatch
If the hotpatch option is enabled, a ``hot-patching'' function
prologue is generated for all functions in the compilation unit.
The funtion label is prepended with the given number of two-byte
-Nop instructions (@var{halfwords}, maximum 1000000) or 12 Nop
-instructions if no argument is present. Functions with a
-hot-patching prologue are never inlined automatically, and a
-hot-patching prologue is never generated for functions functions
-that are explicitly inline.
+Nop instructions (@var{pre-halfwords}, maximum 1000000). After
+the label, 2 * @var{post-halfwords} bytes are appended, using the
+larges nop like instructions the architecture allows (maximum
+1000000).
+
+If both arguments are zero, hotpatching is disabled.
This option can be overridden for individual functions with the
@code{hotpatch} attribute.
case OPT__sysroot_:
case OPT_nostdinc:
case OPT_nostdinc__:
+ case OPT_fpreprocessed:
+ case OPT_fltrans_output_list_:
+ case OPT_fresolution_:
/* Ignore these. */
continue;
default:
gen_remaining_tmpl_value_param_die_attribute ();
/* Add the name for the main input file now. We delayed this from
- dwarf2out_init to avoid complications with PCH. */
- add_name_attribute (comp_unit_die (), remap_debug_filename (filename));
+ dwarf2out_init to avoid complications with PCH.
+ For LTO produced units use a fixed artificial name to avoid
+ leaking tempfile names into the dwarf. */
+ if (!in_lto_p)
+ add_name_attribute (comp_unit_die (), remap_debug_filename (filename));
+ else
+ add_name_attribute (comp_unit_die (), "<artificial>");
if (!IS_ABSOLUTE_PATH (filename) || targetm.force_at_comp_dir)
add_comp_dir_attribute (comp_unit_die ());
else if (get_AT (comp_unit_die (), DW_AT_comp_dir) == NULL)
/* Don't introduce overflows through reassociation. */
if (!any_overflows
- && ((lit0 && TREE_OVERFLOW (lit0))
- || (minus_lit0 && TREE_OVERFLOW (minus_lit0))))
+ && ((lit0 && TREE_OVERFLOW_P (lit0))
+ || (minus_lit0 && TREE_OVERFLOW_P (minus_lit0))))
return NULL_TREE;
if (minus_lit0)
+2015-03-10 Paul Thomas <pault@gcc.gnu.org>
+
+ Backported from mainline
+ PR fortran/65024
+ * trans-expr.c (gfc_conv_component_ref): If the component
+ backend declaration is missing and the derived type symbol is
+ available in the reference, call gfc_build_derived_type.
+
+2015-02-13 Mikael Morin <mikael@gcc.gnu.org>
+
+ PR fortran/63744
+ * module.c (check_for_ambiguous): Change argument type
+ from gfc_symbol to gfc_symtree. Check local (symtree) name
+ instead of original (symbol) name.
+ (read_module): Update caller.
+
+2015-02-12 Paul Thomas <pault@gcc.gnu.org>
+
+ Backported from mainline
+ 2015-02-12 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/64932
+ * trans-stmt.c (gfc_trans_deallocate): If a component array
+ expression is not a descriptor type and it is a derived type
+ that has allocatable components and is not finalizable, then
+ deallocate the allocatable components.
+
2015-02-03 Steven G. Kargl <kargl@gcc.gnu.org>
* intrinsic.texi (CO_ASSOCIATED): c_prt_1 should be c_ptr_1.
/* It is not quite enough to check for ambiguity in the symbols by
the loaded symbol and the new symbol not being identical. */
static bool
-check_for_ambiguous (gfc_symbol *st_sym, pointer_info *info)
+check_for_ambiguous (gfc_symtree *st, pointer_info *info)
{
gfc_symbol *rsym;
module_locus locus;
symbol_attribute attr;
+ gfc_symbol *st_sym;
- if (gfc_current_ns->proc_name && st_sym->name == gfc_current_ns->proc_name->name)
+ if (gfc_current_ns->proc_name && st->name == gfc_current_ns->proc_name->name)
{
gfc_error ("'%s' of module '%s', imported at %C, is also the name of the "
- "current program unit", st_sym->name, module_name);
+ "current program unit", st->name, module_name);
return true;
}
+ st_sym = st->n.sym;
rsym = info->u.rsym.sym;
if (st_sym == rsym)
return false;
if (st != NULL)
{
/* Check for ambiguous symbols. */
- if (check_for_ambiguous (st->n.sym, info))
+ if (check_for_ambiguous (st, info))
st->ambiguous = 1;
else
info->u.rsym.symtree = st;
c = ref->u.c.component;
- gcc_assert (c->backend_decl);
+ if (c->backend_decl == NULL_TREE
+ && ref->u.c.sym != NULL)
+ gfc_get_derived_type (ref->u.c.sym);
field = c->backend_decl;
- gcc_assert (TREE_CODE (field) == FIELD_DECL);
+ gcc_assert (field && TREE_CODE (field) == FIELD_DECL);
decl = se->expr;
/* Components can correspond to fields of different containing
if (expr->rank || gfc_is_coarray (expr))
{
+ gfc_ref *ref;
+
if (expr->ts.type == BT_DERIVED && expr->ts.u.derived->attr.alloc_comp
&& !gfc_is_finalizable (expr->ts.u.derived, NULL))
{
- gfc_ref *ref;
gfc_ref *last = NULL;
+
for (ref = expr->ref; ref; ref = ref->next)
if (ref->type == REF_COMPONENT)
last = ref;
&& !(!last && expr->symtree->n.sym->attr.pointer))
{
tmp = gfc_deallocate_alloc_comp (expr->ts.u.derived, se.expr,
- expr->rank);
+ expr->rank);
gfc_add_expr_to_block (&se.pre, tmp);
}
}
- tmp = gfc_array_deallocate (se.expr, pstat, errmsg, errlen,
- label_finish, expr);
- gfc_add_expr_to_block (&se.pre, tmp);
+
+ if (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (se.expr)))
+ {
+ tmp = gfc_array_deallocate (se.expr, pstat, errmsg, errlen,
+ label_finish, expr);
+ gfc_add_expr_to_block (&se.pre, tmp);
+ }
+ else if (TREE_CODE (se.expr) == COMPONENT_REF
+ && TREE_CODE (TREE_TYPE (se.expr)) == ARRAY_TYPE
+ && TREE_CODE (TREE_TYPE (TREE_TYPE (se.expr)))
+ == RECORD_TYPE)
+ {
+ /* class.c(finalize_component) generates these, when a
+ finalizable entity has a non-allocatable derived type array
+ component, which has allocatable components. Obtain the
+ derived type of the array and deallocate the allocatable
+ components. */
+ for (ref = expr->ref; ref; ref = ref->next)
+ {
+ if (ref->u.c.component->attr.dimension
+ && ref->u.c.component->ts.type == BT_DERIVED)
+ break;
+ }
+
+ if (ref && ref->u.c.component->ts.u.derived->attr.alloc_comp
+ && !gfc_is_finalizable (ref->u.c.component->ts.u.derived,
+ NULL))
+ {
+ tmp = gfc_deallocate_alloc_comp
+ (ref->u.c.component->ts.u.derived,
+ se.expr, expr->rank);
+ gfc_add_expr_to_block (&se.pre, tmp);
+ }
+ }
+
if (al->expr->ts.type == BT_CLASS)
gfc_reset_vptr (&se.pre, al->expr);
}
/* Parameters and return values of functions of variably modified types
must go to global stream, because they may be used in the type
definition. */
- if (TREE_CODE (t) == PARM_DECL || TREE_CODE (t) == RESULT_DECL)
+ if ((TREE_CODE (t) == PARM_DECL || TREE_CODE (t) == RESULT_DECL)
+ && DECL_CONTEXT (t))
return variably_modified_type_p (TREE_TYPE (DECL_CONTEXT (t)), NULL_TREE);
+ /* IMPORTED_DECL is put into BLOCK and thus it never can be shared. */
+ else if (TREE_CODE (t) == IMPORTED_DECL)
+ return false;
else if (((TREE_CODE (t) == VAR_DECL && !TREE_STATIC (t))
|| TREE_CODE (t) == TYPE_DECL
|| TREE_CODE (t) == CONST_DECL
layout_type (type);
}
- TREE_TYPE (ctx->receiver_decl) = build_pointer_type (type);
+ TREE_TYPE (ctx->receiver_decl)
+ = build_qualified_type (build_reference_type (type), TYPE_QUAL_RESTRICT);
}
/* Instantiate decls as necessary in CTX to satisfy the data sharing
DECL_VISIBILITY_SPECIFIED (decl) = 0;
DECL_VISIBILITY (decl) = VISIBILITY_DEFAULT;
TREE_PUBLIC (decl) = 0;
+ DECL_DLLIMPORT_P (decl) = 0;
if (!DECL_RTL_SET_P (decl))
return;
/* Otherwise create a new one. */
new_decl = copy_node (node->decl);
+ DECL_DLLIMPORT_P (new_decl) = 0;
DECL_NAME (new_decl) = clone_function_name (node->decl, "localalias");
if (TREE_CODE (new_decl) == FUNCTION_DECL)
DECL_STRUCT_FUNCTION (new_decl) = NULL;
+2015-03-10 Paul Thomas <pault@gcc.gnu.org>
+
+ Backported from mainline
+ PR fortran/65024
+ * gfortran.dg/unlimited_polymorphic_23.f90: New test
+
+2015-03-10 Martin Sebor <msebor@redhat.com>
+
+ PR testsuite/63175
+ * gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c (main1): Move
+ checking of results into main to prevent it from getting optimized
+ away.
+ * gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c: New test.
+
+2015-03-10 Yvan Roux <yvan.roux@linaro.org>
+
+ Backport from trunk r220489.
+ 2015-02-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR ipa/64896
+ * g++.dg/ipa/pr64896.C: New test
+
+2015-03-10 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/53988
+ * gcc.target/sh/pr53988.c: Mark tests as xfail.
+
+2015-03-06 Eric Botcazou <ebotcazou@adacore.com>
+
+ * g++.dg/other/dump-ada-spec-3.C: Remove include and adjust.
+
+2015-03-05 Eric Botcazou <ebotcazou@adacore.com>
+
+ * g++.dg/other/dump-ada-spec-3.C: New test.
+
+2015-03-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ Backport from mainline
+ 2014-11-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ PR target/59593
+ * gcc.target/arm/constant-pool.c: New test.
+
+2015-03-03 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/64331
+ * gcc.target/avr/torture/pr64331.c: New test.
+
+2015-03-03 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ Backport from mainline
+ 2015-01-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ PR target/64453
+ * gcc.target/arm/pr64453.c: New.
+
+2015-02-27 Pat Haugen <pthaugen@us.ibm.com>
+
+ * gcc.dg/vect/pr59354.c: Move vector producing code to separate function.
+
+2015-02-27 Marek Polacek <polacek@redhat.com>
+
+ Backported from mainline
+ 2015-02-27 Marek Polacek <polacek@redhat.com>
+
+ PR c/65228
+ * gcc.dg/pr65228.c: New test.
+
+2015-02-27 Richard Biener <rguenther@suse.de>
+
+ PR lto/65193
+ * g++.dg/lto/pr65193_0.C: New testcase.
+
+2015-02-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ Backport from mainline
+ 2015-02-25 Peter Bergner <bergner@vnet.ibm.com>
+
+ * gcc.target/powerpc/htm-builtin-1.c (dg-do) Change to assemble.
+ (dg-options): Add -save-temps.
+ (dg-final): Add cleanup-saved-temps.
+
+ 2015-02-25 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
+
+ * gcc.target/powerpc/htm-builtin-1.c: Fix tcheck expect value.
+
+2015-02-25 Kai Tietz <ktietz@redhat.com>
+
+ Backported from mainline
+ PR tree-optimization/61917
+ * gcc.dg/vect/vect-pr61917.c: New file.
+
+2015-02-23 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline
+ 2015-02-23 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/65163
+ * gcc.c-torture/compile/pr65163.c: New.
+
+2015-02-23 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2014-11-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/61634
+ * gcc.dg/vect/pr61634.c: New testcase.
+
+ 2015-01-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/59354
+ * gcc.dg/vect/pr59354.c: New testcase.
+
+ 2015-02-10 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/64909
+ * gcc.dg/vect/costmodel/x86_64/costmodel-pr64909.c: New testcase.
+
+2015-02-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ Backport from mainline
+ 2015-02-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+ * gcc.target/s390/hotpatch-1.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-10.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-11.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-12.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-13.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-14.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-15.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-16.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-17.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-18.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-19.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-2.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-20.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-3.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-4.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-5.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-6.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-7.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-8.c: Remove --save-temps option.
+ * gcc.target/s390/hotpatch-9.c: Remove --save-temps option.
+ * gcc.target/s390/htm-nofloat-1.c: Cleanup --save-temps files.
+
+2015-02-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ Backport from mainline
+ 2015-02-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+ * gcc.target/s390/hotpatch-8.c: Add -march=g5.
+ * gcc.target/s390/hotpatch-9.c: Add -march=g5.
+ * gcc.target/s390/hotpatch-compile-1.c: Fix error message.
+ * gcc.target/s390/hotpatch-compile-10.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-11.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-12.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-13.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-14.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-2.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-3.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-4.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-5.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-6.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-7.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-8.c: Likewise.
+ * gcc.target/s390/hotpatch-compile-9.c: Likewise.
+
+2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backport from mainline
+ 2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * gcc.target/aarch64/sisd-shft-neg_1.c: New test.
+
+2015-02-20 Georg-Johann Lay <avr@gjlay.de>
+
+ Backport from 2015-02-20 trunk r220847.
+
+ PR target/64452
+ * gcc.target/avr/torture/pr64452.c: New test.
+
+2015-02-20 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2015-01-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/64530
+ * gfortran.dg/pr64530.f90: New testcase.
+
+ 2015-02-13 Richard Biener <rguenther@suse.de>
+
+ PR lto/64373
+ * gcc.dg/lto/pr64373_0.c: New testcase.
+
+ 2015-02-16 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/63593
+ * gcc.dg/pr63593.c: New testcase.
+
+ 2015-02-18 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/65063
+ * gcc.dg/pr65063.c: New testcase.
+
+2015-02-19 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2014-12-09 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/64199
+ * gcc.dg/torture/pr64199.c: New testcase.
+
+ 2015-01-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/64493
+ PR tree-optimization/64495
+ * gcc.dg/vect/pr64493.c: New testcase.
+ * gcc.dg/vect/pr64495.c: Likewise.
+
+ 2015-01-27 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/56273
+ PR tree-optimization/59124
+ PR tree-optimization/64277
+ * g++.dg/warn/Warray-bounds-6.C: New testcase.
+ * gcc.dg/Warray-bounds-12.c: Likewise.
+ * gcc.dg/Warray-bounds-13.c: Likewise.
+
+ 2015-02-19 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2015-01-15 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/64365
+ * gcc.dg/torture/pr64365.c: New testcase.
+
+2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ Revert:
+
+ 2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+ Backport from mainline
+ 2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ * lib/target-supports.exp (check_compile): Save/restore
+ additional_sources that may belong to an actual test.
+
+2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ Backport from mainline
+ 2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ * lib/target-supports.exp (check_compile): Save/restore
+ additional_sources that may belong to an actual test.
+
+2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
+
+ Backported from mainline
+ 2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
+
+ * gcc.target/arm/divzero.c: New test case.
+
+2015-02-17 Ilya Tocar <ilya.tocar@intel.com>
+
+ Backport from mainline
+ 2015-01-14 Ilya Tocar <ilya.tocar@intel.com>
+
+ PR target/64387
+ * gcc.target/i386/pr64387.c: New test.
+
+2015-02-13 Mikael Morin <mikael@gcc.gnu.org>
+
+ PR fortran/63744
+ gfortran.dg/use_rename_8.f90: New.
+
+2015-02-12 Paul Thomas <pault@gcc.gnu.org>
+
+ Backported from mainline
+ 2015-02-12 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/64932
+ * gfortran.dg/finalize_28.f90: New test
+
+2015-02-11 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2015-02-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/64979
+ * gcc.dg/tree-ssa/stdarg-7.c: New test.
+ * gcc.c-torture/execute/pr64979.c: New test.
+
+2015-02-11 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2014-07-24 Marek Polacek <polacek@redhat.com>
+
+ PR c/57653
+ * c-c++-common/pr57653.c: New test.
+ * c-c++-common/pr57653.h: New file.
+ * c-c++-common/pr57653-2.c: New test.
+ * c-c++-common/pr57653-2.h: New file.
+
+2015-02-09 Dominik Vogt <vogt@linux.vnet.ibm.com>
+
+ * gcc/testsuite/gcc.target/s390/hotpatch-13.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-14.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-15.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-16.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-17.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-18.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-19.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-20.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-10.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-11.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-12.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-13.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-14.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-15.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-16.c: New testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-9.c: New
+ testcase.
+ * gcc/testsuite/gcc.target/s390/hotpatch-1.c: Testcase adjusted to
+ new -mhotpatch.
+ * gcc/testsuite/gcc.target/s390/hotpatch-10.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-11.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-12.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-2.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-3.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-4.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-5.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-6.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-7.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-8.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-9.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c: Likewise.
+ * gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c: Likewise.
+
2015-02-04 Matthias Klose <doko@ubuntu.com>
Backport from mainline
--- /dev/null
+/* { dg-do preprocess } */
+/* { dg-options "-imacros ${srcdir}/c-c++-common/pr57653-2.h" } */
+
+/* Empty. */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-imacros ${srcdir}/c-c++-common/pr57653.h" } */
+
+__attribute__((used)) static const char s[] = F;
+
+/* { dg-final { scan-assembler-not "command-line" } } */
--- /dev/null
+#define F __FILE__
--- /dev/null
+// PR c++/65209
+// { dg-final { scan-assembler-not "comdat" } }
+
+// Everything involving the anonymous namespace bits should be private, not
+// COMDAT.
+
+struct Bar
+{
+ static Bar *self();
+ char pad[24];
+};
+
+template <Bar *(&holderFunction)()>
+struct BarGlobalStatic
+{
+ Bar *operator()() { return holderFunction(); }
+};
+
+namespace {
+ namespace Q_QGS_s_self {
+ inline Bar *innerFunction() {
+ static struct Holder {
+ Bar value;
+ ~Holder() {}
+ } holder;
+ return &holder.value;
+ }
+ }
+}
+static BarGlobalStatic<Q_QGS_s_self::innerFunction> s_self;
+
+Bar *Bar::self()
+{
+ return s_self();
+}
+
+int main(int argc, char *argv[])
+{
+ Bar* bar = Bar::self();
+ return 0;
+}
--- /dev/null
+// PR ipa/64896
+// { dg-do compile }
+// { dg-options "-O2" }
+
+struct A { int a, b; };
+struct B { A c; int d; };
+struct C { virtual B fn1 () const; };
+struct D { B fn2 () const; int fn3 () const; C *fn4 () const; };
+
+int
+D::fn3 () const
+{
+ fn4 ()->fn1 ();
+}
+
+B
+D::fn2 () const
+{
+ return B ();
+}
+
+class F : C
+{
+ B
+ fn1 () const
+ {
+ return B ();
+ }
+};
--- /dev/null
+/* { dg-lto-do link } */
+/* { dg-require-effective-target fpic } */
+/* { dg-lto-options {{-fPIC -r -nostdlib -flto -O2 -g}} } */
+
+void frexp (int, int *);
+namespace std
+{
+ int ldexp (int, int);
+ struct A
+ {
+ };
+ template <class T> T get_min_shift_value ();
+ template <class> struct min_shift_initializer
+ {
+ struct B
+ {
+ B () { get_min_shift_value<long double> (); }
+ } static const b;
+ static void
+ m_fn1 ()
+ {
+ b;
+ }
+ };
+ template <class T>
+ const typename min_shift_initializer<T>::B min_shift_initializer<T>::b;
+ template <class T>
+ inline T
+ get_min_shift_value ()
+ {
+ using std::ldexp;
+ static T c = ldexp (0, 0);
+ min_shift_initializer<T>::m_fn1;
+ }
+ template <class T, class Policy>
+ void
+ float_next_imp (T p1, Policy p2)
+ {
+ using std::ldexp;
+ int d;
+ float_next (0, p2);
+ frexp (p1, &d);
+ }
+ template <class T, class Policy>
+ int
+ float_next (const T &p1, Policy &p2)
+ {
+ float_next_imp (p1, p2);
+ }
+ template <class T, class Policy> void float_prior_imp (T, Policy)
+ {
+ get_min_shift_value<T> ();
+ }
+ template <class T, class Policy> int float_prior (T, Policy)
+ {
+ float_prior_imp (static_cast<T> (0), 0);
+ }
+ template <class T, class U, class Policy>
+ void
+ nextafter (T p1, U p2, Policy p3)
+ {
+ p2 ? float_next (0, p3) : float_prior (p1, 0);
+ }
+ long double e;
+ int f;
+ void
+ nextafter ()
+ {
+ nextafter (e, f, A ());
+ }
+}
--- /dev/null
+// { dg-options "-O3 -fno-lifetime-dse" }
+// { dg-do run }
+
+typedef __SIZE_TYPE__ size_t;
+inline void * operator new (size_t, void *p) { return p; }
+
+struct A
+{
+ int i;
+ A() {}
+ ~A() {}
+};
+
+int main()
+{
+ int ar[1];
+
+ A* ap = new(ar) A;
+ ap->i = 42;
+ ap->~A();
+
+ if (ar[0] != 42) __builtin_abort();
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-fdump-ada-spec" } */
+
+using namespace std;
+
+class Base {
+ public:
+ int My_V;
+ virtual void Primitive ();
+
+ Base ();
+};
+
+void Base::Primitive () {
+}
+
+Base::Base () {
+}
+
+void Dispatch (Base * B) {
+ B->Primitive ();
+}
+
+/* { dg-final { cleanup-ada-spec } } */
--- /dev/null
+// PR c++/62255
+
+// It's not clear whether this is well-formed; instantiating the
+// initializer of 'value' causes the instantiation of Derived, which in
+// turn requires the value of 'value', but the recursion ends there, so it
+// seems reasonable to allow it.
+
+template <typename T> struct Test {
+ template<typename X> static int check(typename X::Type*);
+ template<typename> static char check(...);
+ static const bool value = (sizeof(check<T>(0)) == sizeof(int));
+};
+template <int> struct Sink { };
+template <typename T> struct Derived : Sink<Test<Derived<T> >::value> {
+ typedef int Type;
+};
+
+Sink<Test<Derived<int> >::value> s;
--- /dev/null
+// { dg-do compile }
+// { dg-options "-O3 -Warray-bounds" }
+
+struct type {
+ bool a, b;
+ bool get_b() { return b; }
+};
+
+type stuff[9u];
+
+void bar();
+
+void foo()
+{
+ for(unsigned i = 0u; i < 9u; i++)
+ {
+ if(!stuff[i].a)
+ continue;
+
+ bar();
+
+ for(unsigned j = i + 1u; j < 9u; j++)
+ if(stuff[j].a && stuff[j].get_b()) // { dg-bogus "above array bounds" }
+ return;
+ }
+}
--- /dev/null
+/* PR target/65163 */
+
+typedef unsigned int uint32_t;
+typedef unsigned short uint16_t;
+union unaligned_32 { uint32_t l; } __attribute__((packed));
+union unaligned_16 { uint16_t l; } __attribute__((packed));
+
+int
+test_00 (unsigned char* buf, int bits_per_component)
+{
+ (((union unaligned_32*)(buf))->l) =
+ __builtin_bswap32 (bits_per_component == 10 ? 1 : 0);
+ return 0;
+}
+
+int
+test_01 (unsigned char* buf, int bits_per_component)
+{
+ (((union unaligned_16*)(buf))->l) =
+ __builtin_bswap16 (bits_per_component == 10 ? 1 : 0);
+ return 0;
+}
--- /dev/null
+/* PR target/64979 */
+
+#include <stdarg.h>
+
+void __attribute__((noinline, noclone))
+bar (int x, va_list *ap)
+{
+ if (ap)
+ {
+ int i;
+ for (i = 0; i < 10; i++)
+ if (i != va_arg (*ap, int))
+ __builtin_abort ();
+ if (va_arg (*ap, double) != 0.5)
+ __builtin_abort ();
+ }
+}
+
+void __attribute__((noinline, noclone))
+foo (int x, ...)
+{
+ va_list ap;
+ int n;
+
+ va_start (ap, x);
+ n = va_arg (ap, int);
+ bar (x, (va_list *) ((n == 0) ? ((void *) 0) : &ap));
+ va_end (ap);
+}
+
+int
+main ()
+{
+ foo (100, 1, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0.5);
+ return 0;
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -Warray-bounds" } */
+/* { dg-additional-options "-mssse3" { target x86_64-*-* i?86-*-* } } */
+
+void foo(short a[], short m)
+{
+ int i, j;
+ int f1[10];
+ short nc;
+
+ nc = m + 1;
+ if (nc > 3)
+ {
+ for (i = 0; i <= nc; i++)
+ {
+ f1[i] = f1[i] + 1;
+ }
+ }
+
+ for (i = 0, j = m; i < nc; i++, j--)
+ {
+ a[i] = f1[i]; /* { dg-bogus "above array bounds" } */
+ a[j] = i;
+ }
+ return;
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -Warray-bounds" } */
+
+extern char *bar[17];
+
+int foo(int argc, char **argv)
+{
+ int i;
+ int n = 0;
+
+ for (i = 0; i < argc; i++)
+ n++;
+
+ for (i = 0; i < argc; i++)
+ argv[i] = bar[i + n]; /* { dg-bogus "above array bounds" } */
+
+ return 0;
+}
--- /dev/null
+/* { dg-lto-do assemble } */
+
+extern void b(int L, float (*data)[L]);
+
+void a(void)
+{
+ float* p = 0;
+ int i = 0;
+ b(10, (float (*)[10])(p + i));
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -fno-tree-vectorize" } */
+
+int in[2 * 4][4];
+int out[4];
+
+void
+foo (void)
+{
+ int sum;
+ int i, j, k;
+ for (k = 0; k < 4; k++)
+ {
+ sum = 1;
+ for (j = 0; j < 4; j++)
+ for (i = 0; i < 4; i++)
+ sum *= in[i + k][j];
+ out[k] = sum;
+ }
+}
--- /dev/null
+/* { dg-do run } */
+/* { dg-options "-O3 -fno-tree-loop-ivcanon -fno-tree-vectorize" } */
+
+static int in[8][4];
+static int out[4];
+static const int check_result[] = {0, 16, 256, 4096};
+
+static inline void foo ()
+{
+ int sum;
+ int i, j, k;
+ for (k = 0; k < 4; k++)
+ {
+ sum = 1;
+ for (j = 0; j < 4; j++)
+ for (i = 0; i < 4; i++)
+ sum *= in[i + k][j];
+ out[k] = sum;
+ }
+}
+
+int main ()
+{
+ int i, j, k;
+ for (i = 0; i < 8; i++)
+ for (j = 0; j < 4; j++)
+ in[i][j] = (i + 2) / 3;
+ foo ();
+ for (k = 0; k < 4; k++)
+ if (out[k] != check_result[k])
+ __builtin_abort ();
+ return 0;
+}
--- /dev/null
+/* PR c/65228 */
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+__auto_type a = b; /* { dg-error "undeclared" } */
+
+void
+f (void)
+{
+ __auto_type c = d; /* { dg-error "undeclared" } */
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-additional-options "-ffast-math -frounding-math" } */
+
+float
+foo (void)
+{
+ return 1.1f + 2.2f + 2.2f;
+}
--- /dev/null
+/* { dg-do run } */
+/* { dg-require-effective-target int32plus } */
+
+extern void abort (void);
+extern int memcmp (const void * , const void *, __SIZE_TYPE__);
+
+void __attribute__((noinline,noclone))
+foo(int *in)
+{
+ int i;
+ for (i = 62; i >= 10; i--)
+ {
+ in[i - 8] -= in[i];
+ in[i - 5] += in[i] * 2;
+ in[i - 4] += in[i];
+ }
+}
+
+int main()
+{
+ int x[64];
+ int y[64] = { 0, 1, -2380134, -1065336, -1026376, 3264240, 3113534, 2328130, 3632054, 3839634, 2380136, 1065339, 1026380, 1496037, 1397286, 789976, 386408, 450984, 597112, 497464, 262008, 149184, 194768, 231519, 173984, 87753, 60712, 82042, 87502, 60014, 30050, 25550, 33570, 32386, 20464, 10675, 10868, 13329, 11794, 6892, 3988, 4564, 5148, 4228, 2284, 1568, 1848, 1943, 1472, 741, 628, 702, 714, 474, 230, 234, 238, 242, 120, 59, 60, 61, 62, 63 };
+ int i;
+
+ for (i = 0; i < 64; ++i)
+ {
+ x[i] = i;
+ __asm__ volatile ("");
+ }
+
+ foo (x);
+
+ if (memcmp (x, y, sizeof (x)) != 0)
+ abort ();
+
+ return 0;
+}
--- /dev/null
+/* PR target/64979 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-stdarg" } */
+
+#include <stdarg.h>
+
+void bar (int x, va_list *ap);
+
+void
+foo (int x, ...)
+{
+ va_list ap;
+ int n;
+
+ va_start (ap, x);
+ n = va_arg (ap, int);
+ bar (x, (va_list *) ((n == 0) ? ((void *) 0) : &ap));
+ va_end (ap);
+}
+
+/* { dg-final { scan-tree-dump "foo: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" } } */
+/* { dg-final { cleanup-tree-dump "stdarg" } } */
--- /dev/null
+/* { dg-require-effective-target vect_int } */
+/* { dg-do compile } */
+
+#define N 16
+
+const unsigned int in[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+unsigned int out[N];
+
+__attribute__ ((noinline)) int
+main1 (void)
+{
+ const unsigned int *pin = &in[1];
+ unsigned int *pout = &out[0];
+
+ /* Misaligned load. */
+ *pout++ = *pin++;
+ *pout++ = *pin++;
+ *pout++ = *pin++;
+ *pout++ = *pin++;
+
+ return 0;
+}
+
+/* Verify that the assembly contains vector instructions alone
+ with no word loads (lw, lwu, lwz, lwzu, or their indexed forms)
+ or word stores (stw, stwu, stwx, stwux, or their indexed forms). */
+
+/* { dg-final { scan-assembler "\t\(lxv|lvsr|stxv\)" } } */
+/* { dg-final { scan-assembler-not "\tlwz?u?x? " } } */
+/* { dg-final { scan-assembler-not "\tstwu?x? " } } */
/* { dg-require-effective-target vect_int } */
-#include <stdarg.h>
#include "../../tree-vect.h"
#define N 16
unsigned int in[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
__attribute__ ((noinline)) int
-main1 (unsigned int x, unsigned int y)
+main1 (void)
{
- int i;
unsigned int *pin = &in[1];
unsigned int *pout = &out[0];
- unsigned int a0, a1, a2, a3;
/* Misaligned load. */
*pout++ = *pin++;
*pout++ = *pin++;
*pout++ = *pin++;
- /* Check results. */
- if (out[0] != in[1]
- || out[1] != in[2]
- || out[2] != in[3]
- || out[3] != in[4])
- abort();
-
return 0;
}
{
check_vect ();
- main1 (2, 3);
+ main1 ();
+
+ /* Check results. */
+ if (out[0] != in[1]
+ || out[1] != in[2]
+ || out[2] != in[3]
+ || out[3] != in[4])
+ abort();
return 0;
}
-/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { xfail vect_no_align } } } */
+/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { xfail vect_no_align } } } */
/* { dg-final { cleanup-tree-dump "slp" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+/* { dg-additional-options "-mtune=bdver1" } */
+
+unsigned short a[32];
+unsigned int b[32];
+void t()
+{
+ int i;
+ for (i=0;i<12;i++)
+ b[i]=a[i];
+}
+
+/* { dg-final { scan-tree-dump "vectorized 1 loops in function" "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
--- /dev/null
+/* { dg-do run } */
+/* { dg-additional-options "-O3" } */
+
+#include "tree-vect.h"
+
+void abort (void);
+
+unsigned int a[256];
+unsigned char b[256];
+
+__attribute__ ((noinline)) void
+main1()
+{
+ int i, z, x, y;
+
+ for(i = 0; i < 256; i++)
+ {
+ a[i] = i % 5;
+ __asm__ volatile ("");
+ }
+
+ for (z = 0; z < 16; z++)
+ for (y = 0; y < 4; y++)
+ for (x = 0; x < 4; x++)
+ b[y*64 + z*4 + x] = a[z*16 + y*4 + x];
+
+ if (b[4] != 1)
+ abort ();
+}
+
+int main (void)
+{
+ check_vect ();
+
+ main1 ();
+
+ return 0;
+}
+
+/* { dg-final { scan-tree-dump "vectorized 1 loop" "vect" { target { vect_pack_trunc } } } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
--- /dev/null
+/* { dg-do compile } */
+
+int a, b, c, d;
+short *e;
+void fn1 (int p1[], int p2, int p3[], int p4[], int p5[], int *p6)
+{
+ int f;
+ c = *p1;
+ d = *p5;
+ (void)p6;
+ for (; a; a--)
+ {
+ f = *e >> 2;
+ *e++ = f;
+ b += f * f;
+ f = *e >> 2;
+ *e++ = f;
+ }
+ p4[0] = p3[0];
+ for (;; p2--)
+ ;
+}
+
+/* { dg-final { cleanup-tree-dump "vect" } } */
--- /dev/null
+/* { dg-do run } */
+
+#include "tree-vect.h"
+
+int a, b, c, d, e, f, g, h;
+
+int
+main ()
+{
+ check_vect ();
+
+ for (; a; a--)
+ for (d = 1; d <= 0; d++)
+ for (; d;)
+ if (h)
+ {
+ if (!g) __builtin_abort ();
+ if (!0) __builtin_abort ();
+ }
+
+ for (f = 4; f; f--)
+ {
+ for (b = 0; b < 2; b++)
+ c |= 1;
+ e |= c;
+ }
+
+ return 0;
+}
+
+/* { dg-final { cleanup-tree-dump "vect" } } */
--- /dev/null
+/* { dg-do run } */
+
+#include <assert.h>
+#include "tree-vect.h"
+
+int a, b, c, d, e, f, g, i, j;
+static int *h = &e;
+
+int
+main ()
+{
+ check_vect ();
+
+ for (; a;)
+ for (; g; g++)
+ for (; f; f++)
+ if (j)
+ {
+ assert(b);
+ assert(0);
+ }
+ for (i = 24; i; i--)
+ {
+ for (c = 0; c < 6; c++)
+ d |= 1;
+ *h |= d;
+ }
+
+ if (e != 1)
+ __builtin_abort ();
+
+ return 0;
+}
+
+/* { dg-final { cleanup-tree-dump "vect" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-additional-options "-O3" } */
+
+int a, b, c, d;
+
+int
+fn1 ()
+{
+ for (; c; c++)
+ for (b = 0; b < 2; b++)
+ d = a - d;
+ return d;
+}
--- /dev/null
+/* { dg-do run } */
+/* { dg-options "-O1" } */
+
+unsigned short v = 0x5678;
+int i;
+int j = 0;
+int *ptr = &j;
+
+int
+func (void)
+{
+ for (i = 0; i < 1; ++i)
+ {
+ *ptr = -1;
+ v = 0x1234;
+ }
+ return v;
+}
+
+int
+main (void)
+{
+ func ();
+ if (v != 0x1234)
+ __builtin_abort ();
+ return 0;
+}
--- /dev/null
+/* { dg-require-effective-target arm_eabi } */
+/* { dg-options "" } */
+/* { dg-do run } */
+
+/* Check that long long divmod functions pass the right argument to
+ __aeabi_ldiv0 on divide by zero. */
+
+#ifdef DEBUGME
+#include <stdio.h>
+#else
+extern void abort (void);
+#endif
+
+/* Override div zero handler and simply return the provided value. */
+long long __aeabi_ldiv0 (long long r)
+{
+ return r;
+}
+
+long long lldiv (long long a, long long b)
+{
+ return a / b;
+}
+
+unsigned long long ulldiv (unsigned long long a, unsigned long long b)
+{
+ return a / b;
+}
+
+void check (long long num, long long expected)
+{
+ long long res = lldiv (num, 0LL);
+ if (res != expected)
+#ifdef DEBUGME
+ {
+ printf ("num=%08X:%08X\n", (unsigned)(num >> 32), (unsigned)num);
+ printf ("res=%08X:%08X\n", (unsigned)(res >> 32), (unsigned)res);
+ }
+#else
+ abort ();
+#endif
+}
+
+void ucheck (unsigned long long num, unsigned long long expected)
+{
+ unsigned long long res = ulldiv (num, 0ULL);
+ if (res != expected)
+#ifdef DEBUGME
+ {
+ printf ("num=%08X:%08X\n", (unsigned)(num >> 32), (unsigned)num);
+ printf ("res=%08X:%08X\n", (unsigned)(res >> 32), (unsigned)res);
+ }
+#else
+ abort ();
+#endif
+}
+
+#define POS_BIG 0x7fffffffffffffffLL
+#define NEG_BIG 0x8000000000000000LL
+#define UNS_BIG 0xffffffffffffffffULL
+
+int main ()
+{
+ check (0LL, 0LL);
+ check (1LL, POS_BIG);
+ check (0x000000007fffffffLL, POS_BIG);
+ check (0x00000000ffffffffLL, POS_BIG);
+ check (0x0000000100000000LL, POS_BIG);
+ check (POS_BIG, POS_BIG);
+ check (-1LL, NEG_BIG);
+ check (-0x000000007fffffffLL, NEG_BIG);
+ check (-0x00000000ffffffffLL, NEG_BIG);
+ check (-0x0000000100000000LL, NEG_BIG);
+ check (NEG_BIG, NEG_BIG);
+
+ ucheck (0ULL, 0ULL);
+ ucheck (1ULL, UNS_BIG);
+ ucheck (0x000000007fffffffULL, UNS_BIG);
+ ucheck (0x00000000ffffffffULL, UNS_BIG);
+ ucheck (0x0000000100000000ULL, UNS_BIG);
+ ucheck ((unsigned long long)POS_BIG, UNS_BIG);
+ ucheck (UNS_BIG, UNS_BIG);
+
+ return 0;
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-mthumb -Os " } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+
+void save_regs () {
+ __asm volatile ("" ::: "r8");
+}
+
+/* { dg-final { scan-assembler "\tmov\tr., r8" } } */
--- /dev/null
+/* { dg-do run } */
+
+typedef struct
+{
+ unsigned a, b;
+} T2;
+
+
+__attribute__((__noinline__, __noclone__))
+void foo2 (T2 *t, int x)
+{
+ if (x != t->a)
+ {
+ t->a = x;
+
+ if (x && x == t->b)
+ t->a = 20;
+ }
+}
+
+
+T2 t;
+
+int main (void)
+{
+ t.a = 1;
+ t.b = 1234;
+
+ foo2 (&t, 1234);
+
+ if (t.a != 20)
+ __builtin_abort();
+
+ __builtin_exit (0);
+
+ return 0;
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-std=c99" } */
+
+struct A
+{
+ char str[8];
+ void* v;
+};
+
+int varf (char* fmt, ...);
+
+void foo (struct A a, struct A b)
+{
+ varf ("%s%s", b.str, b.str);
+}
+
+long long x64;
+
+void foo2 (long long j0,
+ struct A a, struct A b, struct A c, struct A d,
+ struct A e, struct A f, struct A g, struct A h, struct A i,
+ long long j1)
+{
+ varf ("%s%s", i.str, i.str, x64, j1+j0);
+}
+
+
+void foo3 (long long j0,
+ struct A a, struct A b, struct A c, struct A d,
+ struct A e, struct A f, struct A g, struct A h, struct A i,
+ long long j1)
+{
+ varf ("%s%s", &i.str, &b.str, x64, j1+j0);
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -ffloat-store -mavx512er" } */
+
+float x[256];
+
+double *
+foo (void)
+{
+ double *z = __builtin_malloc (sizeof (double) * 256);
+ int i;
+ for (i = 0; i < 256; ++i)
+ z[i] = x[i] + 1.0f;
+ foo ();
+ return 0;
+}
-/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-do assemble { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_htm_ok } */
-/* { dg-options "-O2 -mhtm" } */
+/* { dg-options "-O2 -mhtm -save-temps" } */
/* { dg-final { scan-assembler-times "tbegin\\." 1 } } */
/* { dg-final { scan-assembler-times "tend\\." 2 } } */
/* { dg-final { scan-assembler-times "tabortdci\\." 1 } } */
/* { dg-final { scan-assembler-times "tabortwc\\." 1 } } */
/* { dg-final { scan-assembler-times "tabortwci\\." 2 } } */
-/* { dg-final { scan-assembler-times "tcheck\\." 1 } } */
+/* { dg-final { scan-assembler-times "tcheck" 1 } } */
/* { dg-final { scan-assembler-times "trechkpt\\." 1 } } */
/* { dg-final { scan-assembler-times "treclaim\\." 1 } } */
/* { dg-final { scan-assembler-times "tsr\\." 3 } } */
__builtin_set_tfhar (a[22]);
__builtin_set_tfiar (a[23]);
}
+/* { dg-final { cleanup-saved-temps } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
#include <stdio.h>
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */
-/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mno-hotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,0" } */
#include <stdio.h>
-__attribute__ ((hotpatch(2)))
void hp1(void)
{
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */
-/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch -mno-hotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1,0" } */
#include <stdio.h>
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mno-hotpatch -mhotpatch=1 --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=999,0" } */
#include <stdio.h>
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
-/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 999 } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(1,0)))
+void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+/* Check number of occurences of certain instructions. */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(0,2)))
+void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+/* Check number of occurences of certain instructions. */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(1,2)))
+void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+/* Check number of occurences of certain instructions. */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,0" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(1,2)))
+void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+/* Check number of occurences of certain instructions. */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1,2" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(0,0)))
+void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+/* Check number of occurences of certain instructions. */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1,2 -mhotpatch=0,0" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+/* Check number of occurences of certain instructions. */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1,2" } */
+
+#include <stdio.h>
+
+/* { dg-prune-output "always_inline function might not be inlinable" } */
+__attribute__ ((always_inline))
+static void hp2(void)
+{
+ printf("hello, world!\n");
+}
+
+void hp1(void)
+{
+ hp2();
+}
+
+/* Check number of occurences of certain instructions. */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,1" } */
#include <stdio.h>
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
-/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+#include <stdio.h>
+
+/* { dg-prune-output "always_inline function might not be inlinable" } */
+__attribute__ ((hotpatch(1,2)))
+__attribute__ ((always_inline))
+static void hp2(void)
+{
+ printf("hello, world!\n");
+}
+
+/* { dg-prune-output "called from here" } */
+void hp1(void)
+{
+ hp2();
+}
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch=0 --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,2" } */
#include <stdio.h>
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,3" } */
#include <stdio.h>
-inline void hp1(void)
+void hp1(void)
{
printf("hello, world!\n");
}
-__attribute__ ((always_inline))
-void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */
-
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-times "brcl\t\t0,0" 1 } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,4" } */
#include <stdio.h>
-__attribute__ ((hotpatch))
void hp1(void)
{
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */
-/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-times "brcl\t\t0,0" 1 } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,5" } */
#include <stdio.h>
-__attribute__ ((hotpatch(1)))
void hp1(void)
{
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-times "brcl\t\t0,0" 1 } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,6" } */
#include <stdio.h>
-__attribute__ ((hotpatch(0)))
void hp1(void)
{
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
-/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-times "brcl\t\t0,0" 2 } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mesa -m31 -march=g5 -mhotpatch=0,3" } */
#include <stdio.h>
-__attribute__ ((hotpatch))
-inline void hp1(void)
+void hp1(void)
{
printf("hello, world!\n");
}
-__attribute__ ((hotpatch))
-__attribute__ ((always_inline))
-void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */
-
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
-/* { dg-final { scan-assembler-not "nop\t0" } } */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mesa -m31 -march=g5 -mhotpatch=0,4" } */
#include <stdio.h>
-__attribute__ ((hotpatch(2)))
void hp1(void)
{
printf("hello, world!\n");
}
-int main (void)
-{
- return 0;
-}
-
/* Check number of occurences of certain instructions. */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */
-/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-times "nop\t0" 2 } } */
+/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch" } */
-
-#include <stdio.h>
-
-void hp1(void)
-{
- printf("hello, world!\n");
-}
-
-inline void hp2(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((always_inline))
-void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
-
-int main (void)
-{
- return 0;
-}
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=-1,0" } */
+/* { dg-error "arguments to .-mhotpatch=n,m. should be non-negative integers" "" { target *-*-* } 1 } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+__attribute__((hotpatch(0,0,0)))
+int main (void)
+{/* { dg-error "wrong number of arguments specified" } */
+ return 0;
+}
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+int a;
+
+__attribute__((hotpatch(a,0)))
+int main (void)
+{ /* { dg-error "attribute is not a comma separated pair of non-negative integer constants or too large" } */
+ return 0;
+}
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+int a;
+
+__attribute__((hotpatch(0,a)))
+int main (void)
+{ /* { dg-error "attribute is not a comma separated pair of non-negative integer constants or too large" } */
+ return 0;
+}
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1000000,1000000" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1000000,1000000)))
+void hp2(void)
+{
+ printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1000001,1000000)))
+void hp3(void)
+{ /* { dg-error " requested .hotpatch. attribute is not a comma separated pair" } */
+ printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1000000,1000001)))
+void hp4(void)
+{ /* { dg-error " requested .hotpatch. attribute is not a comma separated pair" } */
+ printf("hello, world!\n");
+}
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1000001,1000000" } */
+
+viod main(void)
+{
+ return 0;
+}
+
+/* { dg-error "argument to .-mhotpatch=n,m. is too large" "" { target *-*-* } 1 } */
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+/* { dg-prune-output "always_inline function might not be inlinable" } */
+/* { dg-prune-output "called from here" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(1,2)))
+static void hp1(void)
+{
+ printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1,2)))
+static inline void hp2(void)
+{
+ printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(0,0)))
+__attribute__ ((always_inline))
+static void hp3(void)
+{
+ printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1,2)))
+__attribute__ ((always_inline))
+static void hp4(void)
+{
+ printf("hello, world!\n");
+}
+
+void main(void)
+{
+ hp1();
+ hp2();
+ hp3();
+ hp4();
+}
--- /dev/null
+/* A warning will be issued when requesting hotpatching on a nested function. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+typedef int (*fn_t)(void);
+
+fn_t hp1(void)
+{
+ __attribute__((hotpatch(0,0)))
+ int nested1(void)
+ { return 1; }
+
+ return nested1;
+}
+
+fn_t hp2(void)
+{
+ __attribute__ ((hotpatch(1,2)))
+ int nested2(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */
+ { return 2; }
+
+ return nested2;
+}
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch=0" } */
-
-#include <stdio.h>
-
-void hp1(void)
-{
- printf("hello, world!\n");
-}
-
-inline void hp2(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((always_inline))
-void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
-
-int main (void)
-{
- return 0;
-}
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,-1" } */
+/* { dg-error "arguments to .-mhotpatch=n,m. should be non-negative integers" "" { target *-*-* } 1 } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch=1" } */
-
-#include <stdio.h>
-
-void hp1(void)
-{
- printf("hello, world!\n");
-}
-
-inline void hp2(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((always_inline))
-void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
-
-int main (void)
-{
- return 0;
-}
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0" } */
+/* { dg-error "arguments to .-mhotpatch=n,m. should be non-negative integers" "" { target *-*-* } 1 } */
/* Functional tests for the function hotpatching feature. */
/* { dg-do compile } */
-/* { dg-options "-O3 -mzarch -mhotpatch=-1" } */
-
-int main (void)
-{
- return 0;
-}
-
-/* { dg-excess-errors "argument to '-mhotpatch=' should be a non-negative integer" } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,0,0" } */
+/* { dg-error "arguments to .-mhotpatch=n,m. should be non-negative integers" "" { target *-*-* } 1 } */
/* Functional tests for the function hotpatching feature. */
/* { dg-do compile } */
-/* { dg-options "-O3 -mzarch -mhotpatch=1000000" } */
-
-#include <stdio.h>
-
-void hp1(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch(1000000)))
-void hp2(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch(1000001)))
-void hp3(void)
-{ /* { dg-error "requested 'hotpatch' attribute is not a non-negative integer constant or too large .max. 1000000." } */
- printf("hello, world!\n");
-}
-
-int main (void)
-{
- return 0;
-}
+/* { dg-options "-O3 -mzarch -mhotpatch=a,0" } */
+/* { dg-error "arguments to .-mhotpatch=n,m. should be non-negative integers" "" { target *-*-* } 1 } */
/* Functional tests for the function hotpatching feature. */
/* { dg-do compile } */
-/* { dg-options "-O3 -mzarch -mhotpatch=1000001" } */
-
-int main (void)
-{
- return 0;
-}
-
-/* { dg-excess-errors "argument to '-mhotpatch=' is too large .max. 1000000." } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0,a" } */
+/* { dg-error "arguments to .-mhotpatch=n,m. should be non-negative integers" "" { target *-*-* } 1 } */
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mno-hotpatch" } */
-
-#include <stdio.h>
-
-__attribute__ ((hotpatch))
-void hp1(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch))
-inline void hp2(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch))
-__attribute__ ((always_inline))
-void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
-
-__attribute__ ((hotpatch(0)))
-void hp4(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch(0)))
-inline void hp5(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch(0)))
-__attribute__ ((always_inline))
-void hp6(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp6' with the 'always_inline' attribute is not hotpatchable" } */
-
-__attribute__ ((hotpatch(1)))
-void hp7(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch(1)))
-inline void hp8(void)
-{
- printf("hello, world!\n");
-}
-
-__attribute__ ((hotpatch(1)))
-__attribute__ ((always_inline))
-void hp9(void) /* { dg-warning "always_inline function might not be inlinable" } */
-{
- printf("hello, world!\n");
-} /* { dg-warning "function 'hp9' with the 'always_inline' attribute is not hotpatchable" } */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+__attribute__((hotpatch(-1,0)))
int main (void)
-{
+{/* { dg-error "attribute is not a comma separated pair of non-negative integer constants or too large" } */
return 0;
}
/* Functional tests for the function hotpatching feature. */
-/* { dg-do run } */
-/* { dg-options "-O3 -mzarch -mhotpatch" } */
-
-#include <stdio.h>
-
-int hp1(void)
-{
- int nested1(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */
- { return 1; }
-
- __attribute__ ((hotpatch))
- int nested2(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */
- { return 1; }
-
- return nested1() - nested2();
-}
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+__attribute__((hotpatch(0,-1)))
int main (void)
-{
- return hp1();
+{/* { dg-error "attribute is not a comma separated pair of non-negative integer constants or too large" } */
+ return 0;
}
--- /dev/null
+/* Functional tests for the function hotpatching feature. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch" } */
+
+__attribute__((hotpatch(0)))
+int main (void)
+{/* { dg-error "wrong number of arguments specified" } */
+ return 0;
+}
/* Make sure no FPR saves/restores are emitted. */
/* { dg-final { scan-assembler-not "\tstd\t" } } */
/* { dg-final { scan-assembler-not "\tld\t" } } */
+/* { dg-final { cleanup-saved-temps } } */
/* { dg-do compile } */
/* { dg-options "-O1" } */
/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
-/* { dg-final { scan-assembler-times "tst\tr" 8 } } */
-/* { dg-final { scan-assembler-not "tst\t#255" } } */
-/* { dg-final { scan-assembler-not "exts|extu|and|movu" } } */
+/* { dg-final { scan-assembler-times "tst\tr" 8 { xfail *-*-*} } } */
+/* { dg-final { scan-assembler-not "tst\t#255" { xfail *-*-*} } } */
+/* { dg-final { scan-assembler-not "exts|extu|and|movu" { xfail *-*-*} } } */
int
test00 (char* a, char* b, int c, int d)
--- /dev/null
+! { dg-do compile }
+! { dg-options "-fdump-tree-original" }
+!
+! Test the fix for PR64932.
+!
+! Reported by Daniel Shapiro <shapero@uw.edu>
+!
+module coo_graphs
+ implicit none
+ type :: dynamic_array
+ integer :: length, capacity, min_capacity
+ integer, allocatable :: array(:)
+ end type
+ type :: coo_graph
+ type(dynamic_array) :: edges(2)
+ integer, private :: ne
+ end type coo_graph
+contains
+ subroutine coo_dump_edges(g, edges)
+ class(coo_graph), intent(in) :: g
+ integer, intent(out) :: edges(:,:)
+ end subroutine coo_dump_edges
+end module coo_graphs
+! { dg-final { scan-tree-dump-times "__builtin_free" 3 "original" } }
--- /dev/null
+! { dg-do run }
+
+program bug
+ ! Bug triggered with at least three elements
+ integer, parameter :: asize = 3
+
+ double precision,save :: ave(asize)
+ double precision,save :: old(asize)
+ double precision,save :: tmp(asize)
+
+ ave(:) = 10.d0
+ old(:) = 3.d0
+ tmp(:) = 0.d0
+
+ call buggy(2.d0,asize,ave,old,tmp)
+ if (any (tmp(:) .ne. 3.5)) call abort
+end
+
+subroutine buggy(scale_factor, asize, ave, old, tmp)
+
+ implicit none
+ ! Args
+ double precision scale_factor
+ integer asize
+ double precision ave(asize)
+ double precision old(asize)
+ double precision tmp(asize)
+
+ ! Local
+ integer i
+
+ do i = 1, asize
+ tmp(i) = ave(i) - old(i)
+ old(i) = ave(i)
+ tmp(i) = tmp(i) / scale_factor
+ end do
+
+end subroutine buggy
--- /dev/null
+! {dg-do run }
+!
+! Test the fix for PR65024, in which the structure for the 'info'
+! component of type 'T' was not being converted into TREE_SSA and
+! so caused an ICE in trans-expr.c:gfc_conv_component_ref.
+!
+! Reported by <matt@gneilson.plus.com>
+!
+MODULE X
+ TYPE T
+ CLASS(*), pointer :: info
+ END TYPE
+END MODULE
+
+PROGRAM P
+ call bug
+CONTAINS
+ SUBROUTINE BUG
+ USE X
+ CLASS(T), pointer :: e
+ integer, target :: i = 42
+ allocate(e)
+ e%info => NULL () ! used to ICE
+ if (.not.associated(e%info)) e%info => i ! used to ICE
+ select type (z => e%info)
+ type is (integer)
+ if (z .ne.i) call abort
+ end select
+ END SUBROUTINE
+
+ SUBROUTINE NEXT
+ USE X
+ CLASS (T), pointer :: e
+ END SUBROUTINE
+END
--- /dev/null
+! { dg-do compile }
+!
+! PR fortran/63744
+! duplicate use rename used to be rejected when the target name
+! was that of the current program unit
+!
+! Original testcase from Roger Ferrer Ibanez <roger.ferrer@bsc.es>
+
+MODULE MOO
+ INTEGER :: A, B, C, D, E, F, G, H, I
+END MODULE MOO
+
+SUBROUTINE S
+ USE MOO, ONLY: X => A, X => A
+END SUBROUTINE S
+
+SUBROUTINE T
+ USE MOO, ONLY: X => B
+ USE MOO, ONLY: X => B
+END SUBROUTINE T
+
+SUBROUTINE C
+ USE MOO, ONLY: C ! { dg-error "is also the name of the current program unit" }
+END SUBROUTINE C
+
+SUBROUTINE D
+ USE MOO, ONLY: X => D
+END SUBROUTINE D
+
+SUBROUTINE E
+ USE MOO, ONLY: X => E, X => E
+END SUBROUTINE E
+
+SUBROUTINE F
+ USE MOO, ONLY: X => F
+ USE MOO, ONLY: X => F
+END SUBROUTINE F
+
+SUBROUTINE X
+ USE MOO, ONLY: X => G ! { dg-error "is also the name of the current program unit" }
+END SUBROUTINE X
+
+SUBROUTINE Y
+ USE MOO, ONLY: Y => H ! { dg-error "is also the name of the current program unit" }
+END SUBROUTINE Y
+
+SUBROUTINE Z
+ USE MOO, ONLY: Z => I, Z => I ! { dg-error "is also the name of the current program unit" }
+END SUBROUTINE Z
+
fold_convert (ssizetype, memoff));
memoff = build_int_cst (TREE_TYPE (memoff), 0);
}
+ /* Adjust the offset so it is a multiple of the access type
+ size and thus we separate bases that can possibly be used
+ to produce partial overlaps (which the access_fn machinery
+ cannot handle). */
+ double_int rem;
+ if (TYPE_SIZE_UNIT (TREE_TYPE (ref))
+ && TREE_CODE (TYPE_SIZE_UNIT (TREE_TYPE (ref))) == INTEGER_CST
+ && !integer_zerop (TYPE_SIZE_UNIT (TREE_TYPE (ref))))
+ rem = tree_to_double_int (off).mod
+ (tree_to_double_int (TYPE_SIZE_UNIT (TREE_TYPE (ref))), false,
+ TRUNC_MOD_EXPR);
+ else
+ /* If we can't compute the remainder simply force the initial
+ condition to zero. */
+ rem = tree_to_double_int (off);
+ off = double_int_to_tree (ssizetype, tree_to_double_int (off) - rem);
+ memoff = double_int_to_tree (TREE_TYPE (memoff), rem);
+ /* And finally replace the initial condition. */
access_fn = chrec_replace_initial_condition
(access_fn, fold_convert (orig_type, off));
/* ??? This is still not a suitable base object for
for (int ii = 0; drs1.iterate (ii, &dr1); ++ii)
for (int jj = 0; drs2.iterate (jj, &dr2); ++jj)
{
+ data_reference_p saved_dr1 = dr1;
int this_dir = 1;
ddr_p ddr;
/* Re-shuffle data-refs to be in dominator order. */
dir = this_dir;
else if (dir != this_dir)
return 2;
+ /* Shuffle "back" dr1. */
+ dr1 = saved_dr1;
}
return dir;
}
if (chain->combined)
{
/* For combined chains, just remove the statements that are used to
- compute the values of the expression (except for the root one). */
- for (i = 1; chain->refs.iterate (i, &a); i++)
- remove_stmt (a->stmt);
+ compute the values of the expression (except for the root one).
+ We delay this until after all chains are processed. */
}
else
{
FOR_EACH_VEC_ELT (chains, i, chain)
{
- if (chain->type == CT_INVARIANT || chain->combined)
+ if (chain->type == CT_INVARIANT)
continue;
+ if (chain->combined)
+ {
+ /* For combined chains, we can't handle unrolling if we replace
+ looparound PHIs. */
+ dref a;
+ unsigned j;
+ for (j = 1; chain->refs.iterate (j, &a); j++)
+ if (gimple_code (a->stmt) == GIMPLE_PHI)
+ return 1;
+ continue;
+ }
+
/* The best unroll factor for this chain is equal to the number of
temporary variables that we create for it. */
af = chain->length;
execute_pred_commoning_chain (loop, chain, tmp_vars);
}
+ FOR_EACH_VEC_ELT (chains, i, chain)
+ {
+ if (chain->type == CT_INVARIANT)
+ ;
+ else if (chain->combined)
+ {
+ /* For combined chains, just remove the statements that are used to
+ compute the values of the expression (except for the root one). */
+ dref a;
+ unsigned j;
+ for (j = 1; chain->refs.iterate (j, &a); j++)
+ remove_stmt (a->stmt);
+ }
+ }
+
update_ssa (TODO_update_ssa_only_virtuals);
}
/* For va_list_simple_ptr, we have to check PHI nodes too. We treat
them as assignments for the purpose of escape analysis. This is
not needed for non-simple va_list because virtual phis don't perform
- any real data movement. */
- if (va_list_simple_ptr)
- {
- tree lhs, rhs;
- use_operand_p uop;
- ssa_op_iter soi;
+ any real data movement. Also, check PHI nodes for taking address of
+ the va_list vars. */
+ tree lhs, rhs;
+ use_operand_p uop;
+ ssa_op_iter soi;
- for (i = gsi_start_phis (bb); !gsi_end_p (i); gsi_next (&i))
- {
- gimple phi = gsi_stmt (i);
- lhs = PHI_RESULT (phi);
+ for (i = gsi_start_phis (bb); !gsi_end_p (i); gsi_next (&i))
+ {
+ gimple phi = gsi_stmt (i);
+ lhs = PHI_RESULT (phi);
- if (virtual_operand_p (lhs))
- continue;
+ if (virtual_operand_p (lhs))
+ continue;
+ if (va_list_simple_ptr)
+ {
FOR_EACH_PHI_ARG (uop, phi, soi, SSA_OP_USE)
{
rhs = USE_FROM_PTR (uop);
}
}
}
+
+ for (unsigned j = 0; !va_list_escapes
+ && j < gimple_phi_num_args (phi); ++j)
+ if ((!va_list_simple_ptr
+ || TREE_CODE (gimple_phi_arg_def (phi, j)) != SSA_NAME)
+ && walk_tree (gimple_phi_arg_def_ptr (phi, j),
+ find_va_list_reference, &wi, NULL))
+ {
+ if (dump_file && (dump_flags & TDF_DETAILS))
+ {
+ fputs ("va_list escapes in ", dump_file);
+ print_gimple_stmt (dump_file, phi, 0, dump_flags);
+ fputc ('\n', dump_file);
+ }
+ va_list_escapes = true;
+ }
}
for (i = gsi_start_bb (bb);
if (is_gimple_assign (stmt))
{
- tree lhs = gimple_assign_lhs (stmt);
- tree rhs = gimple_assign_rhs1 (stmt);
+ lhs = gimple_assign_lhs (stmt);
+ rhs = gimple_assign_rhs1 (stmt);
if (va_list_simple_ptr)
{
}
single_iter_cost = vect_get_single_scalar_iteration_cost (loop_vinfo);
- outside_cost += vect_get_known_peeling_cost (loop_vinfo, elem->npeel,
- &dummy, single_iter_cost,
- &prologue_cost_vec,
- &epilogue_cost_vec);
+ outside_cost += vect_get_known_peeling_cost
+ (loop_vinfo, elem->npeel, &dummy,
+ /* ??? We use this cost as number of stmts with scalar_stmt cost,
+ thus divide by that. This introduces rounding errors, thus better
+ introduce a new cost kind (raw_cost? scalar_iter_cost?). */
+ single_iter_cost / vect_get_stmt_cost (scalar_stmt),
+ &prologue_cost_vec, &epilogue_cost_vec);
/* Prologue and epilogue costs are added to the target model later.
These costs depend only on the scalar iteration cost, the
statements. */
scalar_single_iter_cost = vect_get_single_scalar_iteration_cost (loop_vinfo);
+ /* ??? Below we use this cost as number of stmts with scalar_stmt cost,
+ thus divide by that. This introduces rounding errors, thus better
+ introduce a new cost kind (raw_cost? scalar_iter_cost?). */
+ int scalar_single_iter_stmts
+ = scalar_single_iter_cost / vect_get_stmt_cost (scalar_stmt);
/* Add additional cost for the peeled instructions in prologue and epilogue
loop.
/* FORNOW: Don't attempt to pass individual scalar instructions to
the model; just assume linear cost for scalar iterations. */
(void) add_stmt_cost (target_cost_data,
- peel_iters_prologue * scalar_single_iter_cost,
+ peel_iters_prologue * scalar_single_iter_stmts,
scalar_stmt, NULL, 0, vect_prologue);
(void) add_stmt_cost (target_cost_data,
- peel_iters_epilogue * scalar_single_iter_cost,
+ peel_iters_epilogue * scalar_single_iter_stmts,
scalar_stmt, NULL, 0, vect_epilogue);
}
else
(void) vect_get_known_peeling_cost (loop_vinfo, peel_iters_prologue,
&peel_iters_epilogue,
- scalar_single_iter_cost,
+ scalar_single_iter_stmts,
&prologue_cost_vec,
&epilogue_cost_vec);
&& !STMT_VINFO_LIVE_P (exit_phi_vinfo))
|| double_reduc);
- STMT_VINFO_VEC_STMT (exit_phi_vinfo) = epilog_stmt;
+ if (double_reduc)
+ STMT_VINFO_VEC_STMT (exit_phi_vinfo) = inner_phi;
+ else
+ STMT_VINFO_VEC_STMT (exit_phi_vinfo) = epilog_stmt;
if (!double_reduc
|| STMT_VINFO_DEF_TYPE (exit_phi_vinfo)
!= vect_double_reduction_def)
if (!vectype_in)
vectype_in = tem;
gcc_assert (is_simple_use);
+ if (!found_nested_cycle_def)
+ reduc_def_stmt = def_stmt;
+
+ if (reduc_def_stmt && gimple_code (reduc_def_stmt) != GIMPLE_PHI)
+ return false;
+
if (!(dt == vect_reduction_def
|| dt == vect_nested_cycle
|| ((dt == vect_internal_def || dt == vect_external_def
gcc_assert (orig_stmt);
return false;
}
- if (!found_nested_cycle_def)
- reduc_def_stmt = def_stmt;
- gcc_assert (gimple_code (reduc_def_stmt) == GIMPLE_PHI);
if (orig_stmt)
gcc_assert (orig_stmt == vect_is_simple_reduction (loop_vinfo,
reduc_def_stmt,
#include "optabs.h"
#include "tree-vectorizer.h"
#include "langhooks.h"
+#include "gimple-walk.h"
/* Extract the location of the basic block in the source code.
Return the basic block location if succeed and NULL if not. */
??? We should enhance this to only disallow gaps
inside vectors. */
if ((unrolling_factor > 1
- && GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt)) == stmt
- && GROUP_GAP (vinfo_for_stmt (stmt)) != 0)
+ && ((GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt)) == stmt
+ && GROUP_GAP (vinfo_for_stmt (stmt)) != 0)
+ /* If the group is split up then GROUP_GAP
+ isn't correct here, nor is GROUP_FIRST_ELEMENT. */
+ || GROUP_SIZE (vinfo_for_stmt (stmt)) > group_size))
|| (GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt)) != stmt
&& GROUP_GAP (vinfo_for_stmt (stmt)) != 1))
{
can't be SLPed) in the tree rooted at NODE. Mark such stmts as HYBRID. */
static void
-vect_detect_hybrid_slp_stmts (slp_tree node)
+vect_detect_hybrid_slp_stmts (slp_tree node, unsigned i, slp_vect_type stype)
{
- int i;
- vec<gimple> stmts = SLP_TREE_SCALAR_STMTS (node);
- gimple stmt = stmts[0];
+ gimple stmt = SLP_TREE_SCALAR_STMTS (node)[i];
imm_use_iterator imm_iter;
gimple use_stmt;
- stmt_vec_info stmt_vinfo = vinfo_for_stmt (stmt);
+ stmt_vec_info use_vinfo, stmt_vinfo = vinfo_for_stmt (stmt);
slp_tree child;
loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo);
- struct loop *loop = NULL;
- bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo);
- basic_block bb = NULL;
+ struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
+ int j;
+
+ /* Propagate hybrid down the SLP tree. */
+ if (stype == hybrid)
+ ;
+ else if (HYBRID_SLP_STMT (stmt_vinfo))
+ stype = hybrid;
+ else
+ {
+ /* Check if a pure SLP stmt has uses in non-SLP stmts. */
+ gcc_checking_assert (PURE_SLP_STMT (stmt_vinfo));
+ if (TREE_CODE (gimple_op (stmt, 0)) == SSA_NAME)
+ FOR_EACH_IMM_USE_STMT (use_stmt, imm_iter, gimple_op (stmt, 0))
+ if (gimple_bb (use_stmt)
+ && flow_bb_inside_loop_p (loop, gimple_bb (use_stmt))
+ && (use_vinfo = vinfo_for_stmt (use_stmt))
+ && !STMT_SLP_TYPE (use_vinfo)
+ && (STMT_VINFO_RELEVANT (use_vinfo)
+ || VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (use_vinfo))
+ || (STMT_VINFO_IN_PATTERN_P (use_vinfo)
+ && STMT_VINFO_RELATED_STMT (use_vinfo)
+ && !STMT_SLP_TYPE (vinfo_for_stmt
+ (STMT_VINFO_RELATED_STMT (use_vinfo)))))
+ && !(gimple_code (use_stmt) == GIMPLE_PHI
+ && STMT_VINFO_DEF_TYPE (use_vinfo) == vect_reduction_def))
+ stype = hybrid;
+ }
+
+ if (stype == hybrid)
+ STMT_SLP_TYPE (stmt_vinfo) = hybrid;
+
+ FOR_EACH_VEC_ELT (SLP_TREE_CHILDREN (node), j, child)
+ vect_detect_hybrid_slp_stmts (child, i, stype);
+}
- if (!node)
- return;
+/* Helpers for vect_detect_hybrid_slp walking pattern stmt uses. */
- if (loop_vinfo)
- loop = LOOP_VINFO_LOOP (loop_vinfo);
- else
- bb = BB_VINFO_BB (bb_vinfo);
+static tree
+vect_detect_hybrid_slp_1 (tree *tp, int *, void *data)
+{
+ walk_stmt_info *wi = (walk_stmt_info *)data;
+ struct loop *loopp = (struct loop *)wi->info;
- FOR_EACH_VEC_ELT (SLP_TREE_SCALAR_STMTS (node), i, stmt)
- if (PURE_SLP_STMT (vinfo_for_stmt (stmt))
- && TREE_CODE (gimple_op (stmt, 0)) == SSA_NAME)
- FOR_EACH_IMM_USE_STMT (use_stmt, imm_iter, gimple_op (stmt, 0))
- if (gimple_bb (use_stmt)
- && ((loop && flow_bb_inside_loop_p (loop, gimple_bb (use_stmt)))
- || bb == gimple_bb (use_stmt))
- && (stmt_vinfo = vinfo_for_stmt (use_stmt))
- && !STMT_SLP_TYPE (stmt_vinfo)
- && (STMT_VINFO_RELEVANT (stmt_vinfo)
- || VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_vinfo))
- || (STMT_VINFO_IN_PATTERN_P (stmt_vinfo)
- && STMT_VINFO_RELATED_STMT (stmt_vinfo)
- && !STMT_SLP_TYPE (vinfo_for_stmt (STMT_VINFO_RELATED_STMT (stmt_vinfo)))))
- && !(gimple_code (use_stmt) == GIMPLE_PHI
- && STMT_VINFO_DEF_TYPE (stmt_vinfo)
- == vect_reduction_def))
- vect_mark_slp_stmts (node, hybrid, i);
+ if (wi->is_lhs)
+ return NULL_TREE;
- FOR_EACH_VEC_ELT (SLP_TREE_CHILDREN (node), i, child)
- vect_detect_hybrid_slp_stmts (child);
+ if (TREE_CODE (*tp) == SSA_NAME
+ && !SSA_NAME_IS_DEFAULT_DEF (*tp))
+ {
+ gimple def_stmt = SSA_NAME_DEF_STMT (*tp);
+ if (flow_bb_inside_loop_p (loopp, gimple_bb (def_stmt))
+ && PURE_SLP_STMT (vinfo_for_stmt (def_stmt)))
+ STMT_SLP_TYPE (vinfo_for_stmt (def_stmt)) = hybrid;
+ }
+
+ return NULL_TREE;
}
+static tree
+vect_detect_hybrid_slp_2 (gimple_stmt_iterator *gsi, bool *handled,
+ walk_stmt_info *)
+{
+ /* If the stmt is in a SLP instance then this isn't a reason
+ to mark use definitions in other SLP instances as hybrid. */
+ if (STMT_SLP_TYPE (vinfo_for_stmt (gsi_stmt (*gsi))) != loop_vect)
+ *handled = true;
+ return NULL_TREE;
+}
/* Find stmts that must be both vectorized and SLPed. */
dump_printf_loc (MSG_NOTE, vect_location, "=== vect_detect_hybrid_slp ==="
"\n");
+ /* First walk all pattern stmt in the loop and mark defs of uses as
+ hybrid because immediate uses in them are not recorded. */
+ for (i = 0; i < LOOP_VINFO_LOOP (loop_vinfo)->num_nodes; ++i)
+ {
+ basic_block bb = LOOP_VINFO_BBS (loop_vinfo)[i];
+ for (gimple_stmt_iterator gsi = gsi_start_bb (bb); !gsi_end_p (gsi);
+ gsi_next (&gsi))
+ {
+ gimple stmt = gsi_stmt (gsi);
+ stmt_vec_info stmt_info = vinfo_for_stmt (stmt);
+ if (STMT_VINFO_IN_PATTERN_P (stmt_info))
+ {
+ walk_stmt_info wi;
+ memset (&wi, 0, sizeof (wi));
+ wi.info = LOOP_VINFO_LOOP (loop_vinfo);
+ gimple_stmt_iterator gsi2
+ = gsi_for_stmt (STMT_VINFO_RELATED_STMT (stmt_info));
+ walk_gimple_stmt (&gsi2, vect_detect_hybrid_slp_2,
+ vect_detect_hybrid_slp_1, &wi);
+ walk_gimple_seq (STMT_VINFO_PATTERN_DEF_SEQ (stmt_info),
+ vect_detect_hybrid_slp_2,
+ vect_detect_hybrid_slp_1, &wi);
+ }
+ }
+ }
+
+ /* Then walk the SLP instance trees marking stmts with uses in
+ non-SLP stmts as hybrid, also propagating hybrid down the
+ SLP tree, collecting the above info on-the-fly. */
FOR_EACH_VEC_ELT (slp_instances, i, instance)
- vect_detect_hybrid_slp_stmts (SLP_INSTANCE_TREE (instance));
+ {
+ for (unsigned i = 0; i < SLP_INSTANCE_GROUP_SIZE (instance); ++i)
+ vect_detect_hybrid_slp_stmts (SLP_INSTANCE_TREE (instance),
+ i, pure_slp);
+ }
}
substitute_and_fold (op_with_constant_singleton_value_range,
vrp_fold_stmt, false);
- if (warn_array_bounds)
+ if (warn_array_bounds && first_pass_instance)
check_all_array_refs ();
/* We must identify jump threading opportunities before we release
fputs (ASM_APP_OFF, asm_out_file);
if (targetm.asm_file_start_file_directive)
- output_file_directive (asm_out_file, main_input_filename);
+ {
+ /* LTO produced units have no meaningful main_input_filename. */
+ if (in_lto_p)
+ output_file_directive (asm_out_file, "<artificial>");
+ else
+ output_file_directive (asm_out_file, main_input_filename);
+ }
}
/* This is a generic routine suitable for use as TARGET_ASM_FILE_END
+2015-02-26 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ Backported from mainline r213870
+
+ * config/mips/mips16.S: Do not build for soft-float.
+
+2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
+
+ Backported from mainline
+ 2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
+
+ * config/arm/bpabi.S (test_div_by_zero): Make label names
+ consistent between thumb2 and arm mode cases. Separate the
+ signed comparison on the high word of the numerator from the
+ unsigned comparison on the low word.
+ * config/arm/bpabi-v6m.S (test_div_by_zero): Similarly separate
+ signed comparison.
+
2015-02-01 H.J. Lu <hongjiu.lu@intel.com>
Backported from mainline
cmp yyl, #0
bne 7f
cmp xxh, #0
+ .ifc \signed, unsigned
bne 2f
cmp xxl, #0
2:
- .ifc \signed, unsigned
beq 3f
mov xxh, #0
mvn xxh, xxh @ 0xffffffff
mov xxl, xxh
3:
.else
- beq 5f
blt 6f
- mov xxl, #0
+ bgt 4f
+ cmp xxl, #0
+ beq 5f
+4: mov xxl, #0
mvn xxl, xxl @ 0xffffffff
lsr xxh, xxl, #1 @ 0x7fffffff
b 5f
/* Tail-call to divide-by-zero handlers which may be overridden by the user,
so unwinding works properly. */
#if defined(__thumb2__)
- cbnz yyh, 1f
- cbnz yyl, 1f
+ cbnz yyh, 2f
+ cbnz yyl, 2f
cmp xxh, #0
+ .ifc \signed, unsigned
do_it eq
cmpeq xxl, #0
- .ifc \signed, unsigned
- beq 2f
- mov xxh, #0xffffffff
- mov xxl, xxh
-2:
+ do_it ne, t
+ movne xxh, #0xffffffff
+ movne xxl, #0xffffffff
.else
- do_it lt, t
+ do_it lt, tt
movlt xxl, #0
movlt xxh, #0x80000000
- do_it gt, t
- movgt xxh, #0x7fffffff
- movgt xxl, #0xffffffff
+ blt 1f
+ do_it eq
+ cmpeq xxl, #0
+ do_it ne, t
+ movne xxh, #0x7fffffff
+ movne xxl, #0xffffffff
.endif
+1:
b SYM (__aeabi_ldiv0) __PLT__
-1:
+2:
#else
/* Note: Thumb-1 code calls via an ARM shim on processors which
support ARM mode. */
cmpeq yyl, #0
bne 2f
cmp xxh, #0
- cmpeq xxl, #0
.ifc \signed, unsigned
+ cmpeq xxl, #0
movne xxh, #0xffffffff
movne xxl, #0xffffffff
.else
movlt xxh, #0x80000000
movlt xxl, #0
- movgt xxh, #0x7fffffff
- movgt xxl, #0xffffffff
+ blt 1f
+ cmpeq xxl, #0
+ movne xxh, #0x7fffffff
+ movne xxl, #0xffffffff
.endif
+1:
b SYM (__aeabi_ldiv0) __PLT__
2:
#endif
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-#ifdef __mips_micromips
- /* DO NOTHING */
+#if defined(__mips_micromips) || defined(__mips_soft_float)
+ /* Do nothing because this code is only needed when linking
+ against mips16 hard-float objects. Neither micromips code
+ nor soft-float code can be linked against mips16 hard-float
+ objects so we do not need these routines when building libgcc
+ for those cases. */
#else
/* This file contains mips16 floating point support functions. These
#endif /* !__mips_single_float */
#endif
-#endif /* __mips_micromips */
+#endif /* defined(__mips_micromips) || defined(__mips_soft_float) */
+2015-02-11 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/64824
+ * testsuite/libgomp.c/atomic-18.c: New test.
+ * testsuite/libgomp.c++/atomic-16.C: New test.
+
+ Backported from mainline
+ 2015-02-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/64824
+ PR c/64868
+ * testsuite/libgomp.c/pr64824.c: New test.
+ * testsuite/libgomp.c/pr64868.c: New test.
+ * testsuite/libgomp.c++/pr64824.C: New test.
+ * testsuite/libgomp.c++/pr64868.C: New test.
+
2015-01-23 Jakub Jelinek <jakub@redhat.com>
PR middle-end/64734
--- /dev/null
+// PR c/64824
+// { dg-do run }
+// { dg-options "-O2 -fopenmp" }
+
+#include "../libgomp.c/atomic-18.c"
--- /dev/null
+// PR c/64824
+// { dg-do run }
+// { dg-options "-O2 -fopenmp" }
+
+#include "../libgomp.c/pr64824.c"
--- /dev/null
+// PR c/64868
+// { dg-do run }
+// { dg-options "-O2 -fopenmp" }
+
+#include "../libgomp.c/pr64868.c"
--- /dev/null
+/* PR c/64824 */
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp" } */
+
+void
+f1 (void)
+{
+ short a;
+ short b = 1;
+ int c = 3;
+#pragma omp atomic capture
+ a = b = c << b;
+ if (b != 6 || a != 6)
+ __builtin_abort ();
+}
+
+void
+f2 (void)
+{
+ short a;
+ short b = 1;
+ int c = 3;
+#pragma omp atomic capture
+ a = b = c + b;
+ if (b != 4 || a != 4)
+ __builtin_abort ();
+}
+
+void
+f3 (void)
+{
+ short a;
+ short b = 1;
+ long long int c = 3;
+#pragma omp atomic capture
+ a = b = c + b;
+ if (b != 4 || a != 4)
+ __builtin_abort ();
+}
+
+void
+f4 (void)
+{
+ char a;
+ char b = 1;
+ long long int c = 3LL;
+#pragma omp atomic capture
+ a = b = c << b;
+ if (b != 6 || a != 6)
+ __builtin_abort ();
+}
+
+int
+main ()
+{
+ f1 ();
+ f2 ();
+ f3 ();
+ f4 ();
+ return 0;
+}
--- /dev/null
+/* PR c/64824 */
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp" } */
+
+int
+main ()
+{
+ long long a;
+ long long b = 1LL;
+ int c = 3;
+#pragma omp atomic capture
+ a = b = c << b;
+ if (b != 6LL || a != 6LL)
+ __builtin_abort ();
+ return 0;
+}
--- /dev/null
+/* PR c/64868 */
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp" } */
+
+float f = 2.0f;
+double d = 4.0;
+long double ld = 8.0L;
+
+void
+foo ()
+{
+#pragma omp atomic
+ f = 1.0f / f;
+#pragma omp atomic
+ f = 1 / f;
+#pragma omp atomic
+ f = f / 2.0f;
+#pragma omp atomic
+ f = f / 2;
+#pragma omp atomic
+ f /= 2.0f;
+#pragma omp atomic
+ f /= 2;
+#pragma omp atomic
+ d = 1.0 / d;
+#pragma omp atomic
+ d = 1 / d;
+#pragma omp atomic
+ d = d / 2.0;
+#pragma omp atomic
+ d = d / 2;
+#pragma omp atomic
+ d /= 2.0;
+#pragma omp atomic
+ d /= 2;
+#pragma omp atomic
+ ld = 1.0L / ld;
+#pragma omp atomic
+ ld = 1 / ld;
+#pragma omp atomic
+ ld = ld / 2.0L;
+#pragma omp atomic
+ ld = ld / 2;
+#pragma omp atomic
+ ld /= 2.0L;
+#pragma omp atomic
+ ld /= 2;
+ if (f != 0.125f || d != 0.25 || ld != 0.5L)
+ __builtin_abort ();
+}
+
+#ifdef __cplusplus
+template <typename T, int N1, int N2>
+void
+bar ()
+{
+ T v = ::d;
+#pragma omp atomic
+ v *= 16;
+#pragma omp atomic
+ v = 1.0 / v;
+#pragma omp atomic
+ v = N1 / v;
+#pragma omp atomic
+ v = v / 2.0;
+#pragma omp atomic
+ v = v / N2;
+#pragma omp atomic
+ v /= 2.0;
+#pragma omp atomic
+ v /= N2;
+ if (v != 0.25)
+ __builtin_abort ();
+}
+#endif
+
+int
+main ()
+{
+ foo ();
+#ifdef __cplusplus
+ bar<float, 1, 2> ();
+ bar<double, 1, 2> ();
+ bar<long double, 1, 2> ();
+#endif
+ return 0;
+}
projects / platform / upstream / linaro-gcc.git / commitdiff