spi: Move cadence-quadspi driver to drivers/spi/
authorRamuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Mon, 1 Jun 2020 07:04:44 +0000 (12:34 +0530)
committerMark Brown <broonie@kernel.org>
Fri, 19 Jun 2020 13:26:54 +0000 (14:26 +0100)
Now that cadence-quadspi has been converted to use spi-mem framework,
move it under drivers/spi/

Update license header to match SPI subsystem style

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200601070444.16923-9-vigneshr@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/mtd/spi-nor/controllers/Kconfig
drivers/mtd/spi-nor/controllers/Makefile
drivers/spi/Kconfig
drivers/spi/Makefile
drivers/spi/spi-cadence-quadspi.c [moved from drivers/mtd/spi-nor/controllers/cadence-quadspi.c with 99% similarity]

index d89a5ea..5c0e0ec 100644 (file)
@@ -9,17 +9,6 @@ config SPI_ASPEED_SMC
          and support for the SPI flash memory controller (SPI) for
          the host firmware. The implementation only supports SPI NOR.
 
-config SPI_CADENCE_QUADSPI
-       tristate "Cadence Quad SPI controller"
-       depends on OF && (ARM || ARM64 || COMPILE_TEST)
-       help
-         Enable support for the Cadence Quad SPI Flash controller.
-
-         Cadence QSPI is a specialized controller for connecting an SPI
-         Flash over 1/2/4-bit wide bus. Enable this option if you have a
-         device with a Cadence QSPI controller and want to access the
-         Flash as an MTD device.
-
 config SPI_HISI_SFC
        tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
        depends on ARCH_HISI || COMPILE_TEST
index 46e6fbe..e7abba4 100644 (file)
@@ -1,6 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_SPI_ASPEED_SMC)   += aspeed-smc.o
-obj-$(CONFIG_SPI_CADENCE_QUADSPI)      += cadence-quadspi.o
 obj-$(CONFIG_SPI_HISI_SFC)     += hisi-sfc.o
 obj-$(CONFIG_SPI_NXP_SPIFI)    += nxp-spifi.o
 obj-$(CONFIG_SPI_INTEL_SPI)    += intel-spi.o
index 8f1f8fc..6fbb7fe 100644 (file)
@@ -200,6 +200,17 @@ config SPI_CADENCE
          This selects the Cadence SPI controller master driver
          used by Xilinx Zynq and ZynqMP.
 
+config SPI_CADENCE_QUADSPI
+       tristate "Cadence Quad SPI controller"
+       depends on OF && (ARM || ARM64 || COMPILE_TEST)
+       help
+         Enable support for the Cadence Quad SPI Flash controller.
+
+         Cadence QSPI is a specialized controller for connecting an SPI
+         Flash over 1/2/4-bit wide bus. Enable this option if you have a
+         device with a Cadence QSPI controller and want to access the
+         Flash as an MTD device.
+
 config SPI_CLPS711X
        tristate "CLPS711X host SPI controller"
        depends on ARCH_CLPS711X || COMPILE_TEST
index d2e41d3..81092ca 100644 (file)
@@ -31,6 +31,7 @@ obj-$(CONFIG_SPI_BCM_QSPI)            += spi-iproc-qspi.o spi-brcmstb-qspi.o spi-bcm-qspi.
 obj-$(CONFIG_SPI_BITBANG)              += spi-bitbang.o
 obj-$(CONFIG_SPI_BUTTERFLY)            += spi-butterfly.o
 obj-$(CONFIG_SPI_CADENCE)              += spi-cadence.o
+obj-$(CONFIG_SPI_CADENCE_QUADSPI)      += spi-cadence-quadspi.o
 obj-$(CONFIG_SPI_CLPS711X)             += spi-clps711x.o
 obj-$(CONFIG_SPI_COLDFIRE_QSPI)                += spi-coldfire-qspi.o
 obj-$(CONFIG_SPI_DAVINCI)              += spi-davinci.o
similarity index 99%
rename from drivers/mtd/spi-nor/controllers/cadence-quadspi.c
rename to drivers/spi/spi-cadence-quadspi.c
index c12a1c0..1c1a9d1 100644 (file)
@@ -1,11 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0-only
-/*
- * Driver for Cadence QSPI Controller
- *
- * Copyright Altera Corporation (C) 2012-2014. All rights reserved.
- * Copyright Intel Corporation (C) 2019-2020. All rights reserved.
- * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
- */
+//
+// Driver for Cadence QSPI Controller
+//
+// Copyright Altera Corporation (C) 2012-2014. All rights reserved.
+// Copyright Intel Corporation (C) 2019-2020. All rights reserved.
+// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
+
 #include <linux/clk.h>
 #include <linux/completion.h>
 #include <linux/delay.h>