Make these tests work more reliably with Release builds.

Differential Revision: https://reviews.llvm.org/D26827

llvm-svn: 287851

diff --git a/clang/test/OpenMP/for_simd_codegen.cpp b/clang/test/OpenMP/for_simd_codegen.cpp
index 08b5606..89f779d 100644 (file)
--- a/clang/test/OpenMP/for_simd_codegen.cpp
+++ b/clang/test/OpenMP/for_simd_codegen.cpp
@@ -16,12 +16,12 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -32,7 +32,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
   for (int i = 3; i < 32; i += 5) {
-// CHECK: [[SIMPLE_LOOP1_BODY]]
+// CHECK: [[SIMPLE_LOOP1_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
@@ -47,7 +47,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
 // br label %{{.+}}, !llvm.loop !{{.+}}
   }
-// CHECK: [[SIMPLE_LOOP1_END]]
+// CHECK: [[SIMPLE_LOOP1_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 
@@ -63,7 +63,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}})
 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0
 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]
-// CHECK: [[CONT]]
+// CHECK: [[CONT]]:
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]],
 
@@ -72,7 +72,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
   for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP2_BODY]]
+// CHECK: [[SIMPLE_LOOP2_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
@@ -94,7 +94,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
   }
-// CHECK: [[SIMPLE_LOOP2_END]]
+// CHECK: [[SIMPLE_LOOP2_END]]:
 //
 // Update linear vars after loop, as the loop was operating on a private version.
 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
@@ -120,12 +120,12 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
@@ -136,7 +136,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
   for (unsigned long long it = 2000; it >= 600; it-=400) {
-// CHECK: [[SIMPLE_LOOP3_BODY]]
+// CHECK: [[SIMPLE_LOOP3_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
@@ -162,7 +162,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]
   }
-// CHECK: [[SIMPLE_LOOP3_END]]
+// CHECK: [[SIMPLE_LOOP3_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 //
 // Linear start and step are used to calculate final value of the linear variables.
@@ -178,12 +178,12 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -194,7 +194,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
   for (short it = 6; it <= 20; it-=-4) {
-// CHECK: [[SIMPLE_LOOP4_BODY]]
+// CHECK: [[SIMPLE_LOOP4_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
@@ -206,7 +206,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]
   }
-// CHECK: [[SIMPLE_LOOP4_END]]
+// CHECK: [[SIMPLE_LOOP4_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 
@@ -215,12 +215,12 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -231,7 +231,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
-// CHECK: [[SIMPLE_LOOP5_BODY]]
+// CHECK: [[SIMPLE_LOOP5_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]
 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
@@ -243,7 +243,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]
   }
-// CHECK: [[SIMPLE_LOOP5_END]]
+// CHECK: [[SIMPLE_LOOP5_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 
@@ -262,25 +262,25 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]],
 
 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP7_COND]]
+// CHECK: [[SIMD_LOOP7_COND]]:
 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]
 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
   for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP7_BODY]]
+// CHECK: [[SIMPLE_LOOP7_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
@@ -294,7 +294,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]
   }
-// CHECK: [[SIMPLE_LOOP7_END]]
+// CHECK: [[SIMPLE_LOOP7_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: load i32, i32*
 // CHECK: icmp ne i32 %{{.+}}, 0
@@ -315,25 +315,25 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]],
 
 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP8_COND]]
+// CHECK: [[SIMD_LOOP8_COND]]:
 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]
 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
   for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP8_BODY]]
+// CHECK: [[SIMPLE_LOOP8_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
@@ -346,7 +346,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]
   }
-// CHECK: [[SIMPLE_LOOP8_END]]
+// CHECK: [[SIMPLE_LOOP8_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call i32 @__kmpc_reduce(
 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
@@ -376,12 +376,12 @@ int templ1(T a, T *z) {
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
@@ -393,7 +393,7 @@ int templ1(T a, T *z) {
 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
 // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
-// CHECK: [[T1_BODY]]
+// CHECK: [[T1_BODY]]:
 // Loop counters i and j updates:
 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]
 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
@@ -411,7 +411,7 @@ int templ1(T a, T *z) {
 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]
 // CHECK-NEXT: br label {{%.+}}
-// CHECK: [[T1_END]]
+// CHECK: [[T1_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: ret i32 0
@@ -468,13 +468,13 @@ void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -485,7 +485,7 @@ void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
   for (IterDouble i = ia; i < ib; ++i) {
-// CHECK: [[IT_BODY]]
+// CHECK: [[IT_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]
 // Call of operator+ (i, IV).
@@ -503,7 +503,7 @@ void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]
 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
   }
-// CHECK: [[IT_END]]
+// CHECK: [[IT_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: ret void
@@ -520,12 +520,12 @@ void collapsed(float *a, float *b, float *c, float *d) {
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -542,7 +542,7 @@ void collapsed(float *a, float *b, float *c, float *d) {
       for (int k = 3; k <= 6; k++) // 4 iterations
         for (l = 4; l < 9; ++l) // 5 iterations
         {
-// CHECK: [[COLL1_BODY]]
+// CHECK: [[COLL1_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]
 // Calculation of the loop counters values.
@@ -577,7 +577,7 @@ void collapsed(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]
 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
-// CHECK: [[COLL1_END]]
+// CHECK: [[COLL1_END]]:
   }
 // i,j,l are updated; k is not updated.
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
@@ -609,13 +609,13 @@ void widened(float *a, float *b, float *c, float *d) {
 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
@@ -630,7 +630,7 @@ void widened(float *a, float *b, float *c, float *d) {
   for (i = 1; i < 3; i++) // 2 iterations
     for (j = 0; j < foo(); j++) // foo() iterations
   {
-// CHECK: [[WIDE1_BODY]]
+// CHECK: [[WIDE1_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]
 // Calculation of the loop counters values...
@@ -654,7 +654,7 @@ void widened(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
 //
 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
-// CHECK: [[WIDE1_END]]
+// CHECK: [[WIDE1_END]]:
   }
 // i,j are updated.
 // CHECK: store i32 3, i32* [[I:%[^,]+]]

diff --git a/clang/test/OpenMP/simd_codegen.cpp b/clang/test/OpenMP/simd_codegen.cpp
index fc1262c..2cc099f 100644 (file)
--- a/clang/test/OpenMP/simd_codegen.cpp
+++ b/clang/test/OpenMP/simd_codegen.cpp
@@ -1,706 +1,706 @@
-// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
-// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
-// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
-// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
-// expected-no-diagnostics
- #ifndef HEADER
- #define HEADER
-
-// CHECK: [[SS_TY:%.+]] = type { i32 }
-
-long long get_val() { return 0; }
-double *g_ptr;
-
-// CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
-void simple(float *a, float *b, float *c, float *d) {
-  #pragma omp simd
-// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
-
-// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], 6
-// CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
-  for (int i = 3; i < 32; i += 5) {
-// CHECK: [[SIMPLE_LOOP1_BODY]]
-// Start of body: calculate i from IV:
-// CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
-// CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
-// CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
-// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
-// ... loop body ...
-// End of body: store into a[i]:
-// CHECK: store float [[RESULT:%.+]], float* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
-    a[i] = b[i] * c[i] * d[i];
-// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
-// CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
-// CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
-// br label %{{.+}}, !llvm.loop !{{.+}}
-  }
-// CHECK: [[SIMPLE_LOOP1_END]]
-
-  long long k = get_val();
-
-  #pragma omp simd linear(k : 3)
-// CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
-// CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
-// CHECK: store i32 0, i32* [[OMP_IV2:%[^,]+]]
-// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]]
-// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
-
-// CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV2]], 9
-// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
-  for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP2_BODY]]
-// Start of body: calculate i from IV:
-// CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
-// FIXME: It is interesting, why the following "mul 1" was not constant folded?
-// CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
-// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
-// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
-//
-// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
-// CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
-// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
-// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
-// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
-// Update of the privatized version of linear variable!
-// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
-    a[k]++;
-    k = k + 3;
-// CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
-// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
-// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
-// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP2_END]]
-//
-// Update linear vars after loop, as the loop was operating on a private version.
-// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
-// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
-// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_VAR]]
-//
-
-  int lin = 12;
-  #pragma omp simd linear(lin : get_val()), linear(g_ptr)
-
-// Init linear private var.
-// CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
-// CHECK: store i64 0, i64* [[OMP_IV3:%[^,]+]]
-
-// CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
-// CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
-// Remember linear step.
-// CHECK: [[CALL_VAL:%.+]] = invoke
-// CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
-
-// CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]]
-// CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
-
-// CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP3:%.+]] = icmp ult i64 [[IV3]], 4
-// CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
-  for (unsigned long long it = 2000; it >= 600; it-=400) {
-// CHECK: [[SIMPLE_LOOP3_BODY]]
-// Start of body: calculate it from IV:
-// CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
-// CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
-// CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-//
-// Linear start and step are used to calculate current value of the linear variable.
-// CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
-// CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
-// CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-    *g_ptr++ = 0.0;
-// CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK: store double{{.*}}[[GEP_VAL]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-    a[it + lin]++;
-// CHECK: [[FLT_INC:%.+]] = fadd float
-// CHECK-NEXT: store float [[FLT_INC]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-// CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
-// CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP3_END]]
-//
-// Linear start and step are used to calculate final value of the linear variables.
-// CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
-// CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
-// CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
-// CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
-// CHECK: store double* {{.*}}[[GLIN_VAR]]
-
-  #pragma omp simd
-// CHECK: store i32 0, i32* [[OMP_IV4:%[^,]+]]
-
-// CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP4:%.+]] = icmp slt i32 [[IV4]], 4
-// CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
-  for (short it = 6; it <= 20; it-=-4) {
-// CHECK: [[SIMPLE_LOOP4_BODY]]
-// Start of body: calculate it from IV:
-// CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
-// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
-// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
-// CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
-// CHECK-NEXT: store i16 [[LC_IT_3]], i16* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
-
-// CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
-// CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
-// CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP4_END]]
-
-  #pragma omp simd
-// CHECK: store i32 0, i32* [[OMP_IV5:%[^,]+]]
-
-// CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP5:%.+]] = icmp slt i32 [[IV5]], 26
-// CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
-  for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
-// CHECK: [[SIMPLE_LOOP5_BODY]]
-// Start of body: calculate it from IV:
-// CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
-// CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
-// CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
-// CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
-// CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
-
-// CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
-// CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
-// CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP5_END]]
-
-// CHECK-NOT: mul i32 %{{.+}}, 10
-  #pragma omp simd
-  for (unsigned i=100; i<10; i+=10) {
-  }
-
-  int A;
-  // CHECK: store i32 -1, i32* [[A:%.+]],
-  A = -1;
-  #pragma omp simd lastprivate(A)
-// CHECK: store i64 0, i64* [[OMP_IV7:%[^,]+]]
-// CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP7_COND]]
-// CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP7:%.+]] = icmp slt i64 [[IV7]], 7
-// CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
-  for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP7_BODY]]
-// Start of body: calculate i from IV:
-// CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
-// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
-// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
-// CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
-// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
-// CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
-// CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
-    A = i;
-// CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
-// CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
-// CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP7_END]]
-// CHECK-NEXT: store i64 11, i64*
-// CHECK-NEXT: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
-// CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* [[A]],
-  int R;
-  // CHECK: store i32 -1, i32* [[R:%[^,]+]],
-  R = -1;
-// CHECK: store i64 0, i64* [[OMP_IV8:%[^,]+]],
-// CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
-  #pragma omp simd reduction(*:R)
-// CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP8_COND]]
-// CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP8:%.+]] = icmp slt i64 [[IV8]], 7
-// CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
-  for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP8_BODY]]
-// Start of body: calculate i from IV:
-// CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
-// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
-// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
-// CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
-// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
-// CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
-    R *= i;
-// CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
-// CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
-// CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP8_END]]
-// CHECK-DAG: [[R_VAL:%.+]] = load i32, i32* [[R]],
-// CHECK-DAG: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
-// CHECK: [[RED:%.+]] = mul nsw i32 [[R_VAL]], [[R_PRIV_VAL]]
-// CHECK-NEXT: store i32 [[RED]], i32* [[R]],
-// CHECK-NEXT: ret void
-}
-
-template <class T, unsigned K> T tfoo(T a) { return a + K; }
-
-template <typename T, unsigned N>
-int templ1(T a, T *z) {
-  #pragma omp simd collapse(N)
-  for (int i = 0; i < N * 2; i++) {
-    for (long long j = 0; j < (N + N + N + N); j += 2) {
-      z[i + j] = a + tfoo<T, N>(i + j);
-    }
-  }
-  return 0;
-}
-
-// Instatiation templ1<float,2>
-// CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
-// CHECK: store i64 0, i64* [[T1_OMP_IV:[^,]+]]
-// ...
-// CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP1:%.+]] = icmp slt i64 [[IV]], 16
-// CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
-// CHECK: [[T1_BODY]]
-// Loop counters i and j updates:
-// CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
-// CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
-// CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
-// CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
-// CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
-// CHECK-NEXT: store i32 [[I_2]], i32* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
-// CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
-// CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
-// CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
-// CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
-// CHECK-NEXT: store i64 [[J_2_ADD0]], i64* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
-// simd.for.inc:
-// CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
-// CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
-// CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
-// CHECK-NEXT: br label {{%.+}}
-// CHECK: [[T1_END]]
-// CHECK: ret i32 0
-//
-void inst_templ1() {
-  float a;
-  float z[100];
-  templ1<float,2> (a, z);
-}
-
-
-typedef int MyIdx;
-
-class IterDouble {
-  double *Ptr;
-public:
-  IterDouble operator++ () const {
-    IterDouble n;
-    n.Ptr = Ptr + 1;
-    return n;
-  }
-  bool operator < (const IterDouble &that) const {
-    return Ptr < that.Ptr;
-  }
-  double & operator *() const {
-    return *Ptr;
-  }
-  MyIdx operator - (const IterDouble &that) const {
-    return (MyIdx) (Ptr - that.Ptr);
-  }
-  IterDouble operator + (int Delta) {
-    IterDouble re;
-    re.Ptr = Ptr + Delta;
-    return re;
-  }
-
-  ///~IterDouble() {}
-};
-
-// CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
-void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
-//
-// Calculate number of iterations before the loop body.
-// CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
-// CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
-// CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
-// CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
-// CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
-// CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
-// CHECK: store i32 0, i32* [[IT_OMP_IV:%[^,]+]]
-  #pragma omp simd
-
-// CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}} !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID:[0-9]+]]
-// CHECK-NEXT: [[LAST_IT:%.+]] = load i32, i32* [[OMP_LAST_IT]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
-// CHECK-NEXT: [[NUM_IT:%.+]] = add nsw i32 [[LAST_IT]], 1
-// CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], [[NUM_IT]]
-// CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
-  for (IterDouble i = ia; i < ib; ++i) {
-// CHECK: [[IT_BODY]]
-// Start of body: calculate i from index:
-// CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
-// Call of operator+ (i, IV).
-// CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
-// ... loop body ...
-   *i = *ic * 0.5;
-// Float multiply and save result.
-// CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
-// CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
-// CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]], !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
-   ++ic;
-//
-// CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
-// CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
-// CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
-// br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
-  }
-// CHECK: [[IT_END]]
-// CHECK: ret void
-}
-
-
-// CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
-void collapsed(float *a, float *b, float *c, float *d) {
-  int i; // outer loop counter
-  unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
-  // k declared in the loop init below
-  short l; // inner loop counter
-// CHECK: store i32 0, i32* [[OMP_IV:[^,]+]]
-//
-  #pragma omp simd collapse(4)
-
-// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP:%.+]] = icmp ult i32 [[IV]], 120
-// CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
-  for (i = 1; i < 3; i++) // 2 iterations
-    for (j = 2u; j < 5u; j++) //3 iterations
-      for (int k = 3; k <= 6; k++) // 4 iterations
-        for (l = 4; l < 9; ++l) // 5 iterations
-        {
-// CHECK: [[COLL1_BODY]]
-// Start of body: calculate i from index:
-// CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
-// Calculation of the loop counters values.
-// CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
-// CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
-// CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
-// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
-// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
-// CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20
-// CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3
-// CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
-// CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
-// CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
-// CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
-// CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5
-// CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4
-// CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1
-// CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]
-// CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]
-// CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
-// CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5
-// CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1
-// CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]
-// CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
-// CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
-// ... loop body ...
-// End of body: store into a[i]:
-// CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
-    float res = b[j] * c[k];
-    a[i] = res * d[l];
-// CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
-// CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
-// CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
-// br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
-// CHECK: [[COLL1_END]]
-  }
-// i,j,l are updated; k is not updated.
-// CHECK: store i32 3, i32*
-// CHECK-NEXT: store i32 5, i32*
-// CHECK-NEXT: store i32 7, i32*
-// CHECK-NEXT: store i16 9, i16*
-// CHECK: ret void
-}
-
-extern char foo();
-extern double globalfloat;
-
-// CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
-void widened(float *a, float *b, float *c, float *d) {
-  int i; // outer loop counter
-  short j; // inner loop counter
-  globalfloat = 1.0;
-  int localint = 1;
-// CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
-// Counter is widened to 64 bits.
-// CHECK: store i64 0, i64* [[OMP_IV:[^,]+]]
-//
-  #pragma omp simd collapse(2) private(globalfloat, localint)
-
-// CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID:[0-9]+]]
-// CHECK-NEXT: [[LI:%.+]] = load i64, i64* [[OMP_LI:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
-// CHECK-NEXT: [[NUMIT:%.+]] = add nsw i64 [[LI]], 1
-// CHECK-NEXT: [[CMP:%.+]] = icmp slt i64 [[IV]], [[NUMIT]]
-// CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
-  for (i = 1; i < 3; i++) // 2 iterations
-    for (j = 0; j < foo(); j++) // foo() iterations
-  {
-// CHECK: [[WIDE1_BODY]]
-// Start of body: calculate i from index:
-// CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
-// Calculation of the loop counters values...
-// CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
-// CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
-// CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
-// ... loop body ...
-//
-// Here we expect store into private double var, not global
-// CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
-    globalfloat = (float)j/i;
-    float res = b[j] * c[j];
-// Store into a[i]:
-// CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
-    a[i] = res * d[i];
-// Then there's a store into private var localint:
-// CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
-    localint = (int)j;
-// CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
-// CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
-// CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
-//
-// br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
-// CHECK: [[WIDE1_END]]
-  }
-// i,j are updated.
-// CHECK: store i32 3, i32* [[I:%[^,]+]]
-// CHECK: store i16
-//
-// Here we expect store into original localint, not its privatized version.
-// CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
-  localint = (int)j;
-// CHECK: ret void
-}
-
-// CHECK-LABEL: define {{.*void}} @{{.*}}linear{{.*}}(float* {{.+}})
-void linear(float *a) {
-  // CHECK: [[VAL_ADDR:%.+]] = alloca i64,
-  // CHECK: [[K_ADDR:%.+]] = alloca i64*,
-  long long val = 0;
-  long long &k = val;
-
-  #pragma omp simd linear(k : 3)
-// CHECK: store i64* [[VAL_ADDR]], i64** [[K_ADDR]],
-// CHECK: [[VAL_REF:%.+]] = load i64*, i64** [[K_ADDR]],
-// CHECK: store i64* [[VAL_REF]], i64** [[K_ADDR_REF:%.+]],
-// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
-// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
-// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
-// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
-
-// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
-// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
-  for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP_BODY]]
-// Start of body: calculate i from IV:
-// CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// FIXME: It is interesting, why the following "mul 1" was not constant folded?
-// CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
-// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
-// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-//
-// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
-// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
-// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
-// Update of the privatized version of linear variable!
-// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
-    a[k]++;
-    k = k + 3;
-// CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
-// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP_END]]
-//
-// Update linear vars after loop, as the loop was operating on a private version.
-// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
-// CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
-// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
-// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
-// CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
-// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
-//
-
-  #pragma omp simd linear(val(k) : 3)
-// CHECK: [[VAL_REF:%.+]] = load i64*, i64** [[K_ADDR]],
-// CHECK: store i64* [[VAL_REF]], i64** [[K_ADDR_REF:%.+]],
-// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
-// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
-// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
-// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
-
-// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
-// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
-  for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP_BODY]]
-// Start of body: calculate i from IV:
-// CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// FIXME: It is interesting, why the following "mul 1" was not constant folded?
-// CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
-// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
-// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-//
-// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
-// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
-// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
-// Update of the privatized version of linear variable!
-// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
-    a[k]++;
-    k = k + 3;
-// CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
-// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP_END]]
-//
-// Update linear vars after loop, as the loop was operating on a private version.
-// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
-// CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
-// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
-// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
-// CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
-// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
-//
-  #pragma omp simd linear(uval(k) : 3)
-// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
-// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[VAL_ADDR]]
-// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
-
-// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
-// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
-// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
-  for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP_BODY]]
-// Start of body: calculate i from IV:
-// CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// FIXME: It is interesting, why the following "mul 1" was not constant folded?
-// CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
-// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
-// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-//
-// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
-// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
-// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
-// Update of the privatized version of linear variable!
-// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
-    a[k]++;
-    k = k + 3;
-// CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
-// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
-// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
-  }
-// CHECK: [[SIMPLE_LOOP_END]]
-//
-// Update linear vars after loop, as the loop was operating on a private version.
-// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
-// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
-// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[VAL_ADDR]]
-//
-}
-
-// TERM_DEBUG-LABEL: bar
-int bar() {return 0;};
-
-// TERM_DEBUG-LABEL: parallel_simd
-void parallel_simd(float *a) {
-#pragma omp parallel
-#pragma omp simd
-  // TERM_DEBUG-NOT: __kmpc_global_thread_num
-  // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()
-  // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
-  // TERM_DEBUG-NOT: __kmpc_global_thread_num
-  // TERM_DEBUG:     [[TERM_LPAD]]
-  // TERM_DEBUG:     call void @__clang_call_terminate
-  // TERM_DEBUG:     unreachable
-  for (unsigned i = 131071; i <= 2147483647; i += 127)
-    a[i] += bar();
-}
-// TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
-
-// CHECK-LABEL: S8
-// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
-// CHECK-NEXT: and i64 %{{.+}}, 15
-// CHECK-NEXT: icmp eq i64 %{{.+}}, 0
-// CHECK-NEXT: call void @llvm.assume(i1
-
-// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
-// CHECK-NEXT: and i64 %{{.+}}, 7
-// CHECK-NEXT: icmp eq i64 %{{.+}}, 0
-// CHECK-NEXT: call void @llvm.assume(i1
-
-// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
-// CHECK-NEXT: and i64 %{{.+}}, 15
-// CHECK-NEXT: icmp eq i64 %{{.+}}, 0
-// CHECK-NEXT: call void @llvm.assume(i1
-
-// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
-// CHECK-NEXT: and i64 %{{.+}}, 3
-// CHECK-NEXT: icmp eq i64 %{{.+}}, 0
-// CHECK-NEXT: call void @llvm.assume(i1
-struct SS {
-  SS(): a(0) {}
-  SS(int v) : a(v) {}
-  int a;
-  typedef int type;
-};
-
-template <typename T>
-class S7 : public T {
-protected:
-  T *a;
-  T b[2];
-  S7() : a(0) {}
-
-public:
-  S7(typename T::type &v) : a((T*)&v) {
-#pragma omp simd aligned(a)
-    for (int k = 0; k < a->a; ++k)
-      ++this->a->a;
-#pragma omp simd aligned(this->b : 8)
-    for (int k = 0; k < a->a; ++k)
-      ++a->a;
-  }
-};
-
-class S8 : private IterDouble, public S7<SS> {
-  S8() {}
-
-public:
-  S8(int v) : S7<SS>(v){
-#pragma omp parallel private(a)
-#pragma omp simd aligned(S7<SS>::a)
-    for (int k = 0; k < a->a; ++k)
-      ++this->a->a;
-#pragma omp parallel shared(b)
-#pragma omp simd aligned(this->b: 4)
-    for (int k = 0; k < a->a; ++k)
-      ++a->a;
-  }
-};
-S8 s8(0);
-
-#endif // HEADER
-
+// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s\r
+// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s\r
+// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s\r
+// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG\r
+// expected-no-diagnostics\r
+ #ifndef HEADER\r
+ #define HEADER\r
+\r
+// CHECK: [[SS_TY:%.+]] = type { i32 }\r
+\r
+long long get_val() { return 0; }\r
+double *g_ptr;\r
+\r
+// CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})\r
+void simple(float *a, float *b, float *c, float *d) {\r
+  #pragma omp simd\r
+// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]\r
+\r
+// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], 6\r
+// CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]\r
+  for (int i = 3; i < 32; i += 5) {\r
+// CHECK: [[SIMPLE_LOOP1_BODY]]:\r
+// Start of body: calculate i from IV:\r
+// CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]\r
+// CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5\r
+// CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]\r
+// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]\r
+// ... loop body ...\r
+// End of body: store into a[i]:\r
+// CHECK: store float [[RESULT:%.+]], float* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]\r
+    a[i] = b[i] * c[i] * d[i];\r
+// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]\r
+// CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1\r
+// CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]\r
+// br label %{{.+}}, !llvm.loop !{{.+}}\r
+  }\r
+// CHECK: [[SIMPLE_LOOP1_END]]:\r
+\r
+  long long k = get_val();\r
+\r
+  #pragma omp simd linear(k : 3)\r
+// CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val\r
+// CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]\r
+// CHECK: store i32 0, i32* [[OMP_IV2:%[^,]+]]\r
+// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]]\r
+// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]\r
+\r
+// CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV2]], 9\r
+// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]\r
+  for (int i = 10; i > 1; i--) {\r
+// CHECK: [[SIMPLE_LOOP2_BODY]]:\r
+// Start of body: calculate i from IV:\r
+// CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]\r
+// FIXME: It is interesting, why the following "mul 1" was not constant folded?\r
+// CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1\r
+// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]\r
+// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]\r
+//\r
+// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]\r
+// CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]\r
+// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3\r
+// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64\r
+// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]\r
+// Update of the privatized version of linear variable!\r
+// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]\r
+    a[k]++;\r
+    k = k + 3;\r
+// CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]\r
+// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1\r
+// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]\r
+// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP2_END]]:\r
+//\r
+// Update linear vars after loop, as the loop was operating on a private version.\r
+// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]\r
+// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27\r
+// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_VAR]]\r
+//\r
+\r
+  int lin = 12;\r
+  #pragma omp simd linear(lin : get_val()), linear(g_ptr)\r
+\r
+// Init linear private var.\r
+// CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]\r
+// CHECK: store i64 0, i64* [[OMP_IV3:%[^,]+]]\r
+\r
+// CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]\r
+// CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]\r
+// Remember linear step.\r
+// CHECK: [[CALL_VAL:%.+]] = invoke\r
+// CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]\r
+\r
+// CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]]\r
+// CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]\r
+\r
+// CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP3:%.+]] = icmp ult i64 [[IV3]], 4\r
+// CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]\r
+  for (unsigned long long it = 2000; it >= 600; it-=400) {\r
+// CHECK: [[SIMPLE_LOOP3_BODY]]:\r
+// Start of body: calculate it from IV:\r
+// CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400\r
+// CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]\r
+// CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+//\r
+// Linear start and step are used to calculate current value of the linear variable.\r
+// CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1\r
+// CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]\r
+// CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+    *g_ptr++ = 0.0;\r
+// CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK: store double{{.*}}[[GEP_VAL]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+    a[it + lin]++;\r
+// CHECK: [[FLT_INC:%.+]] = fadd float\r
+// CHECK-NEXT: store float [[FLT_INC]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+// CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1\r
+// CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP3_END]]:\r
+//\r
+// Linear start and step are used to calculate final value of the linear variables.\r
+// CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]\r
+// CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]\r
+// CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],\r
+// CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]\r
+// CHECK: store double* {{.*}}[[GLIN_VAR]]\r
+\r
+  #pragma omp simd\r
+// CHECK: store i32 0, i32* [[OMP_IV4:%[^,]+]]\r
+\r
+// CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP4:%.+]] = icmp slt i32 [[IV4]], 4\r
+// CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]\r
+  for (short it = 6; it <= 20; it-=-4) {\r
+// CHECK: [[SIMPLE_LOOP4_BODY]]:\r
+// Start of body: calculate it from IV:\r
+// CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]\r
+// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4\r
+// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]\r
+// CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16\r
+// CHECK-NEXT: store i16 [[LC_IT_3]], i16* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]\r
+\r
+// CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]\r
+// CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1\r
+// CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP4_END]]:\r
+\r
+  #pragma omp simd\r
+// CHECK: store i32 0, i32* [[OMP_IV5:%[^,]+]]\r
+\r
+// CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP5:%.+]] = icmp slt i32 [[IV5]], 26\r
+// CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]\r
+  for (unsigned char it = 'z'; it >= 'a'; it+=-1) {\r
+// CHECK: [[SIMPLE_LOOP5_BODY]]:\r
+// Start of body: calculate it from IV:\r
+// CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]\r
+// CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1\r
+// CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]\r
+// CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8\r
+// CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]\r
+\r
+// CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]\r
+// CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1\r
+// CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP5_END]]:\r
+\r
+// CHECK-NOT: mul i32 %{{.+}}, 10\r
+  #pragma omp simd\r
+  for (unsigned i=100; i<10; i+=10) {\r
+  }\r
+\r
+  int A;\r
+  // CHECK: store i32 -1, i32* [[A:%.+]],\r
+  A = -1;\r
+  #pragma omp simd lastprivate(A)\r
+// CHECK: store i64 0, i64* [[OMP_IV7:%[^,]+]]\r
+// CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]\r
+// CHECK: [[SIMD_LOOP7_COND]]:\r
+// CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP7:%.+]] = icmp slt i64 [[IV7]], 7\r
+// CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]\r
+  for (long long i = -10; i < 10; i += 3) {\r
+// CHECK: [[SIMPLE_LOOP7_BODY]]:\r
+// Start of body: calculate i from IV:\r
+// CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]\r
+// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3\r
+// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]\r
+// CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]\r
+// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]\r
+// CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32\r
+// CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]\r
+    A = i;\r
+// CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]\r
+// CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1\r
+// CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP7_END]]:\r
+// CHECK-NEXT: store i64 11, i64*\r
+// CHECK-NEXT: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],\r
+// CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* [[A]],\r
+  int R;\r
+  // CHECK: store i32 -1, i32* [[R:%[^,]+]],\r
+  R = -1;\r
+// CHECK: store i64 0, i64* [[OMP_IV8:%[^,]+]],\r
+// CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],\r
+  #pragma omp simd reduction(*:R)\r
+// CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]\r
+// CHECK: [[SIMD_LOOP8_COND]]:\r
+// CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP8:%.+]] = icmp slt i64 [[IV8]], 7\r
+// CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]\r
+  for (long long i = -10; i < 10; i += 3) {\r
+// CHECK: [[SIMPLE_LOOP8_BODY]]:\r
+// Start of body: calculate i from IV:\r
+// CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]\r
+// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3\r
+// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]\r
+// CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]\r
+// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]\r
+// CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]\r
+    R *= i;\r
+// CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]\r
+// CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1\r
+// CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP8_END]]:\r
+// CHECK-DAG: [[R_VAL:%.+]] = load i32, i32* [[R]],\r
+// CHECK-DAG: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],\r
+// CHECK: [[RED:%.+]] = mul nsw i32 [[R_VAL]], [[R_PRIV_VAL]]\r
+// CHECK-NEXT: store i32 [[RED]], i32* [[R]],\r
+// CHECK-NEXT: ret void\r
+}\r
+\r
+template <class T, unsigned K> T tfoo(T a) { return a + K; }\r
+\r
+template <typename T, unsigned N>\r
+int templ1(T a, T *z) {\r
+  #pragma omp simd collapse(N)\r
+  for (int i = 0; i < N * 2; i++) {\r
+    for (long long j = 0; j < (N + N + N + N); j += 2) {\r
+      z[i + j] = a + tfoo<T, N>(i + j);\r
+    }\r
+  }\r
+  return 0;\r
+}\r
+\r
+// Instatiation templ1<float,2>\r
+// CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})\r
+// CHECK: store i64 0, i64* [[T1_OMP_IV:[^,]+]]\r
+// ...\r
+// CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP1:%.+]] = icmp slt i64 [[IV]], 16\r
+// CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]\r
+// CHECK: [[T1_BODY]]:\r
+// Loop counters i and j updates:\r
+// CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]\r
+// CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4\r
+// CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1\r
+// CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]\r
+// CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32\r
+// CHECK-NEXT: store i32 [[I_2]], i32* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]\r
+// CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]\r
+// CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4\r
+// CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2\r
+// CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]\r
+// CHECK-NEXT: store i64 [[J_2_ADD0]], i64* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]\r
+// simd.for.inc:\r
+// CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]\r
+// CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1\r
+// CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]\r
+// CHECK-NEXT: br label {{%.+}}\r
+// CHECK: [[T1_END]]:\r
+// CHECK: ret i32 0\r
+//\r
+void inst_templ1() {\r
+  float a;\r
+  float z[100];\r
+  templ1<float,2> (a, z);\r
+}\r
+\r
+\r
+typedef int MyIdx;\r
+\r
+class IterDouble {\r
+  double *Ptr;\r
+public:\r
+  IterDouble operator++ () const {\r
+    IterDouble n;\r
+    n.Ptr = Ptr + 1;\r
+    return n;\r
+  }\r
+  bool operator < (const IterDouble &that) const {\r
+    return Ptr < that.Ptr;\r
+  }\r
+  double & operator *() const {\r
+    return *Ptr;\r
+  }\r
+  MyIdx operator - (const IterDouble &that) const {\r
+    return (MyIdx) (Ptr - that.Ptr);\r
+  }\r
+  IterDouble operator + (int Delta) {\r
+    IterDouble re;\r
+    re.Ptr = Ptr + Delta;\r
+    return re;\r
+  }\r
+\r
+  ///~IterDouble() {}\r
+};\r
+\r
+// CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}\r
+void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {\r
+//\r
+// Calculate number of iterations before the loop body.\r
+// CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}\r
+// CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1\r
+// CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1\r
+// CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1\r
+// CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1\r
+// CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}\r
+// CHECK: store i32 0, i32* [[IT_OMP_IV:%[^,]+]]\r
+  #pragma omp simd\r
+\r
+// CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}} !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID:[0-9]+]]\r
+// CHECK-NEXT: [[LAST_IT:%.+]] = load i32, i32* [[OMP_LAST_IT]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]\r
+// CHECK-NEXT: [[NUM_IT:%.+]] = add nsw i32 [[LAST_IT]], 1\r
+// CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], [[NUM_IT]]\r
+// CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]\r
+  for (IterDouble i = ia; i < ib; ++i) {\r
+// CHECK: [[IT_BODY]]:\r
+// Start of body: calculate i from index:\r
+// CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]\r
+// Call of operator+ (i, IV).\r
+// CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}\r
+// ... loop body ...\r
+   *i = *ic * 0.5;\r
+// Float multiply and save result.\r
+// CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01\r
+// CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}\r
+// CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]], !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]\r
+   ++ic;\r
+//\r
+// CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]\r
+// CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1\r
+// CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]\r
+// br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]\r
+  }\r
+// CHECK: [[IT_END]]:\r
+// CHECK: ret void\r
+}\r
+\r
+\r
+// CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}\r
+void collapsed(float *a, float *b, float *c, float *d) {\r
+  int i; // outer loop counter\r
+  unsigned j; // middle loop couter, leads to unsigned icmp in loop header.\r
+  // k declared in the loop init below\r
+  short l; // inner loop counter\r
+// CHECK: store i32 0, i32* [[OMP_IV:[^,]+]]\r
+//\r
+  #pragma omp simd collapse(4)\r
+\r
+// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP:%.+]] = icmp ult i32 [[IV]], 120\r
+// CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]\r
+  for (i = 1; i < 3; i++) // 2 iterations\r
+    for (j = 2u; j < 5u; j++) //3 iterations\r
+      for (int k = 3; k <= 6; k++) // 4 iterations\r
+        for (l = 4; l < 9; ++l) // 5 iterations\r
+        {\r
+// CHECK: [[COLL1_BODY]]:\r
+// Start of body: calculate i from index:\r
+// CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]\r
+// Calculation of the loop counters values.\r
+// CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60\r
+// CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1\r
+// CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]\r
+// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]\r
+// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]\r
+// CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20\r
+// CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3\r
+// CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1\r
+// CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]\r
+// CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]\r
+// CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]\r
+// CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5\r
+// CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4\r
+// CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1\r
+// CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]\r
+// CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]\r
+// CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]\r
+// CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5\r
+// CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1\r
+// CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]\r
+// CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16\r
+// CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]\r
+// ... loop body ...\r
+// End of body: store into a[i]:\r
+// CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]\r
+    float res = b[j] * c[k];\r
+    a[i] = res * d[l];\r
+// CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]\r
+// CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1\r
+// CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]\r
+// br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]\r
+// CHECK: [[COLL1_END]]:\r
+  }\r
+// i,j,l are updated; k is not updated.\r
+// CHECK: store i32 3, i32*\r
+// CHECK-NEXT: store i32 5, i32*\r
+// CHECK-NEXT: store i32 7, i32*\r
+// CHECK-NEXT: store i16 9, i16*\r
+// CHECK: ret void\r
+}\r
+\r
+extern char foo();\r
+extern double globalfloat;\r
+\r
+// CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}\r
+void widened(float *a, float *b, float *c, float *d) {\r
+  int i; // outer loop counter\r
+  short j; // inner loop counter\r
+  globalfloat = 1.0;\r
+  int localint = 1;\r
+// CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]\r
+// Counter is widened to 64 bits.\r
+// CHECK: store i64 0, i64* [[OMP_IV:[^,]+]]\r
+//\r
+  #pragma omp simd collapse(2) private(globalfloat, localint)\r
+\r
+// CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID:[0-9]+]]\r
+// CHECK-NEXT: [[LI:%.+]] = load i64, i64* [[OMP_LI:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]\r
+// CHECK-NEXT: [[NUMIT:%.+]] = add nsw i64 [[LI]], 1\r
+// CHECK-NEXT: [[CMP:%.+]] = icmp slt i64 [[IV]], [[NUMIT]]\r
+// CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]\r
+  for (i = 1; i < 3; i++) // 2 iterations\r
+    for (j = 0; j < foo(); j++) // foo() iterations\r
+  {\r
+// CHECK: [[WIDE1_BODY]]:\r
+// Start of body: calculate i from index:\r
+// CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]\r
+// Calculation of the loop counters values...\r
+// CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]\r
+// CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]\r
+// CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]\r
+// ... loop body ...\r
+//\r
+// Here we expect store into private double var, not global\r
+// CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]\r
+    globalfloat = (float)j/i;\r
+    float res = b[j] * c[j];\r
+// Store into a[i]:\r
+// CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]\r
+    a[i] = res * d[i];\r
+// Then there's a store into private var localint:\r
+// CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]\r
+    localint = (int)j;\r
+// CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]\r
+// CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1\r
+// CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]\r
+//\r
+// br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]\r
+// CHECK: [[WIDE1_END]]:\r
+  }\r
+// i,j are updated.\r
+// CHECK: store i32 3, i32* [[I:%[^,]+]]\r
+// CHECK: store i16\r
+//\r
+// Here we expect store into original localint, not its privatized version.\r
+// CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]\r
+  localint = (int)j;\r
+// CHECK: ret void\r
+}\r
+\r
+// CHECK-LABEL: define {{.*void}} @{{.*}}linear{{.*}}(float* {{.+}})\r
+void linear(float *a) {\r
+  // CHECK: [[VAL_ADDR:%.+]] = alloca i64,\r
+  // CHECK: [[K_ADDR:%.+]] = alloca i64*,\r
+  long long val = 0;\r
+  long long &k = val;\r
+\r
+  #pragma omp simd linear(k : 3)\r
+// CHECK: store i64* [[VAL_ADDR]], i64** [[K_ADDR]],\r
+// CHECK: [[VAL_REF:%.+]] = load i64*, i64** [[K_ADDR]],\r
+// CHECK: store i64* [[VAL_REF]], i64** [[K_ADDR_REF:%.+]],\r
+// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]\r
+// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],\r
+// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]\r
+// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]\r
+\r
+// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9\r
+// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]\r
+  for (int i = 10; i > 1; i--) {\r
+// CHECK: [[SIMPLE_LOOP_BODY]]:\r
+// Start of body: calculate i from IV:\r
+// CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// FIXME: It is interesting, why the following "mul 1" was not constant folded?\r
+// CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1\r
+// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]\r
+// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+//\r
+// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3\r
+// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64\r
+// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]\r
+// Update of the privatized version of linear variable!\r
+// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]\r
+    a[k]++;\r
+    k = k + 3;\r
+// CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1\r
+// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP_END]]:\r
+//\r
+// Update linear vars after loop, as the loop was operating on a private version.\r
+// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],\r
+// CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],\r
+// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]\r
+// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27\r
+// CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],\r
+// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]\r
+//\r
+\r
+  #pragma omp simd linear(val(k) : 3)\r
+// CHECK: [[VAL_REF:%.+]] = load i64*, i64** [[K_ADDR]],\r
+// CHECK: store i64* [[VAL_REF]], i64** [[K_ADDR_REF:%.+]],\r
+// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]\r
+// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],\r
+// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]\r
+// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]\r
+\r
+// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9\r
+// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]\r
+  for (int i = 10; i > 1; i--) {\r
+// CHECK: [[SIMPLE_LOOP_BODY]]:\r
+// Start of body: calculate i from IV:\r
+// CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// FIXME: It is interesting, why the following "mul 1" was not constant folded?\r
+// CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1\r
+// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]\r
+// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+//\r
+// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3\r
+// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64\r
+// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]\r
+// Update of the privatized version of linear variable!\r
+// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]\r
+    a[k]++;\r
+    k = k + 3;\r
+// CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1\r
+// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP_END]]:\r
+//\r
+// Update linear vars after loop, as the loop was operating on a private version.\r
+// CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],\r
+// CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],\r
+// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]\r
+// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27\r
+// CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],\r
+// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]\r
+//\r
+  #pragma omp simd linear(uval(k) : 3)\r
+// CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]\r
+// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[VAL_ADDR]]\r
+// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]\r
+\r
+// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]\r
+// CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9\r
+// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]\r
+  for (int i = 10; i > 1; i--) {\r
+// CHECK: [[SIMPLE_LOOP_BODY]]:\r
+// Start of body: calculate i from IV:\r
+// CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// FIXME: It is interesting, why the following "mul 1" was not constant folded?\r
+// CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1\r
+// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]\r
+// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+//\r
+// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3\r
+// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64\r
+// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]\r
+// Update of the privatized version of linear variable!\r
+// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]\r
+    a[k]++;\r
+    k = k + 3;\r
+// CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1\r
+// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]\r
+// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]\r
+  }\r
+// CHECK: [[SIMPLE_LOOP_END]]:\r
+//\r
+// Update linear vars after loop, as the loop was operating on a private version.\r
+// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]\r
+// CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27\r
+// CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[VAL_ADDR]]\r
+//\r
+}\r
+\r
+// TERM_DEBUG-LABEL: bar\r
+int bar() {return 0;};\r
+\r
+// TERM_DEBUG-LABEL: parallel_simd\r
+void parallel_simd(float *a) {\r
+#pragma omp parallel\r
+#pragma omp simd\r
+  // TERM_DEBUG-NOT: __kmpc_global_thread_num\r
+  // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()\r
+  // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],\r
+  // TERM_DEBUG-NOT: __kmpc_global_thread_num\r
+  // TERM_DEBUG:     [[TERM_LPAD]]\r
+  // TERM_DEBUG:     call void @__clang_call_terminate\r
+  // TERM_DEBUG:     unreachable\r
+  for (unsigned i = 131071; i <= 2147483647; i += 127)\r
+    a[i] += bar();\r
+}\r
+// TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],\r
+\r
+// CHECK-LABEL: S8\r
+// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64\r
+// CHECK-NEXT: and i64 %{{.+}}, 15\r
+// CHECK-NEXT: icmp eq i64 %{{.+}}, 0\r
+// CHECK-NEXT: call void @llvm.assume(i1\r
+\r
+// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64\r
+// CHECK-NEXT: and i64 %{{.+}}, 7\r
+// CHECK-NEXT: icmp eq i64 %{{.+}}, 0\r
+// CHECK-NEXT: call void @llvm.assume(i1\r
+\r
+// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64\r
+// CHECK-NEXT: and i64 %{{.+}}, 15\r
+// CHECK-NEXT: icmp eq i64 %{{.+}}, 0\r
+// CHECK-NEXT: call void @llvm.assume(i1\r
+\r
+// CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64\r
+// CHECK-NEXT: and i64 %{{.+}}, 3\r
+// CHECK-NEXT: icmp eq i64 %{{.+}}, 0\r
+// CHECK-NEXT: call void @llvm.assume(i1\r
+struct SS {\r
+  SS(): a(0) {}\r
+  SS(int v) : a(v) {}\r
+  int a;\r
+  typedef int type;\r
+};\r
+\r
+template <typename T>\r
+class S7 : public T {\r
+protected:\r
+  T *a;\r
+  T b[2];\r
+  S7() : a(0) {}\r
+\r
+public:\r
+  S7(typename T::type &v) : a((T*)&v) {\r
+#pragma omp simd aligned(a)\r
+    for (int k = 0; k < a->a; ++k)\r
+      ++this->a->a;\r
+#pragma omp simd aligned(this->b : 8)\r
+    for (int k = 0; k < a->a; ++k)\r
+      ++a->a;\r
+  }\r
+};\r
+\r
+class S8 : private IterDouble, public S7<SS> {\r
+  S8() {}\r
+\r
+public:\r
+  S8(int v) : S7<SS>(v){\r
+#pragma omp parallel private(a)\r
+#pragma omp simd aligned(S7<SS>::a)\r
+    for (int k = 0; k < a->a; ++k)\r
+      ++this->a->a;\r
+#pragma omp parallel shared(b)\r
+#pragma omp simd aligned(this->b: 4)\r
+    for (int k = 0; k < a->a; ++k)\r
+      ++a->a;\r
+  }\r
+};\r
+S8 s8(0);\r
+\r
+#endif // HEADER\r
+\r