arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4
authorBrian Masney <bmasney@redhat.com>
Tue, 3 Jan 2023 18:22:24 +0000 (13:22 -0500)
committerBjorn Andersson <andersson@kernel.org>
Thu, 19 Jan 2023 00:02:51 +0000 (18:02 -0600)
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup0_i2c4 to i2c4.

Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-6-bmasney@redhat.com
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
arch/arm64/boot/dts/qcom/sc8280xp.dtsi

index fbe9980..99fb49f 100644 (file)
        status = "okay";
 };
 
+&i2c4 {
+       clock-frequency = <400000>;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c4_default>;
+
+       status = "okay";
+
+       touchscreen@10 {
+               compatible = "hid-over-i2c";
+               reg = <0x10>;
+
+               hid-descr-addr = <0x1>;
+               interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
+               vdd-supply = <&vreg_misc_3p3>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&ts0_default>;
+       };
+};
+
 &i2c21 {
        clock-frequency = <400000>;
 
        status = "okay";
 };
 
-&qup0_i2c4 {
-       clock-frequency = <400000>;
-
-       pinctrl-names = "default";
-       pinctrl-0 = <&qup0_i2c4_default>;
-
-       status = "okay";
-
-       touchscreen@10 {
-               compatible = "hid-over-i2c";
-               reg = <0x10>;
-
-               hid-descr-addr = <0x1>;
-               interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
-               vdd-supply = <&vreg_misc_3p3>;
-
-               pinctrl-names = "default";
-               pinctrl-0 = <&ts0_default>;
-       };
-};
-
 &qup1 {
        status = "okay";
 };
                bias-disable;
        };
 
+       i2c4_default: i2c4-default-state {
+               pins = "gpio171", "gpio172";
+               function = "qup4";
+               drive-strength = <16>;
+               bias-disable;
+       };
+
        i2c21_default: i2c21-default-state {
                pins = "gpio81", "gpio82";
                function = "qup21";
                };
        };
 
-       qup0_i2c4_default: qup0-i2c4-default-state {
-               pins = "gpio171", "gpio172";
-               function = "qup4";
-
-               bias-disable;
-               drive-strength = <16>;
-       };
-
        tpad_default: tpad-default-state {
                int-n-pins {
                        pins = "gpio182";
index 54e0d90..8119452 100644 (file)
        status = "okay";
 };
 
+&i2c4 {
+       clock-frequency = <400000>;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c4_default>;
+
+       status = "okay";
+
+       /* FIXME: verify */
+       touchscreen@10 {
+               compatible = "hid-over-i2c";
+               reg = <0x10>;
+
+               hid-descr-addr = <0x1>;
+               interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
+               vdd-supply = <&vreg_misc_3p3>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&ts0_default>;
+       };
+};
+
 &i2c21 {
        clock-frequency = <400000>;
 
        status = "okay";
 };
 
-&qup0_i2c4 {
-       clock-frequency = <400000>;
-
-       pinctrl-names = "default";
-       pinctrl-0 = <&qup0_i2c4_default>;
-
-       status = "okay";
-
-       /* FIXME: verify */
-       touchscreen@10 {
-               compatible = "hid-over-i2c";
-               reg = <0x10>;
-
-               hid-descr-addr = <0x1>;
-               interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
-               vdd-supply = <&vreg_misc_3p3>;
-
-               pinctrl-names = "default";
-               pinctrl-0 = <&ts0_default>;
-       };
-};
-
 &qup1 {
        status = "okay";
 };
                bias-disable;
        };
 
+       i2c4_default: i2c4-default-state {
+               pins = "gpio171", "gpio172";
+               function = "qup4";
+               drive-strength = <16>;
+               bias-disable;
+       };
+
        i2c21_default: i2c21-default-state {
                pins = "gpio81", "gpio82";
                function = "qup21";
                };
        };
 
-       qup0_i2c4_default: qup0-i2c4-default-state {
-               pins = "gpio171", "gpio172";
-               function = "qup4";
-               bias-disable;
-               drive-strength = <16>;
-       };
-
        spkr_1_sd_n_default: spkr-1-sd-n-default-state {
                perst-n-pins {
                        pins = "gpio178";
index 877b3d1..1f99992 100644 (file)
 
                        status = "disabled";
 
-                       qup0_i2c4: i2c@990000 {
+                       i2c4: i2c@990000 {
                                compatible = "qcom,geni-i2c";
                                reg = <0 0x00990000 0 0x4000>;
                                clock-names = "se";