riscv: dts: thead: add BeagleV Ahead board device tree
authorDrew Fustini <dfustini@baylibre.com>
Sat, 12 Aug 2023 00:47:17 +0000 (17:47 -0700)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 16 Aug 2023 17:59:24 +0000 (18:59 +0100)
The BeagleV Ahead single board computer uses the T-Head TH1520 SoC.
Add a minimal device tree to support basic uart/gpio/dmac drivers so
that a user can boot to a basic shell.

Link: https://beagleboard.org/beaglev-ahead
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/thead/Makefile
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts [new file with mode: 0644]

index e311fc9..b55a171 100644 (file)
@@ -1,2 +1,2 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb
+dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb th1520-beaglev-ahead.dtb
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
new file mode 100644 (file)
index 0000000..70e8042
--- /dev/null
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
+ * Copyright (C) 2023 Drew Fustini <dfustini@baylibre.com>
+ */
+
+/dts-v1/;
+
+#include "th1520.dtsi"
+
+/ {
+       model = "BeagleV Ahead";
+       compatible = "beagle,beaglev-ahead", "thead,th1520";
+
+       aliases {
+               gpio0 = &gpio0;
+               gpio1 = &gpio1;
+               gpio2 = &gpio2;
+               gpio3 = &gpio3;
+               serial0 = &uart0;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               serial3 = &uart3;
+               serial4 = &uart4;
+               serial5 = &uart5;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0  0x00000000  0x1 0x00000000>;
+
+       };
+};
+
+&osc {
+       clock-frequency = <24000000>;
+};
+
+&osc_32k {
+       clock-frequency = <32768>;
+};
+
+&apb_clk {
+       clock-frequency = <62500000>;
+};
+
+&uart_sclk {
+       clock-frequency = <100000000>;
+};
+
+&dmac0 {
+       status = "okay";
+};
+
+&uart0 {
+       status = "okay";
+};