/// See AbstractAttribute::initialize(...).
void initialize(Attributor &A) override {
+ Value &V = getAssociatedValue();
if (!NullIsDefined &&
hasAttr({Attribute::NonNull, Attribute::Dereferenceable},
/* IgnoreSubsumingPositions */ false, &A))
indicateOptimisticFixpoint();
- else if (isa<ConstantPointerNull>(getAssociatedValue()))
+ else if (isa<ConstantPointerNull>(V))
indicatePessimisticFixpoint();
else
AANonNull::initialize(A);
+ bool CanBeNull = true;
+ if (V.getPointerDereferenceableBytes(A.getDataLayout(), CanBeNull))
+ if (!CanBeNull)
+ indicateOptimisticFixpoint();
+
if (!getState().isAtFixpoint())
if (Instruction *CtxI = getCtxI())
followUsesInMBEC(*this, A, getState(), *CtxI);
for (const Attribute &Attr : Attrs)
takeKnownDerefBytesMaximum(Attr.getValueAsInt());
- NonNullAA = &A.getAAFor<AANonNull>(*this, getIRPosition(),
+ const IRPosition &IRP = this->getIRPosition();
+ NonNullAA = &A.getAAFor<AANonNull>(*this, IRP,
/* TrackDependence */ false);
- const IRPosition &IRP = this->getIRPosition();
+ bool CanBeNull;
+ takeKnownDerefBytesMaximum(
+ IRP.getAssociatedValue().getPointerDereferenceableBytes(
+ A.getDataLayout(), CanBeNull));
+
bool IsFnInterface = IRP.isFnInterfaceKind();
Function *FnScope = IRP.getAnchorScope();
if (IsFnInterface && (!FnScope || !A.isFunctionIPOAmendable(*FnScope))) {
for (const Attribute &Attr : Attrs)
takeKnownMaximum(Attr.getValueAsInt());
+ Value &V = getAssociatedValue();
+ // TODO: This is a HACK to avoid getPointerAlignment to introduce a ptr2int
+ // use of the function pointer. This was caused by D73131. We want to
+ // avoid this for function pointers especially because we iterate
+ // their uses and int2ptr is not handled. It is not a correctness
+ // problem though!
+ if (!V.getType()->getPointerElementType()->isFunctionTy())
+ takeKnownMaximum(
+ V.getPointerAlignment(A.getDataLayout()).valueOrOne().value());
+
if (getIRPosition().isFnInterfaceKind() &&
(!getAnchorScope() ||
!A.isFunctionIPOAmendable(*getAssociatedFunction()))) {
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@internalfun
-; IS__CGSCC____-SAME: (%struct.a* nocapture nofree readnone [[THIS:%.*]], <{ [[STRUCT_A:%.*]] }>* inalloca nonnull dereferenceable(1) [[TMP0:%.*]])
+; IS__CGSCC____-SAME: (%struct.a* nocapture nofree readnone [[THIS:%.*]], <{ [[STRUCT_A:%.*]] }>* inalloca nonnull align 4 dereferenceable(1) [[TMP0:%.*]])
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[A:%.*]] = getelementptr inbounds <{ [[STRUCT_A]] }>, <{ [[STRUCT_A]] }>* [[TMP0]], i32 0, i32 0
; IS__CGSCC____-NEXT: [[ARGMEM:%.*]] = alloca inalloca <{ [[STRUCT_A]] }>, align 4
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = getelementptr inbounds <{ [[STRUCT_A]] }>, <{ [[STRUCT_A]] }>* [[ARGMEM]], i32 0, i32 0
-; IS__CGSCC____-NEXT: [[CALL:%.*]] = call x86_thiscallcc %struct.a* @copy_ctor(%struct.a* nonnull align 4 dereferenceable(1) [[TMP1]], %struct.a* nonnull dereferenceable(1) [[A]])
+; IS__CGSCC____-NEXT: [[CALL:%.*]] = call x86_thiscallcc %struct.a* @copy_ctor(%struct.a* nonnull align 4 dereferenceable(1) [[TMP1]], %struct.a* nonnull align 4 dereferenceable(1) [[A]])
; IS__CGSCC____-NEXT: call void @ext(<{ [[STRUCT_A]] }>* inalloca nonnull align 4 dereferenceable(1) [[ARGMEM]])
; IS__CGSCC____-NEXT: ret void
;
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
-; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
-; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 1
-; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
-; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_1]], align 1
-; IS__TUNIT_NPM-NEXT: [[C0:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]])
; IS__TUNIT_NPM-NEXT: [[S_CAST1:%.*]] = bitcast %struct.ss* [[S]] to i32*
-; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[S_CAST1]], align 1
+; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST1]], align 1
; IS__TUNIT_NPM-NEXT: [[S_0_12:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
-; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i64, i64* [[S_0_12]], align 1
+; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_12]], align 1
+; IS__TUNIT_NPM-NEXT: [[C0:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]])
+; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
+; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[S_CAST]], align 1
+; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
+; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i64, i64* [[S_0_1]], align 1
; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = call i32 @g(i32 [[TMP2]], i64 [[TMP3]])
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]
; IS__TUNIT_NPM-NEXT: ret i32 [[A]]
; CHECK: T:
; CHECK-NEXT: ret i32 17
; CHECK: F:
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P]], align 1
; CHECK-NEXT: ret i32 [[X]]
;
entry:
; Argpromote can't promote %a because of the icmp use.
define internal i1 @g(%struct.ss* %a, %struct.ss* inalloca %b) nounwind {
; IS__CGSCC____-LABEL: define {{[^@]+}}@g
-; IS__CGSCC____-SAME: (%struct.ss* nocapture nofree readnone [[A:%.*]], %struct.ss* inalloca nocapture nofree writeonly [[B:%.*]])
+; IS__CGSCC____-SAME: (%struct.ss* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[A:%.*]], %struct.ss* inalloca nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[B:%.*]])
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i1 undef
;
define internal void @add({i32, i32}* %this, i32* sret %r) {
;
-; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@add
-; IS__TUNIT_OPM-SAME: ({ i32, i32 }* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[THIS:%.*]], i32* nocapture nofree nonnull sret writeonly align 4 dereferenceable(4) [[R:%.*]])
-; IS__TUNIT_OPM-NEXT: [[AP:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[THIS]], i32 0, i32 0
-; IS__TUNIT_OPM-NEXT: [[BP:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[THIS]], i32 0, i32 1
-; IS__TUNIT_OPM-NEXT: [[A:%.*]] = load i32, i32* [[AP]], align 8
-; IS__TUNIT_OPM-NEXT: [[B:%.*]] = load i32, i32* [[BP]], align 4
-; IS__TUNIT_OPM-NEXT: [[AB:%.*]] = add i32 [[A]], [[B]]
-; IS__TUNIT_OPM-NEXT: store i32 [[AB]], i32* [[R]], align 4
-; IS__TUNIT_OPM-NEXT: ret void
+; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@add
+; NOT_TUNIT_NPM-SAME: ({ i32, i32 }* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[THIS:%.*]], i32* nocapture nofree nonnull sret writeonly align 4 dereferenceable(4) [[R:%.*]])
+; NOT_TUNIT_NPM-NEXT: [[AP:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[THIS]], i32 0, i32 0
+; NOT_TUNIT_NPM-NEXT: [[BP:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[THIS]], i32 0, i32 1
+; NOT_TUNIT_NPM-NEXT: [[A:%.*]] = load i32, i32* [[AP]], align 8
+; NOT_TUNIT_NPM-NEXT: [[B:%.*]] = load i32, i32* [[BP]], align 4
+; NOT_TUNIT_NPM-NEXT: [[AB:%.*]] = add i32 [[A]], [[B]]
+; NOT_TUNIT_NPM-NEXT: store i32 [[AB]], i32* [[R]], align 4
+; NOT_TUNIT_NPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@add
; IS__TUNIT_NPM-SAME: ({ i32, i32 }* noalias nocapture nofree nonnull readonly align 8 dereferenceable(8) [[THIS:%.*]], i32* noalias nocapture nofree nonnull sret writeonly align 4 dereferenceable(4) [[R:%.*]])
; IS__TUNIT_NPM-NEXT: store i32 [[AB]], i32* [[R]], align 4
; IS__TUNIT_NPM-NEXT: ret void
;
-; IS__CGSCC____-LABEL: define {{[^@]+}}@add
-; IS__CGSCC____-SAME: ({ i32, i32 }* nocapture nofree nonnull readonly align 4 dereferenceable(8) [[THIS:%.*]], i32* nocapture nofree nonnull sret writeonly align 4 dereferenceable(4) [[R:%.*]])
-; IS__CGSCC____-NEXT: [[AP:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[THIS]], i32 0, i32 0
-; IS__CGSCC____-NEXT: [[BP:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[THIS]], i32 0, i32 1
-; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[AP]], align 4
-; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[BP]], align 4
-; IS__CGSCC____-NEXT: [[AB:%.*]] = add i32 [[A]], [[B]]
-; IS__CGSCC____-NEXT: store i32 [[AB]], i32* [[R]], align 4
-; IS__CGSCC____-NEXT: ret void
-;
%ap = getelementptr {i32, i32}, {i32, i32}* %this, i32 0, i32 0
%bp = getelementptr {i32, i32}, {i32, i32}* %this, i32 0, i32 1
%a = load i32, i32* %ap
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
-; RUN: opt -attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
-; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
+; RUN: opt -attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
+; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; PR14710
define internal void @bar(%pair* byval %Data) {
; IS________OPM-LABEL: define {{[^@]+}}@bar
-; IS________OPM-SAME: (%pair* noalias byval [[DATA:%.*]])
-; IS________OPM-NEXT: [[TMP1:%.*]] = tail call i8* @foo(%pair* [[DATA]])
+; IS________OPM-SAME: (%pair* noalias nonnull byval dereferenceable(8) [[DATA:%.*]])
+; IS________OPM-NEXT: [[TMP1:%.*]] = tail call i8* @foo(%pair* nonnull dereferenceable(8) [[DATA]])
; IS________OPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@bar
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[DATA_PRIV_CAST]]
; IS__TUNIT_NPM-NEXT: [[DATA_PRIV_0_1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA_PRIV]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[DATA_PRIV_0_1]]
-; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* [[DATA_PRIV]])
+; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* nonnull dereferenceable(8) [[DATA_PRIV]])
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[DATA_PRIV_CAST]], align 4
; IS__CGSCC_NPM-NEXT: [[DATA_PRIV_0_1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 [[TMP1]], i32* [[DATA_PRIV_0_1]], align 4
-; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* nonnull align 4 dereferenceable(8) [[DATA_PRIV]])
+; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = call i8* @foo(%pair* nonnull align 8 dereferenceable(8) [[DATA_PRIV]])
; IS__CGSCC_NPM-NEXT: ret void
;
tail call i8* @foo(%pair* %Data)
define void @zed(%pair* byval %Data) {
; IS________OPM-LABEL: define {{[^@]+}}@zed
-; IS________OPM-SAME: (%pair* noalias nocapture readonly byval [[DATA:%.*]])
-; IS________OPM-NEXT: call void @bar(%pair* noalias nocapture readonly byval [[DATA]])
+; IS________OPM-SAME: (%pair* noalias nocapture nonnull readonly byval dereferenceable(8) [[DATA:%.*]])
+; IS________OPM-NEXT: call void @bar(%pair* noalias nocapture nonnull readonly byval dereferenceable(8) [[DATA]])
; IS________OPM-NEXT: ret void
;
-; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@zed
-; IS__TUNIT_NPM-SAME: (%pair* noalias nocapture readonly byval [[DATA:%.*]])
-; IS__TUNIT_NPM-NEXT: [[DATA_CAST:%.*]] = bitcast %pair* [[DATA]] to i32*
-; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[DATA_CAST]], align 1
-; IS__TUNIT_NPM-NEXT: [[DATA_0_1:%.*]] = getelementptr [[PAIR:%.*]], %pair* [[DATA]], i32 0, i32 1
-; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[DATA_0_1]], align 1
-; IS__TUNIT_NPM-NEXT: call void @bar(i32 [[TMP1]], i32 [[TMP2]])
-; IS__TUNIT_NPM-NEXT: ret void
-;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@zed
-; IS__CGSCC_NPM-SAME: (%pair* noalias nocapture nonnull readonly byval dereferenceable(8) [[DATA:%.*]])
-; IS__CGSCC_NPM-NEXT: [[DATA_CAST:%.*]] = bitcast %pair* [[DATA]] to i32*
-; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[DATA_CAST]], align 1
-; IS__CGSCC_NPM-NEXT: [[DATA_0_1:%.*]] = getelementptr [[PAIR:%.*]], %pair* [[DATA]], i32 0, i32 1
-; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[DATA_0_1]], align 1
-; IS__CGSCC_NPM-NEXT: call void @bar(i32 [[TMP1]], i32 [[TMP2]])
-; IS__CGSCC_NPM-NEXT: ret void
+; IS________NPM-LABEL: define {{[^@]+}}@zed
+; IS________NPM-SAME: (%pair* noalias nocapture nonnull readonly byval dereferenceable(8) [[DATA:%.*]])
+; IS________NPM-NEXT: [[DATA_CAST:%.*]] = bitcast %pair* [[DATA]] to i32*
+; IS________NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[DATA_CAST]], align 1
+; IS________NPM-NEXT: [[DATA_0_1:%.*]] = getelementptr [[PAIR:%.*]], %pair* [[DATA]], i32 0, i32 1
+; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[DATA_0_1]], align 1
+; IS________NPM-NEXT: call void @bar(i32 [[TMP1]], i32 [[TMP2]])
+; IS________NPM-NEXT: ret void
;
call void @bar(%pair* byval %Data)
ret void
@mystr = internal global %struct.MYstr zeroinitializer ; <%struct.MYstr*> [#uses=3]
define internal void @vfu1(%struct.MYstr* byval align 4 %u) nounwind {
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vfu1
-; IS__CGSCC_OPM-SAME: (%struct.MYstr* noalias nocapture nofree nonnull writeonly byval align 4 dereferenceable(1) [[U:%.*]])
+; IS__CGSCC_OPM-SAME: (%struct.MYstr* noalias nocapture nofree nonnull writeonly byval align 8 dereferenceable(8) [[U:%.*]])
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i32 99, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
-; IS__CGSCC_OPM-NEXT: store i8 97, i8* [[TMP1]], align 4
+; IS__CGSCC_OPM-NEXT: store i8 97, i8* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC_OPM: return:
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]]
; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
-; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]]
+; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1
; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 99, i32* [[TMP2]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0
-; IS__CGSCC_NPM-NEXT: store i8 97, i8* [[TMP3]], align 4
+; IS__CGSCC_NPM-NEXT: store i8 97, i8* [[TMP3]], align 8
; IS__CGSCC_NPM-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC_NPM: return:
; IS__CGSCC_NPM-NEXT: ret void
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], %struct.MYstr* @mystr, i32 0, i32 1
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i32 0, i32 0
-; IS__CGSCC____-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 4
+; IS__CGSCC____-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8
; IS__CGSCC____-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
; IS__CGSCC____-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
; IS__CGSCC____-NEXT: ret i32 [[TMP5]]
}
define internal i32 @vfu2_v2(%struct.MYstr* byval align 4 %u) nounwind readonly {
-; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@vfu2_v2
-; IS__TUNIT_OPM-SAME: (%struct.MYstr* noalias nocapture nofree nonnull byval align 8 dereferenceable(8) [[U:%.*]])
-; IS__TUNIT_OPM-NEXT: entry:
-; IS__TUNIT_OPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], %struct.MYstr* [[U]], i32 0, i32 1
-; IS__TUNIT_OPM-NEXT: store i32 99, i32* [[Z]], align 4
-; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
-; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
-; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
-; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8
-; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
-; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
-; IS__TUNIT_OPM-NEXT: ret i32 [[TMP5]]
+; IS________OPM-LABEL: define {{[^@]+}}@vfu2_v2
+; IS________OPM-SAME: (%struct.MYstr* noalias nocapture nofree nonnull byval align 8 dereferenceable(8) [[U:%.*]])
+; IS________OPM-NEXT: entry:
+; IS________OPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], %struct.MYstr* [[U]], i32 0, i32 1
+; IS________OPM-NEXT: store i32 99, i32* [[Z]], align 4
+; IS________OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
+; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
+; IS________OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
+; IS________OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8
+; IS________OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
+; IS________OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
+; IS________OPM-NEXT: ret i32 [[TMP5]]
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@vfu2_v2
; IS__TUNIT_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]])
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP7]]
;
-; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vfu2_v2
-; IS__CGSCC_OPM-SAME: (%struct.MYstr* noalias nocapture nofree nonnull byval align 4 dereferenceable(1) [[U:%.*]])
-; IS__CGSCC_OPM-NEXT: entry:
-; IS__CGSCC_OPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], %struct.MYstr* [[U]], i32 0, i32 1
-; IS__CGSCC_OPM-NEXT: store i32 99, i32* [[Z]], align 4
-; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
-; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
-; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
-; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 4
-; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
-; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
-; IS__CGSCC_OPM-NEXT: ret i32 [[TMP5]]
-;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vfu2_v2
; IS__CGSCC_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]])
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]]
; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
-; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]]
+; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1
; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4
; IS__CGSCC_NPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0
-; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 4
+; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP7]]
; IS__TUNIT____-NEXT: [[E_2:%.*]] = phi i32* [ [[P]], [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[E_2]], align 4
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @fn1(i32 [[TMP0]])
-; IS__TUNIT____-NEXT: store i32 [[CALL]], i32* [[P]]
+; IS__TUNIT____-NEXT: store i32 [[CALL]], i32* [[P]], align 1
; IS__TUNIT____-NEXT: br label [[FOR_COND1]]
; IS__TUNIT____: exit:
; IS__TUNIT____-NEXT: ret void
; IS__TUNIT____-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @fn0(i32 [[TMP0]])
-; IS__TUNIT____-NEXT: store i32 [[CALL]], i32* [[P]]
+; IS__TUNIT____-NEXT: store i32 [[CALL]], i32* [[P]], align 1
; IS__TUNIT____-NEXT: br label [[FOR_COND1]]
; IS__TUNIT____: exit:
; IS__TUNIT____-NEXT: ret void
declare !callback !0 dso_local i32 @pthread_create(i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)
define internal i8* @foo(i8* %arg) {
-; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo
-; NOT_CGSCC_NPM-SAME: (i8* noalias nofree readnone returned align 536870912 "no-capture-maybe-returned" [[ARG:%.*]])
-; NOT_CGSCC_NPM-NEXT: entry:
-; NOT_CGSCC_NPM-NEXT: ret i8* null
-;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo
-; IS__CGSCC_NPM-SAME: (i8* noalias nofree readnone returned "no-capture-maybe-returned" [[ARG:%.*]])
-; IS__CGSCC_NPM-NEXT: entry:
-; IS__CGSCC_NPM-NEXT: ret i8* null
+; CHECK-LABEL: define {{[^@]+}}@foo
+; CHECK-SAME: (i8* noalias nofree readnone returned align 536870912 "no-capture-maybe-returned" [[ARG:%.*]])
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i8* null
;
entry:
ret i8* %arg
; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i8* [[ARG]]
;
-; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@baz
-; IS__CGSCC_OPM-SAME: (i8* nofree nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]])
-; IS__CGSCC_OPM-NEXT: entry:
-; IS__CGSCC_OPM-NEXT: ret i8* [[ARG]]
-;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@baz
-; IS__CGSCC_NPM-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[ARG:%.*]])
-; IS__CGSCC_NPM-NEXT: entry:
-; IS__CGSCC_NPM-NEXT: ret i8* [[ARG]]
+; IS__CGSCC____-LABEL: define {{[^@]+}}@baz
+; IS__CGSCC____-SAME: (i8* nofree nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]])
+; IS__CGSCC____-NEXT: entry:
+; IS__CGSCC____-NEXT: ret i8* [[ARG]]
;
entry:
ret i8* %arg
; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i8* [[ARG]]
;
-; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@buz
-; IS__CGSCC_OPM-SAME: (i8* nofree nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]])
-; IS__CGSCC_OPM-NEXT: entry:
-; IS__CGSCC_OPM-NEXT: ret i8* [[ARG]]
-;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@buz
-; IS__CGSCC_NPM-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[ARG:%.*]])
-; IS__CGSCC_NPM-NEXT: entry:
-; IS__CGSCC_NPM-NEXT: ret i8* [[ARG]]
+; IS__CGSCC____-LABEL: define {{[^@]+}}@buz
+; IS__CGSCC____-SAME: (i8* nofree nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]])
+; IS__CGSCC____-NEXT: entry:
+; IS__CGSCC____-NEXT: ret i8* [[ARG]]
;
entry:
ret i8* %arg
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t:
; CHECK-NEXT: [[R:%.*]] = call i32* @test10a(i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]])
-; CHECK-NEXT: store i32 1, i32* [[R]]
+; CHECK-NEXT: store i32 1, i32* [[R]], align 1
; CHECK-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; CHECK-NEXT: br label [[E:%.*]]
; CHECK: f:
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t:
; CHECK-NEXT: [[R:%.*]] = call i32* @test10b(i32* nofree nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]])
-; CHECK-NEXT: store i32 1, i32* [[R]]
+; CHECK-NEXT: store i32 1, i32* [[R]], align 1
; CHECK-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; CHECK-NEXT: br label [[E:%.*]]
; CHECK: f:
; CHECK-LABEL: define {{[^@]+}}@align_call_op_not_store
; CHECK-SAME: (i8* align 2048 [[ARG:%.*]])
; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @some_func(i8* align 2048 [[ARG]])
-; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]]
+; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]], align 1
; CHECK-NEXT: ret void
;
%unknown = call i8* @some_func(i8* %arg)
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
define internal void @t0_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
;
-; IS________OPM-LABEL: define {{[^@]+}}@t0_callback_callee
-; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
-; IS________OPM-NEXT: entry:
-; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
-; IS________OPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 99, i32* [[TMP0]])
-; IS________OPM-NEXT: ret void
+; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t0_callback_callee
+; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
+; NOT_TUNIT_NPM-NEXT: entry:
+; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
+; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
+; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
+; NOT_TUNIT_NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 99, i32* [[TMP0]])
+; NOT_TUNIT_NPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t0_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 99, i32* [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void
;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t0_callback_callee
-; IS__CGSCC_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 8 dereferenceable(8) [[C:%.*]])
-; IS__CGSCC_NPM-NEXT: entry:
-; IS__CGSCC_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS__CGSCC_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 8
-; IS__CGSCC_NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 99, i32* [[TMP0]])
-; IS__CGSCC_NPM-NEXT: ret void
-;
entry:
%ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
define internal void @t1_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
;
-; IS________OPM-LABEL: define {{[^@]+}}@t1_callback_callee
-; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
-; IS________OPM-NEXT: entry:
-; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
-; IS________OPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
-; IS________OPM-NEXT: ret void
+; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t1_callback_callee
+; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
+; NOT_TUNIT_NPM-NEXT: entry:
+; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
+; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
+; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
+; NOT_TUNIT_NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
+; NOT_TUNIT_NPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t1_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* noalias nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void
;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t1_callback_callee
-; IS__CGSCC_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 8 dereferenceable(8) [[C:%.*]])
-; IS__CGSCC_NPM-NEXT: entry:
-; IS__CGSCC_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS__CGSCC_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 8
-; IS__CGSCC_NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
-; IS__CGSCC_NPM-NEXT: ret void
-;
entry:
%ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null
; FIXME: We should derive noalias for %a and add a "fake use" of %a in all potentially synchronizing calls.
define internal void @t2_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
;
-; IS________OPM-LABEL: define {{[^@]+}}@t2_callback_callee
-; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
-; IS________OPM-NEXT: entry:
-; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
-; IS________OPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
-; IS________OPM-NEXT: ret void
+; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t2_callback_callee
+; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
+; NOT_TUNIT_NPM-NEXT: entry:
+; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
+; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
+; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
+; NOT_TUNIT_NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
+; NOT_TUNIT_NPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t2_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void
;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t2_callback_callee
-; IS__CGSCC_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 8 dereferenceable(8) [[C:%.*]])
-; IS__CGSCC_NPM-NEXT: entry:
-; IS__CGSCC_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS__CGSCC_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 8
-; IS__CGSCC_NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
-; IS__CGSCC_NPM-NEXT: ret void
-;
entry:
%ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null
; FIXME: We should derive noalias for %a and add a "fake use" of %a in all potentially synchronizing calls.
define internal void @t3_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
;
-; IS________OPM-LABEL: define {{[^@]+}}@t3_callback_callee
-; IS________OPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
-; IS________OPM-NEXT: entry:
-; IS________OPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS________OPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS________OPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
-; IS________OPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
-; IS________OPM-NEXT: ret void
+; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t3_callback_callee
+; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
+; NOT_TUNIT_NPM-NEXT: entry:
+; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
+; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
+; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
+; NOT_TUNIT_NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
+; NOT_TUNIT_NPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t3_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void
;
-; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t3_callback_callee
-; IS__CGSCC_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture nonnull readonly align 8 dereferenceable(8) [[C:%.*]])
-; IS__CGSCC_NPM-NEXT: entry:
-; IS__CGSCC_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
-; IS__CGSCC_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
-; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 8
-; IS__CGSCC_NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]])
-; IS__CGSCC_NPM-NEXT: ret void
-;
entry:
%ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null
; CHECK-LABEL: define {{[^@]+}}@gep0
; CHECK-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]])
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
-; CHECK-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]]
-; CHECK-NEXT: store i8 [[T2]], i8* [[OTHER]]
+; CHECK-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
+; CHECK-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; CHECK-NEXT: ret void
;
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0
; IS________OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS________OPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS________OPM: l6:
-; IS________OPM-NEXT: store i32 0, i32* [[P]]
+; IS________OPM-NEXT: store i32 0, i32* [[P]], align 1
; IS________OPM-NEXT: br label [[END:%.*]]
; IS________OPM: l7:
-; IS________OPM-NEXT: store i32 1, i32* [[P]]
+; IS________OPM-NEXT: store i32 1, i32* [[P]], align 1
; IS________OPM-NEXT: br label [[END]]
; IS________OPM: end:
; IS________OPM-NEXT: ret i32 1
; IS________OPM-LABEL: define {{[^@]+}}@test16a
; IS________OPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]])
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4)
-; IS________OPM-NEXT: store i8 [[V]], i8* [[TMP1]]
+; IS________OPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull dereferenceable(1) [[TMP1]])
; IS________OPM-NEXT: ret void
; IS________NPM-LABEL: define {{[^@]+}}@test16a
; IS________NPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]])
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4
-; IS________NPM-NEXT: store i8 [[V]], i8* [[TMP1]]
+; IS________NPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]])
; IS________NPM-NEXT: ret void
;
; CHECK-LABEL: define {{[^@]+}}@test16b
; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4)
-; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]]
+; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 1
; CHECK-NEXT: tail call void @no_sync_func(i8* nocapture nofree [[TMP1]])
; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]])
; CHECK-NEXT: ret void
; CHECK-LABEL: define {{[^@]+}}@test16c
; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4)
-; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]]
+; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 1
; CHECK-NEXT: tail call void @no_sync_func(i8* nocapture nofree [[TMP1]])
; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]])
; CHECK-NEXT: ret void
; CHECK-LABEL: define {{[^@]+}}@test16d
; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4)
-; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]]
+; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 1
; CHECK-NEXT: ret void
;
%1 = tail call noalias i8* @malloc(i64 4)
; NOT_CGSCC_NPM-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_a
-; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree nonnull [[FP:%.*]])
-; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* [[B]], i32* [[A]], i64 -1, i32** null)
+; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* nonnull align 128 dereferenceable(4) [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree nonnull [[FP:%.*]])
+; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null)
; IS__CGSCC____-NEXT: ret void
;
call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null)
; NOT_CGSCC_NPM-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_b
-; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree nonnull [[FP:%.*]])
-; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* [[B]], i32* [[A]], i64 -1, i32** null)
+; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* nonnull align 128 dereferenceable(4) [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree nonnull [[FP:%.*]])
+; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null)
; IS__CGSCC____-NEXT: ret void
;
call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null)
; CHECK: if.end:
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[ARG]] to i64
; CHECK-NEXT: [[CALL1:%.*]] = call noalias i8* @malloc(i64 [[CONV]])
-; CHECK-NEXT: store i8 0, i8* [[CALL1]]
+; CHECK-NEXT: store i8 0, i8* [[CALL1]], align 1
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ [[CALL]], [[IF_THEN]] ], [ null, [[IF_END]] ]
define void @callerD1() {
; CHECK-LABEL: define {{[^@]+}}@callerD1()
; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @argmem_only(i8* noalias nocapture align 536870912 null)
-; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]]
+; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]], align 1
; CHECK-NEXT: ret void
;
%unknown = call i8* @argmem_only(i8* null)
define void @callerD2() {
; CHECK-LABEL: define {{[^@]+}}@callerD2()
; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @inaccesible_argmem_only_decl(i8* noalias nocapture align 536870912 null)
-; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]]
+; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]], align 1
; CHECK-NEXT: ret void
;
%unknown = call i8* @inaccesible_argmem_only_decl(i8* null)
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8* [[A]], null
; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_END:%.*]]
; CHECK: if.end:
-; CHECK-NEXT: store i8 7, i8* [[A]]
+; CHECK-NEXT: store i8 7, i8* [[A]], align 1
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ [[A]], [[IF_END]] ], [ null, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32* [[TMP0]], null
; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
; CHECK: 4:
-; CHECK-NEXT: store i8 10, i8* [[TMP2]]
+; CHECK-NEXT: store i8 10, i8* [[TMP2]], align 1
; CHECK-NEXT: br label [[TMP5]]
; CHECK: 5:
; CHECK-NEXT: ret i8* [[TMP2]]
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; CHECK-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
; CHECK-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 [[BIT]]
-; CHECK-NEXT: [[VAL:%.*]] = load i1, i1* [[LOOKUP]]
+; CHECK-NEXT: [[VAL:%.*]] = load i1, i1* [[LOOKUP]], align 1
; CHECK-NEXT: ret i1 [[VAL]]
;
%tmp = ptrtoint i32* %q to i32
; CHECK-LABEL: define {{[^@]+}}@c7
; CHECK-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]])
; CHECK-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]])
-; CHECK-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]]
+; CHECK-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1
; CHECK-NEXT: ret i1 [[VAL]]
;
%ptr = call i1* @lookup_bit(i32* %q, i32 %bitno)
; CHECK-SAME: (i8* nocapture [[P:%.*]])
; CHECK-NEXT: entry:
; CHECK-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* [[P]])
-; CHECK-NEXT: store i8 42, i8* [[B]]
+; CHECK-NEXT: store i8 42, i8* [[B]], align 1
; CHECK-NEXT: ret void
;
entry:
; CHECK-SAME: (i8* nocapture writeonly [[P:%.*]])
; CHECK-NEXT: entry:
; CHECK-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias readnone [[P]])
-; CHECK-NEXT: store i8 42, i8* [[B]]
+; CHECK-NEXT: store i8 42, i8* [[B]], align 1
; CHECK-NEXT: ret void
;
entry:
define void @ptr_uses(i8* %ptr, i8* %wptr) {
; CHECK-LABEL: define {{[^@]+}}@ptr_uses
; CHECK-SAME: (i8* [[PTR:%.*]], i8* nocapture nonnull writeonly dereferenceable(1) [[WPTR:%.*]])
-; CHECK-NEXT: store i8 0, i8* [[WPTR]]
+; CHECK-NEXT: store i8 0, i8* [[WPTR]], align 1
; CHECK-NEXT: ret void
;
%call_ptr = call i8* @maybe_returned_ptr(i8* %ptr)
; CHECK-SAME: (i32* nocapture [[B:%.*]])
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CALL:%.*]] = call i32* @unknown_i32p(i32* [[B]])
-; CHECK-NEXT: store i32 0, i32* [[CALL]]
+; CHECK-NEXT: store i32 0, i32* [[CALL]], align 1
; CHECK-NEXT: ret void
;
entry:
; CHECK-SAME: (i32* nocapture [[B:%.*]])
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CALL:%.*]] = call i32* @readonly_i32p(i32* readonly [[B]])
-; CHECK-NEXT: store i32 0, i32* [[CALL]]
+; CHECK-NEXT: store i32 0, i32* [[CALL]], align 1
; CHECK-NEXT: ret void
;
entry:
define i8 @parent6(i8* %a, i8* %b) {
; CHECK-LABEL: define {{[^@]+}}@parent6
; CHECK-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]])
-; CHECK-NEXT: [[C:%.*]] = load volatile i8, i8* [[B]]
+; CHECK-NEXT: [[C:%.*]] = load volatile i8, i8* [[B]], align 1
; CHECK-NEXT: call void @use1nonnull(i8* nonnull [[A]])
; CHECK-NEXT: ret i8 [[C]]
;
; FIXME: We should propagate dereferenceable here but *not* nonnull
define i32 addrspace(3)* @as(i32 addrspace(3)* dereferenceable(4) %p) {
; CHECK-LABEL: define {{[^@]+}}@as
-; CHECK-SAME: (i32 addrspace(3)* nofree readnone returned dereferenceable(4) dereferenceable_or_null(4) "no-capture-maybe-returned" [[P:%.*]])
+; CHECK-SAME: (i32 addrspace(3)* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]])
; CHECK-NEXT: ret i32 addrspace(3)* [[P]]
;
ret i32 addrspace(3)* %p
; CHECK-NEXT: [[ADDR:%.*]] = alloca i8*
; CHECK-NEXT: call void @escape_readnone_ptr(i8** nonnull align 8 dereferenceable(8) [[ADDR]], i8* noalias readnone [[ESCAPED_THEN_WRITTEN]])
; CHECK-NEXT: [[ADDR_LD:%.*]] = load i8*, i8** [[ADDR]], align 8
-; CHECK-NEXT: store i8 0, i8* [[ADDR_LD]]
+; CHECK-NEXT: store i8 0, i8* [[ADDR_LD]], align 1
; CHECK-NEXT: ret void
;
%addr = alloca i8*
; CHECK-NEXT: [[ADDR:%.*]] = alloca i8*
; CHECK-NEXT: call void @escape_readonly_ptr(i8** nonnull align 8 dereferenceable(8) [[ADDR]], i8* readonly [[ESCAPED_THEN_WRITTEN]])
; CHECK-NEXT: [[ADDR_LD:%.*]] = load i8*, i8** [[ADDR]], align 8
-; CHECK-NEXT: store i8 0, i8* [[ADDR_LD]]
+; CHECK-NEXT: store i8 0, i8* [[ADDR_LD]], align 1
; CHECK-NEXT: ret void
;
%addr = alloca i8*
define void @byval_not_readonly_1(i8* byval %written) readonly {
; CHECK-LABEL: define {{[^@]+}}@byval_not_readonly_1
-; CHECK-SAME: (i8* noalias byval [[WRITTEN:%.*]])
-; CHECK-NEXT: call void @escape_i8(i8* [[WRITTEN]])
+; CHECK-SAME: (i8* noalias nonnull byval dereferenceable(1) [[WRITTEN:%.*]])
+; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]])
; CHECK-NEXT: ret void
;
call void @escape_i8(i8* %written)
define void @byval_not_readonly_2(i8* byval %written) readonly {
; CHECK-LABEL: define {{[^@]+}}@byval_not_readonly_2
; CHECK-SAME: (i8* noalias nocapture nofree nonnull writeonly byval dereferenceable(1) [[WRITTEN:%.*]])
-; CHECK-NEXT: store i8 0, i8* [[WRITTEN]]
+; CHECK-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; CHECK-NEXT: ret void
;
store i8 0, i8* %written
define void @byval_not_readnone_1(i8* byval %written) readnone {
; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_1
-; CHECK-SAME: (i8* noalias byval [[WRITTEN:%.*]])
-; CHECK-NEXT: call void @escape_i8(i8* [[WRITTEN]])
+; CHECK-SAME: (i8* noalias nonnull byval dereferenceable(1) [[WRITTEN:%.*]])
+; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]])
; CHECK-NEXT: ret void
;
call void @escape_i8(i8* %written)
define void @byval_not_readnone_2(i8* byval %written) readnone {
; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_2
; CHECK-SAME: (i8* noalias nocapture nofree nonnull writeonly byval dereferenceable(1) [[WRITTEN:%.*]])
-; CHECK-NEXT: store i8 0, i8* [[WRITTEN]]
+; CHECK-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; CHECK-NEXT: ret void
;
store i8 0, i8* %written
define void @byval_no_fnarg(i8* byval %written) {
; CHECK-LABEL: define {{[^@]+}}@byval_no_fnarg
; CHECK-SAME: (i8* noalias nocapture nofree nonnull writeonly byval dereferenceable(1) [[WRITTEN:%.*]])
-; CHECK-NEXT: store i8 0, i8* [[WRITTEN]]
+; CHECK-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; CHECK-NEXT: ret void
;
store i8 0, i8* %written
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@testbyval
-; IS__CGSCC____-SAME: (i8* nocapture readonly [[READ_ONLY:%.*]])
-; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture readonly [[READ_ONLY]])
+; IS__CGSCC____-SAME: (i8* nocapture nonnull readonly dereferenceable(1) [[READ_ONLY:%.*]])
+; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture nonnull readonly dereferenceable(1) [[READ_ONLY]])
; IS__CGSCC____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture nonnull readnone dereferenceable(1) [[READ_ONLY]])
; IS__CGSCC____-NEXT: ret void
;
; Do not touch complicated arguments (for now)
%struct.X = type { i8* }
define internal i32* @test_inalloca(i32* inalloca %a) {
-; IS__TUNIT____-LABEL: define {{[^@]+}}@test_inalloca
-; IS__TUNIT____-SAME: (i32* inalloca noalias nofree returned writeonly align 536870912 "no-capture-maybe-returned" [[A:%.*]])
-; IS__TUNIT____-NEXT: ret i32* [[A]]
-;
-; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inalloca
-; IS__CGSCC____-SAME: (i32* inalloca noalias nofree returned writeonly "no-capture-maybe-returned" [[A:%.*]])
-; IS__CGSCC____-NEXT: ret i32* [[A]]
+; CHECK-LABEL: define {{[^@]+}}@test_inalloca
+; CHECK-SAME: (i32* inalloca noalias nofree returned writeonly align 536870912 "no-capture-maybe-returned" [[A:%.*]])
+; CHECK-NEXT: ret i32* [[A]]
;
ret i32* %a
}
define internal void @test_sret(%struct.X* sret %a, %struct.X** %b) {
;
-; IS__TUNIT____-LABEL: define {{[^@]+}}@test_sret
-; IS__TUNIT____-SAME: (%struct.X* noalias nofree sret writeonly align 536870912 [[A:%.*]], %struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B:%.*]])
-; IS__TUNIT____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
-; IS__TUNIT____-NEXT: ret void
-;
-; IS__CGSCC____-LABEL: define {{[^@]+}}@test_sret
-; IS__CGSCC____-SAME: (%struct.X* noalias nofree sret writeonly [[A:%.*]], %struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B:%.*]])
-; IS__CGSCC____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
-; IS__CGSCC____-NEXT: ret void
+; CHECK-LABEL: define {{[^@]+}}@test_sret
+; CHECK-SAME: (%struct.X* noalias nofree nonnull sret writeonly align 536870912 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B:%.*]])
+; CHECK-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
+; CHECK-NEXT: ret void
;
store %struct.X* %a, %struct.X** %b
ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__CGSCC____-SAME: (%struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B:%.*]])
-; IS__CGSCC____-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree writeonly align 536870912 null, %struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B]])
+; IS__CGSCC____-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree nonnull writeonly align 536870912 dereferenceable(8) null, %struct.X** nocapture nofree nonnull writeonly align 8 dereferenceable(8) [[B]])
; IS__CGSCC____-NEXT: ret void
;
call void @test_sret(%struct.X* null, %struct.X** %b)
}
define internal %struct.X* @test_nest(%struct.X* nest %a) {
-; IS__TUNIT____-LABEL: define {{[^@]+}}@test_nest
-; IS__TUNIT____-SAME: (%struct.X* nest noalias nofree readnone returned align 536870912 "no-capture-maybe-returned" [[A:%.*]])
-; IS__TUNIT____-NEXT: ret %struct.X* [[A]]
-;
-; IS__CGSCC____-LABEL: define {{[^@]+}}@test_nest
-; IS__CGSCC____-SAME: (%struct.X* nest noalias nofree readnone returned "no-capture-maybe-returned" [[A:%.*]])
-; IS__CGSCC____-NEXT: ret %struct.X* [[A]]
+; CHECK-LABEL: define {{[^@]+}}@test_nest
+; CHECK-SAME: (%struct.X* nest noalias nofree readnone returned align 536870912 "no-capture-maybe-returned" [[A:%.*]])
+; CHECK-NEXT: ret %struct.X* [[A]]
;
ret %struct.X* %a
}
; CHECK-NEXT: br label [[SW_EPILOG]]
; CHECK: sw.epilog:
; CHECK-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ]
-; CHECK-NEXT: store i32 [[X_0]], i32* [[P]]
+; CHECK-NEXT: store i32 [[X_0]], i32* [[P]], align 1
; CHECK-NEXT: [[INC]] = add nsw i32 [[J_0]], 1
; CHECK-NEXT: br label [[FOR_COND]]
; CHECK: for.end: