* gcc.target/alpha/
20011018-1.c: Ditto.
* gcc.target/alpha/980217-1.c: Ditto.
* gcc.target/alpha/asm-1.c: Ditto.
* gcc.target/alpha/base-1.c: Ditto.
* gcc.target/alpha/base-2.c: Ditto.
* gcc.target/alpha/cix-1.c: Ditto.
* gcc.target/alpha/cix-2.c: Ditto.
* gcc.target/alpha/max-1.c: Ditto.
* gcc.target/alpha/max-2.c: Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@155426
138bc75d-0d04-0410-961f-
82ee72b054a4
+2009-12-23 Uros Bizjak <ubizjak@gmail.com>
+
+ * gcc.target/alpha/20000715-1.c: Remove target selector.
+ * gcc.target/alpha/20011018-1.c: Ditto.
+ * gcc.target/alpha/980217-1.c: Ditto.
+ * gcc.target/alpha/asm-1.c: Ditto.
+ * gcc.target/alpha/base-1.c: Ditto.
+ * gcc.target/alpha/base-2.c: Ditto.
+ * gcc.target/alpha/cix-1.c: Ditto.
+ * gcc.target/alpha/cix-2.c: Ditto.
+ * gcc.target/alpha/max-1.c: Ditto.
+ * gcc.target/alpha/max-2.c: Ditto.
+
2009-12-23 Sebastian Pop <sebpop@gmail.com>
* g++.dg/graphite/id-1.C: New.
-/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-O2 -mieee" } */
float foo(unsigned char n)
-/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-O2 -mieee" } */
double foo (void);
/* Test float on alpha. */
-/* { dg-do run { target alpha*-*-* } } */
+/* { dg-do run } */
/* { dg-options "-mieee -O2" } */
extern void abort(void);
/* Asm operands that are given as hard registers must keep the same
hard register all the way through compilation. Example derived
from glibc source. */
-/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-O2 -frename-registers -fcprop-registers" } */
/* { dg-final { scan-assembler "callsys1 .0 .19 .0 .16 .17" } } */
/* { dg-final { scan-assembler "callsys2 .0 .19 .0 .16 .17" } } */
/* Test that the base isa builtins compile. */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
/* { dg-options "-mcpu=ev4" } */
void test_BASE (long x, long y)
/* Test that alpha-base-1.c compiles with optimization. */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
/* { dg-options "-mcpu=ev4 -O2" } */
#include "base-1.c"
/* Test that the CIX isa builtins compile. */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
/* { dg-options "-mcpu=ev67" } */
void test_CIX (long x)
/* Test that alpha-cix-1.c compiles with optimization. */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
/* { dg-options "-mcpu=ev67 -O2" } */
#include "cix-1.c"
/* Test that the MAX isa builtins compile. */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
/* { dg-options "-mcpu=pca56" } */
void test_MAX (long x, long y)
/* Test that alpha-max-1.c compiles with optimization. */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
/* { dg-options "-mcpu=pca56 -O2" } */
#include "max-1.c"