phy: qcom: qmp-combo: drop qmp_v6_dp_aux_init()
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 21 Jun 2023 15:33:16 +0000 (18:33 +0300)
committerVinod Koul <vkoul@kernel.org>
Wed, 12 Jul 2023 16:57:43 +0000 (22:27 +0530)
The only difference between qmp_v6_dp_aux_init() and
qmp_v4_dp_aux_init() is the address of COM_BIAS_EN_CLKBUFLR_EN register.
Move it to register layout and drop the duplicate function.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c

index 0b27b38..61a1f7c 100644 (file)
@@ -110,6 +110,7 @@ enum qphy_reg_layout {
        QPHY_COM_RESETSM_CNTRL,
        QPHY_COM_C_READY_STATUS,
        QPHY_COM_CMN_STATUS,
+       QPHY_COM_BIAS_EN_CLKBUFLR_EN,
 
        QPHY_DP_PHY_STATUS,
 
@@ -134,6 +135,7 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
        [QPHY_COM_RESETSM_CNTRL]        = QSERDES_V3_COM_RESETSM_CNTRL,
        [QPHY_COM_C_READY_STATUS]       = QSERDES_V3_COM_C_READY_STATUS,
        [QPHY_COM_CMN_STATUS]           = QSERDES_V3_COM_CMN_STATUS,
+       [QPHY_COM_BIAS_EN_CLKBUFLR_EN]  = QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN,
 
        [QPHY_DP_PHY_STATUS]            = QSERDES_V3_DP_PHY_STATUS,
 
@@ -157,6 +159,7 @@ static const unsigned int qmp_v45_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
        [QPHY_COM_RESETSM_CNTRL]        = QSERDES_V4_COM_RESETSM_CNTRL,
        [QPHY_COM_C_READY_STATUS]       = QSERDES_V4_COM_C_READY_STATUS,
        [QPHY_COM_CMN_STATUS]           = QSERDES_V4_COM_CMN_STATUS,
+       [QPHY_COM_BIAS_EN_CLKBUFLR_EN]  = QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN,
 
        [QPHY_DP_PHY_STATUS]            = QSERDES_V4_DP_PHY_STATUS,
 
@@ -180,6 +183,7 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
        [QPHY_COM_RESETSM_CNTRL]        = QSERDES_V5_COM_RESETSM_CNTRL,
        [QPHY_COM_C_READY_STATUS]       = QSERDES_V5_COM_C_READY_STATUS,
        [QPHY_COM_CMN_STATUS]           = QSERDES_V5_COM_CMN_STATUS,
+       [QPHY_COM_BIAS_EN_CLKBUFLR_EN]  = QSERDES_V5_COM_BIAS_EN_CLKBUFLR_EN,
 
        [QPHY_DP_PHY_STATUS]            = QSERDES_V5_DP_PHY_STATUS,
 
@@ -203,6 +207,7 @@ static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
        [QPHY_COM_RESETSM_CNTRL]        = QSERDES_V6_COM_RESETSM_CNTRL,
        [QPHY_COM_C_READY_STATUS]       = QSERDES_V6_COM_C_READY_STATUS,
        [QPHY_COM_CMN_STATUS]           = QSERDES_V6_COM_CMN_STATUS,
+       [QPHY_COM_BIAS_EN_CLKBUFLR_EN]  = QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN,
 
        [QPHY_DP_PHY_STATUS]            = QSERDES_V6_DP_PHY_STATUS,
 
@@ -1433,8 +1438,6 @@ static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp);
 static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp);
 static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp);
 
-static void qmp_v6_dp_aux_init(struct qmp_combo *qmp);
-
 static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
 {
        u32 reg;
@@ -1870,7 +1873,7 @@ static const struct qmp_phy_cfg sm8550_usb3dpphy_cfg = {
        .swing_hbr3_hbr2        = &qmp_dp_v5_voltage_swing_hbr3_hbr2,
        .pre_emphasis_hbr3_hbr2 = &qmp_dp_v5_pre_emphasis_hbr3_hbr2,
 
-       .dp_aux_init            = qmp_v6_dp_aux_init,
+       .dp_aux_init            = qmp_v4_dp_aux_init,
        .configure_dp_tx        = qmp_v4_configure_dp_tx,
        .configure_dp_phy       = qmp_v4_configure_dp_phy,
        .calibrate_dp_phy       = qmp_v4_calibrate_dp_phy,
@@ -1945,6 +1948,8 @@ static int qmp_combo_dp_serdes_init(struct qmp_combo *qmp)
 
 static void qmp_v3_dp_aux_init(struct qmp_combo *qmp)
 {
+       const struct qmp_phy_cfg *cfg = qmp->cfg;
+
        writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
               DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
               qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
@@ -1952,7 +1957,7 @@ static void qmp_v3_dp_aux_init(struct qmp_combo *qmp)
        /* Turn on BIAS current for PHY/PLL */
        writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX |
               QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL,
-              qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN);
+              qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]);
 
        writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
 
@@ -1966,7 +1971,7 @@ static void qmp_v3_dp_aux_init(struct qmp_combo *qmp)
               QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_R_EN |
               QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL |
               QSERDES_V3_COM_CLKBUF_RX_DRIVE_L,
-              qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN);
+              qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]);
 
        writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0);
        writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1);
@@ -2162,39 +2167,14 @@ static int qmp_v3_calibrate_dp_phy(struct qmp_combo *qmp)
 
 static void qmp_v4_dp_aux_init(struct qmp_combo *qmp)
 {
-       writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
-              DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
-              qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
-
-       /* Turn on BIAS current for PHY/PLL */
-       writel(0x17, qmp->dp_serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN);
-
-       writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0);
-       writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1);
-       writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2);
-       writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3);
-       writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4);
-       writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5);
-       writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6);
-       writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7);
-       writel(0xb7, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8);
-       writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9);
-       qmp->dp_aux_cfg = 0;
-
-       writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK |
-              PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK |
-              PHY_AUX_REQ_ERR_MASK,
-              qmp->dp_dp_phy + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK);
-}
+       const struct qmp_phy_cfg *cfg = qmp->cfg;
 
-static void qmp_v6_dp_aux_init(struct qmp_combo *qmp)
-{
        writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
               DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
               qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
 
        /* Turn on BIAS current for PHY/PLL */
-       writel(0x17, qmp->dp_serdes + QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN);
+       writel(0x17, qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]);
 
        writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0);
        writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1);