drm/i915/dp: abstract intel_dp_lane_max_vswing_reached()

Add per-lane abstraction for max vswing reached to make follow-up
cleaner, as this one reverses the conditions.

v2: both conditions need to be true, reverse (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211011182144.22074-1-jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 1a943ae..1d4bcb9 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -515,29 +515,37 @@ intel_dp_update_link_train(struct intel_dp *intel_dp,
        return ret == crtc_state->lane_count;
 }
 
+/*
+ * FIXME: The DP spec is very confusing here, also the Link CTS spec seems to
+ * have self contradicting tests around this area.
+ *
+ * In lieu of better ideas let's just stop when we've reached the max supported
+ * vswing with its max pre-emphasis, which is either 2+1 or 3+0 depending on
+ * whether vswing level 3 is supported or not.
+ */
+static bool intel_dp_lane_max_vswing_reached(u8 train_set_lane)
+{
+       u8 v = (train_set_lane & DP_TRAIN_VOLTAGE_SWING_MASK) >>
+               DP_TRAIN_VOLTAGE_SWING_SHIFT;
+       u8 p = (train_set_lane & DP_TRAIN_PRE_EMPHASIS_MASK) >>
+               DP_TRAIN_PRE_EMPHASIS_SHIFT;
+
+       if ((train_set_lane & DP_TRAIN_MAX_SWING_REACHED) == 0)
+               return false;
+
+       if (v + p != 3)
+               return false;
+
+       return true;
+}
+
 static bool intel_dp_link_max_vswing_reached(struct intel_dp *intel_dp,
                                             const struct intel_crtc_state *crtc_state)
 {
        int lane;
 
-       /*
-        * FIXME: The DP spec is very confusing here, also the Link CTS
-        * spec seems to have self contradicting tests around this area.
-        *
-        * In lieu of better ideas let's just stop when we've reached the
-        * max supported vswing with its max pre-emphasis, which is either
-        * 2+1 or 3+0 depending on whether vswing level 3 is supported or not.
-        */
        for (lane = 0; lane < crtc_state->lane_count; lane++) {
-               u8 v = (intel_dp->train_set[lane] & DP_TRAIN_VOLTAGE_SWING_MASK) >>
-                       DP_TRAIN_VOLTAGE_SWING_SHIFT;
-               u8 p = (intel_dp->train_set[lane] & DP_TRAIN_PRE_EMPHASIS_MASK) >>
-                       DP_TRAIN_PRE_EMPHASIS_SHIFT;
-
-               if ((intel_dp->train_set[lane] & DP_TRAIN_MAX_SWING_REACHED) == 0)
-                       return false;
-
-               if (v + p != 3)
+               if (!intel_dp_lane_max_vswing_reached(intel_dp->train_set[lane]))
                        return false;
        }