+2007-01-12 Richard Sandiford <richard@codesourcery.com>
+
+ * config.gcc (m68010-*-netbsdelf*): Add MASK_68010.
+ (m68k*-*-netbsdelf*, m68k*-*-openbsd*, m68k*-linux*): Add
+ MASK_68010 alongside MASK_68020.
+ * doc/invoke.texi: Document -m68010.
+ * config/m68k/m68k.opt (m68010): New.
+ * config/m68k/m68k.h (TARGET_CPU_CPP_BUILTINS): Define mc68010
+ if TUNE_68010.
+ (TUNE_68010): New macro.
+ * config/m68k/m68k-none.h (M68K_CPU_m68k, M68K_CPU_m68010)
+ (M68K_CPU_m68020, M68K_CPU_m68030, M68K_CPU_m68040)
+ (M68K_CPU_m68332): Add MASK_68010.
+ * config/m68k/linux.h (TARGET_DEFAULT): Add MASK_68010 to
+ fallback definition.
+ * config/m68k/netbsd-elf.h (CPP_CPU_SPEC): Remove now-redundant
+ defines.
+ * config/m68k/m68k.c (MASK_ALL_CPU_BITS): Add MASK_68010.
+ (m68k_handle_option): Handle OPT_m68010. Add MASK_68010
+ to all entries that use MASK_68020.
+ (output_move_simode_const, output_move_himode, output_move_qimode)
+ (output_move_stricthi, output_move_strictqi): Use TARGET_68010
+ instead of TARGET_68020 to select clr behavior. Remove comment
+ about there being no TARGET_68010.
+ * config/m68k/m68k.md: Likewise throughout.
+
2007-01-12 Julian Brown <julian@codesourcery.com>
* config/m68k/m68k.h (TARGET_ISAB): New macro.
tm_defines="${tm_defines} MOTOROLA USE_GAS"
case ${target} in
m68010*)
- target_cpu_default="0"
+ target_cpu_default="MASK_68010"
;;
*)
- target_cpu_default="MASK_68020|MASK_68881|MASK_BITFIELD"
+ target_cpu_default="MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD"
;;
esac
;;
m68k*-*-openbsd*)
# needed to unconfuse gdb
- tm_defines="${tm_defines} OBSD_OLD_GAS TARGET_DEFAULT=(MASK_68020|MASK_68881|MASK_BITFIELD)"
+ tm_defines="${tm_defines} OBSD_OLD_GAS TARGET_DEFAULT=(MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD)"
tm_file="m68k/m68k.h openbsd.h m68k/openbsd.h"
tmake_file="t-libc-ok t-openbsd m68k/t-openbsd"
# we need collect2 until our bug is fixed...
case "x$with_cpu" in
x)
# The most generic
- target_cpu_default2="(MASK_68020|MASK_68881|MASK_BITFIELD)"
+ target_cpu_default2="(MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD)"
;;
xm68020)
- target_cpu_default2="(MASK_68020|MASK_68881|MASK_BITFIELD)"
+ target_cpu_default2="(MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD)"
;;
xm68030)
- target_cpu_default2="(MASK_68030|MASK_68020|MASK_68881|MASK_BITFIELD)"
+ target_cpu_default2="(MASK_68030|MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD)"
;;
xm68040)
- target_cpu_default2="(MASK_68040|MASK_68040_ONLY|MASK_68020|MASK_68881|MASK_BITFIELD)"
+ target_cpu_default2="(MASK_68040|MASK_68040_ONLY|MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD)"
;;
xm68060)
- target_cpu_default2="(MASK_68060|MASK_68040_ONLY|MASK_68020|MASK_68881|MASK_BITFIELD)"
+ target_cpu_default2="(MASK_68060|MASK_68040_ONLY|MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD)"
;;
xm68020-40)
- target_cpu_default2="(MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040)"
+ target_cpu_default2="(MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68010|MASK_68040)"
;;
xm68020-60)
- target_cpu_default2="(MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040|MASK_68060)"
+ target_cpu_default2="(MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68010|MASK_68040|MASK_68060)"
;;
*)
echo "Unknown CPU used in --with-cpu=$with_cpu" 1>&2
#ifdef TARGET_CPU_DEFAULT
#define TARGET_DEFAULT TARGET_CPU_DEFAULT
#else
-#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68881|MASK_68020)
+#define TARGET_DEFAULT (MASK_BITFIELD|MASK_68881|MASK_68010|MASK_68020)
#endif
/* for 68k machines this only needs to be TRUE for the 68000 */
/* These are values set by the configure script in TARGET_CPU_DEFAULT.
They are (sequential integer + (desired value for TARGET_DEFAULT) << 4). */
-#define M68K_CPU_m68k (0 + ((MASK_68020|MASK_68881|MASK_BITFIELD)<<4))
+#define M68K_CPU_m68k (0 + ((MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD)<<4))
#define M68K_CPU_m68000 (1 + (0 << 4))
-#define M68K_CPU_m68010 (1 + (0 << 4)) /* make same as m68000 */
-#define M68K_CPU_m68020 (2 + ((MASK_68020|MASK_68881|MASK_BITFIELD) << 4))
-#define M68K_CPU_m68030 (3 + ((MASK_68030|MASK_68020|MASK_68881|MASK_BITFIELD) << 4))
-#define M68K_CPU_m68040 (4 + ((MASK_68040_ONLY|MASK_68020|MASK_68881|MASK_BITFIELD) << 4))
+#define M68K_CPU_m68010 (1 + (MASK_68010 << 4))
+#define M68K_CPU_m68020 (2 + ((MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD) << 4))
+#define M68K_CPU_m68030 (3 + ((MASK_68030|MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD) << 4))
+#define M68K_CPU_m68040 (4 + ((MASK_68040_ONLY|MASK_68020|MASK_68010|MASK_68881|MASK_BITFIELD) << 4))
#define M68K_CPU_m68302 (5 + (0 << 4))
-#define M68K_CPU_m68332 (6 + (MASK_68020 << 4))
+#define M68K_CPU_m68332 (6 + ((MASK_68020|MASK_68010) << 4))
/* This is tested for below, so if target wants to override this, it
just set this first in cover file. */
#define MASK_ALL_CPU_BITS \
(MASK_COLDFIRE | MASK_CF_HWDIV | MASK_68060 | MASK_68040 \
- | MASK_68040_ONLY | MASK_68030 | MASK_68020 | MASK_BITFIELD)
+ | MASK_68040_ONLY | MASK_68030 | MASK_68020 | MASK_68010 | MASK_BITFIELD)
/* Implement TARGET_HANDLE_OPTION. */
target_flags &= ~(MASK_ALL_CPU_BITS | MASK_68881);
return true;
+ case OPT_m68010:
+ target_flags &= ~(MASK_ALL_CPU_BITS | MASK_68881);
+ target_flags |= MASK_68010;
+ return true;
+
case OPT_m68020:
case OPT_mc68020:
target_flags &= ~MASK_ALL_CPU_BITS;
- target_flags |= MASK_68020 | MASK_BITFIELD;
+ target_flags |= MASK_68010 | MASK_68020 | MASK_BITFIELD;
return true;
case OPT_m68020_40:
target_flags &= ~MASK_ALL_CPU_BITS;
- target_flags |= MASK_BITFIELD | MASK_68881 | MASK_68020 | MASK_68040;
+ target_flags |= (MASK_BITFIELD | MASK_68881 | MASK_68010
+ | MASK_68020 | MASK_68040);
return true;
case OPT_m68020_60:
target_flags &= ~MASK_ALL_CPU_BITS;
- target_flags |= (MASK_BITFIELD | MASK_68881 | MASK_68020
- | MASK_68040 | MASK_68060);
+ target_flags |= (MASK_BITFIELD | MASK_68881 | MASK_68010
+ | MASK_68020 | MASK_68040 | MASK_68060);
return true;
case OPT_m68030:
target_flags &= ~MASK_ALL_CPU_BITS;
- target_flags |= MASK_68020 | MASK_68030 | MASK_BITFIELD;
+ target_flags |= MASK_68010 | MASK_68020 | MASK_68030 | MASK_BITFIELD;
return true;
case OPT_m68040:
target_flags &= ~MASK_ALL_CPU_BITS;
- target_flags |= (MASK_68020 | MASK_68881 | MASK_BITFIELD
+ target_flags |= (MASK_68010 | MASK_68020 | MASK_68881 | MASK_BITFIELD
| MASK_68040_ONLY | MASK_68040);
return true;
case OPT_m68060:
target_flags &= ~MASK_ALL_CPU_BITS;
- target_flags |= (MASK_68020 | MASK_68881 | MASK_BITFIELD
+ target_flags |= (MASK_68010 | MASK_68020 | MASK_68881 | MASK_BITFIELD
| MASK_68040_ONLY | MASK_68060);
return true;
case OPT_m68332:
case OPT_mcpu32:
target_flags &= ~(MASK_ALL_CPU_BITS | MASK_68881);
- target_flags |= MASK_68020;
+ target_flags |= MASK_68010 | MASK_68020;
return true;
case OPT_mshared_library_id_:
if (operands[1] == const0_rtx
&& (DATA_REG_P (operands[0])
|| GET_CODE (operands[0]) == MEM)
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_COLDFIRE)
+ /* clr insns on 68000 read before writing. */
+ && ((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM
&& MEM_VOLATILE_P (operands[0]))))
return "clr%.l %0";
if (operands[1] == const0_rtx
&& (DATA_REG_P (operands[0])
|| GET_CODE (operands[0]) == MEM)
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_COLDFIRE)
+ /* clr insns on 68000 read before writing. */
+ && ((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM
&& MEM_VOLATILE_P (operands[0]))))
return "clr%.w %0";
&& ! ADDRESS_REG_P (operands[1])
&& ! TARGET_COLDFIRE));
- /* clr and st insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
+ /* clr and st insns on 68000 read before writing. */
if (!ADDRESS_REG_P (operands[0])
- && ((TARGET_68020 || TARGET_COLDFIRE)
+ && ((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
{
if (operands[1] == const0_rtx)
output_move_stricthi (rtx *operands)
{
if (operands[1] == const0_rtx
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_COLDFIRE)
+ /* clr insns on 68000 read before writing. */
+ && ((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
return "clr%.w %0";
return "move%.w %1,%0";
output_move_strictqi (rtx *operands)
{
if (operands[1] == const0_rtx
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_COLDFIRE)
+ /* clr insns on 68000 read before writing. */
+ && ((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
return "clr%.b %0";
return "move%.b %1,%0";
builtin_define_std ("mc68030"); \
else if (TARGET_68020) \
builtin_define_std ("mc68020"); \
+ else if (TUNE_68010) \
+ builtin_define_std ("mc68010"); \
if (TARGET_68881) \
builtin_define ("__HAVE_68881__"); \
if (TUNE_CPU32) \
#define TARGET_ISAB TARGET_CFV4
#define TUNE_68000_10 (!TARGET_68020 && !TARGET_COLDFIRE)
+#define TUNE_68010 TARGET_68010
#define TUNE_68030 TARGET_68030
#define TUNE_68040 TARGET_68040
#define TUNE_68060 TARGET_68060
[(set (match_operand:SI 0 "nonimmediate_operand" "=g")
(const_int 0))]
;; clr insns on 68000 read before writing.
- ;; This isn't so on the 68010, but we have no TARGET_68010.
- "((TARGET_68020 || TARGET_COLDFIRE)
+ "((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))"
{
if (ADDRESS_REG_P (operands[0]))
return "fmove%.s %f1,%0";
}
if (operands[1] == CONST0_RTX (SFmode)
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_COLDFIRE)
+ /* clr insns on 68000 read before writing. */
+ && ((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
{
if (ADDRESS_REG_P (operands[0]))
if (operands[1] == const0_rtx
&& (DATA_REG_P (operands[0])
|| GET_CODE (operands[0]) == MEM)
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_COLDFIRE)
+ /* clr insns on 68000 read before writing. */
+ && ((TARGET_68010 || TARGET_COLDFIRE)
|| !(GET_CODE (operands[0]) == MEM
&& MEM_VOLATILE_P (operands[0]))))
return "clr%.w %0";
Target RejectNegative
Generate code for a 68000
+m68010
+Target RejectNegative Mask(68010)
+Generate code for a 68010
+
m68020
Target RejectNegative Mask(68020)
Generate code for a 68020
#define CPP_CPU_SPEC \
- "%{m68010:-D__mc68010__} \
- %{m68020:-D__mc68020__} \
- %{m68030:-D__mc68030__} \
- %{m68040:-D__mc68040__} \
- %(cpp_cpu_default_spec)"
+ "%(cpp_cpu_default_spec)"
#undef TARGET_VERSION
Use this option for microcontrollers with a 68000 or EC000 core,
including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+@item -m68010
+@opindex m68010
+Generate output for a 68010. This is the default
+when the compiler is configured for 68010-based systems.
+
@item -m68020
@itemx -mc68020
@opindex m68020