arm64: zynqmp: Add psgtr DT descriptions

Mainline kernel has psgtr driver that's why it is good to add description
to DT files. Some boards are just missing description for USB3 and sata.
zc1751-dc1 and p-a2197 are also missing clock descriptions for input
clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
index 8e1e6b7..1f5201a 100644 (file)
--- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
@@ -11,6 +11,7 @@
 #include "zynqmp.dtsi"
 #include "zynqmp-clk-ccf.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/phy/phy.h>
 
 / {
        model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */
@@ -43,6 +44,18 @@
                device_type = "memory";
                reg = <0x0 0x0 0x0 0x80000000>;
        };
+
+       si5332_1: si5332_1 { /* clk0_sgmii - u142 */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <33333333>; /* FIXME */
+       };
+
+       si5332_2: si5332_2 { /* clk1_usb - u142 */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <27000000>;
+       };
 };
 
 &sdhci0 { /* emmc MIO 13-23 - with some settings  16GB */
@@ -70,6 +83,13 @@
        xlnx,mio-bank = <1>;
 };
 
+&psgtr {
+       status = "okay";
+       /* sgmii, usb3 */
+       clocks = <&si5332_1>, <&si5332_2>;
+       clock-names = "ref0", "ref1";
+};
+
 &gem0 {
        status = "okay";
        phy-handle = <&phy0>;
@@ -537,6 +557,8 @@
        snps,dis_u2_susphy_quirk;
        snps,dis_u3_susphy_quirk;
        maximum-speed = "super-speed";
+       phy-names = "usb3-phy";
+       phys = <&psgtr 1 PHY_TYPE_USB3 0 1>;
 };
 
 &usb1 {

diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index d5862c1..039a8da 100644 (file)
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -11,6 +11,7 @@
 
 #include "zynqmp.dtsi"
 #include "zynqmp-clk-ccf.dtsi"
+#include <dt-bindings/phy/phy.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
 
@@ -39,6 +40,31 @@
                device_type = "memory";
                reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
        };
+
+       clock_si5338_0: clk27 { /* u55 SI5338-GM */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <27000000>;
+       };
+
+       clock_si5338_2: clk26 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <26000000>;
+       };
+
+       clock_si5338_3: clk150 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <150000000>;
+       };
+};
+
+&psgtr {
+       status = "okay";
+       /* dp, usb3, sata */
+       clocks = <&clock_si5338_0>, <&clock_si5338_2>, <&clock_si5338_3>;
+       clock-names = "ref1", "ref2", "ref3";
 };
 
 &fpd_dma_chan1 {
@@ -363,6 +389,8 @@
        ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
        ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
        ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+       phy-names = "sata-phy";
+       phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
 };
 
 /* eMMC */
@@ -402,6 +430,9 @@
 &dwc3_0 {
        status = "okay";
        dr_mode = "host";
+       snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
 };
 
 &zynqmp_dpdma {

diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 9603043..b83696c 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -567,6 +567,8 @@
 &dwc3_0 {
        status = "okay";
        dr_mode = "peripheral";
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
        maximum-speed = "super-speed";
 };
 
@@ -580,6 +582,8 @@
 &dwc3_1 {
        status = "okay";
        dr_mode = "host";
+       phy-names = "usb3-phy";
+       phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
        maximum-speed = "super-speed";
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index 27c3dcc..ec61b70 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -1034,6 +1034,8 @@
        status = "okay";
        dr_mode = "host";
        snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
        maximum-speed = "super-speed";
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index bad73d9..c25ac9a 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -511,6 +511,8 @@
        status = "okay";
        dr_mode = "host";
        snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
        maximum-speed = "super-speed";
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index 1b4cfb1..ce9d8fb 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -524,6 +524,8 @@
        status = "okay";
        dr_mode = "host";
        snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
        maximum-speed = "super-speed";
 };
 

diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index 9a6b00f..ae20e58 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -1049,6 +1049,8 @@
        status = "okay";
        dr_mode = "host";
        snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
 };
 
 &watchdog0 {

diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index ec2bf53..d564f74 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -826,7 +826,7 @@
        ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
        ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
        phy-names = "sata-phy";
-       phys = <&psgtr 3 PHY_TYPE_SATA 1 1>;
+       phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
 };
 
 /* SD1 with level shifter */
@@ -853,7 +853,14 @@
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
+};
+
+&dwc3_0 {
+       status = "okay";
        dr_mode = "host";
+       snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
 };
 
 &zynqmp_dpdma {

diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index 0dc9880..880281d 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -671,6 +671,7 @@
        ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
        ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
        ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+       phy-names = "sata-phy";
        phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
 };
 
@@ -698,4 +699,6 @@
        status = "okay";
        dr_mode = "host";
        snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
 };

diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index e0258ea..f899226 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -675,6 +675,7 @@
        ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
        ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
        ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+       phy-names = "sata-phy";
        phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
 };
 
@@ -702,4 +703,6 @@
        status = "okay";
        dr_mode = "host";
        snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
 };