ath9k_hw: Cleanup power mode API
authorSujith Manoharan <c_manoha@qca.qualcomm.com>
Mon, 4 Jun 2012 10:57:36 +0000 (16:27 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 6 Jun 2012 19:20:25 +0000 (15:20 -0400)
The 'setChip' variable is unused, remove it and
simplify the functions.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c

index a7231ca..9f0f5f7 100644 (file)
@@ -2004,39 +2004,38 @@ EXPORT_SYMBOL(ath9k_hw_reset);
  * Notify Power Mgt is disabled in self-generated frames.
  * If requested, force chip to sleep.
  */
-static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
+static void ath9k_set_power_sleep(struct ath_hw *ah)
 {
        REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
-       if (setChip) {
-               if (AR_SREV_9462(ah)) {
-                       REG_WRITE(ah, AR_TIMER_MODE,
-                                 REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00);
-                       REG_WRITE(ah, AR_NDP2_TIMER_MODE, REG_READ(ah,
-                                 AR_NDP2_TIMER_MODE) & 0xFFFFFF00);
-                       REG_WRITE(ah, AR_SLP32_INC,
-                                 REG_READ(ah, AR_SLP32_INC) & 0xFFF00000);
-                       /* xxx Required for WLAN only case ? */
-                       REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0);
-                       udelay(100);
-               }
 
-               /*
-                * Clear the RTC force wake bit to allow the
-                * mac to go to sleep.
-                */
-               REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
+       if (AR_SREV_9462(ah)) {
+               REG_WRITE(ah, AR_TIMER_MODE,
+                         REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00);
+               REG_WRITE(ah, AR_NDP2_TIMER_MODE,
+                         REG_READ(ah, AR_NDP2_TIMER_MODE) & 0xFFFFFF00);
+               REG_WRITE(ah, AR_SLP32_INC,
+                         REG_READ(ah, AR_SLP32_INC) & 0xFFF00000);
+               /* xxx Required for WLAN only case ? */
+               REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0);
+               udelay(100);
+       }
 
-               if (AR_SREV_9462(ah))
-                       udelay(100);
+       /*
+        * Clear the RTC force wake bit to allow the
+        * mac to go to sleep.
+        */
+       REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
 
-               if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
-                       REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
+       if (AR_SREV_9462(ah))
+               udelay(100);
 
-               /* Shutdown chip. Active low */
-               if (!AR_SREV_5416(ah) && !AR_SREV_9271(ah)) {
-                       REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN);
-                       udelay(2);
-               }
+       if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
+               REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
+
+       /* Shutdown chip. Active low */
+       if (!AR_SREV_5416(ah) && !AR_SREV_9271(ah)) {
+               REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN);
+               udelay(2);
        }
 
        /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */
@@ -2049,44 +2048,42 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
  * frames. If request, set power mode of chip to
  * auto/normal.  Duration in units of 128us (1/8 TU).
  */
-static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip)
+static void ath9k_set_power_network_sleep(struct ath_hw *ah)
 {
+       struct ath9k_hw_capabilities *pCap = &ah->caps;
        u32 val;
 
        REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
-       if (setChip) {
-               struct ath9k_hw_capabilities *pCap = &ah->caps;
 
-               if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
-                       /* Set WakeOnInterrupt bit; clear ForceWake bit */
-                       REG_WRITE(ah, AR_RTC_FORCE_WAKE,
-                                 AR_RTC_FORCE_WAKE_ON_INT);
-               } else {
+       if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
+               /* Set WakeOnInterrupt bit; clear ForceWake bit */
+               REG_WRITE(ah, AR_RTC_FORCE_WAKE,
+                         AR_RTC_FORCE_WAKE_ON_INT);
+       } else {
 
-                       /* When chip goes into network sleep, it could be waken
-                        * up by MCI_INT interrupt caused by BT's HW messages
-                        * (LNA_xxx, CONT_xxx) which chould be in a very fast
-                        * rate (~100us). This will cause chip to leave and
-                        * re-enter network sleep mode frequently, which in
-                        * consequence will have WLAN MCI HW to generate lots of
-                        * SYS_WAKING and SYS_SLEEPING messages which will make
-                        * BT CPU to busy to process.
-                        */
-                       if (AR_SREV_9462(ah)) {
-                               val = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_EN) &
-                                       ~AR_MCI_INTERRUPT_RX_HW_MSG_MASK;
-                               REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, val);
-                       }
-                       /*
-                        * Clear the RTC force wake bit to allow the
-                        * mac to go to sleep.
-                        */
-                       REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,
-                                   AR_RTC_FORCE_WAKE_EN);
-
-                       if (AR_SREV_9462(ah))
-                               udelay(30);
+               /* When chip goes into network sleep, it could be waken
+                * up by MCI_INT interrupt caused by BT's HW messages
+                * (LNA_xxx, CONT_xxx) which chould be in a very fast
+                * rate (~100us). This will cause chip to leave and
+                * re-enter network sleep mode frequently, which in
+                * consequence will have WLAN MCI HW to generate lots of
+                * SYS_WAKING and SYS_SLEEPING messages which will make
+                * BT CPU to busy to process.
+                */
+               if (AR_SREV_9462(ah)) {
+                       val = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_EN) &
+                               ~AR_MCI_INTERRUPT_RX_HW_MSG_MASK;
+                       REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, val);
                }
+               /*
+                * Clear the RTC force wake bit to allow the
+                * mac to go to sleep.
+                */
+               REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,
+                           AR_RTC_FORCE_WAKE_EN);
+
+               if (AR_SREV_9462(ah))
+                       udelay(30);
        }
 
        /* Clear Bit 14 of AR_WA after putting chip into Net Sleep mode. */
@@ -2094,7 +2091,7 @@ static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip)
                REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
 }
 
-static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
+static bool ath9k_hw_set_power_awake(struct ath_hw *ah)
 {
        u32 val;
        int i;
@@ -2105,37 +2102,35 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
                udelay(10);
        }
 
-       if (setChip) {
-               if ((REG_READ(ah, AR_RTC_STATUS) &
-                    AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) {
-                       if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
-                               return false;
-                       }
-                       if (!AR_SREV_9300_20_OR_LATER(ah))
-                               ath9k_hw_init_pll(ah, NULL);
+       if ((REG_READ(ah, AR_RTC_STATUS) &
+            AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) {
+               if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
+                       return false;
                }
-               if (AR_SREV_9100(ah))
-                       REG_SET_BIT(ah, AR_RTC_RESET,
-                                   AR_RTC_RESET_EN);
+               if (!AR_SREV_9300_20_OR_LATER(ah))
+                       ath9k_hw_init_pll(ah, NULL);
+       }
+       if (AR_SREV_9100(ah))
+               REG_SET_BIT(ah, AR_RTC_RESET,
+                           AR_RTC_RESET_EN);
 
+       REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,
+                   AR_RTC_FORCE_WAKE_EN);
+       udelay(50);
+
+       for (i = POWER_UP_TIME / 50; i > 0; i--) {
+               val = REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M;
+               if (val == AR_RTC_STATUS_ON)
+                       break;
+               udelay(50);
                REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,
                            AR_RTC_FORCE_WAKE_EN);
-               udelay(50);
-
-               for (i = POWER_UP_TIME / 50; i > 0; i--) {
-                       val = REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M;
-                       if (val == AR_RTC_STATUS_ON)
-                               break;
-                       udelay(50);
-                       REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,
-                                   AR_RTC_FORCE_WAKE_EN);
-               }
-               if (i == 0) {
-                       ath_err(ath9k_hw_common(ah),
-                               "Failed to wakeup in %uus\n",
-                               POWER_UP_TIME / 20);
-                       return false;
-               }
+       }
+       if (i == 0) {
+               ath_err(ath9k_hw_common(ah),
+                       "Failed to wakeup in %uus\n",
+                       POWER_UP_TIME / 20);
+               return false;
        }
 
        REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
@@ -2146,7 +2141,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
 bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
 {
        struct ath_common *common = ath9k_hw_common(ah);
-       int status = true, setChip = true;
+       int status = true;
        static const char *modes[] = {
                "AWAKE",
                "FULL-SLEEP",
@@ -2162,17 +2157,17 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
 
        switch (mode) {
        case ATH9K_PM_AWAKE:
-               status = ath9k_hw_set_power_awake(ah, setChip);
+               status = ath9k_hw_set_power_awake(ah);
                break;
        case ATH9K_PM_FULL_SLEEP:
                if (ath9k_hw_mci_is_enabled(ah))
                        ar9003_mci_set_full_sleep(ah);
 
-               ath9k_set_power_sleep(ah, setChip);
+               ath9k_set_power_sleep(ah);
                ah->chip_fullsleep = true;
                break;
        case ATH9K_PM_NETWORK_SLEEP:
-               ath9k_set_power_network_sleep(ah, setChip);
+               ath9k_set_power_network_sleep(ah);
                break;
        default:
                ath_err(common, "Unknown power mode %u\n", mode);