radeonsi: use DRAW_PREAMBLE on CIK
authorMarek Olšák <marek.olsak@amd.com>
Tue, 29 Apr 2014 23:03:40 +0000 (01:03 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Sat, 10 May 2014 11:58:46 +0000 (13:58 +0200)
It's the same as setting the 3 regs separately, but shorter, and it also
seems to be required on GFX7.2 and later. This doesn't fix Hawaii.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeonsi/si_state_draw.c
src/gallium/drivers/radeonsi/sid.h

index c7c94fc..09c08bc 100644 (file)
@@ -426,15 +426,18 @@ static bool si_update_draw_info_state(struct si_context *sctx,
                /* If the WD switch is false, the IA switch must be false too. */
                bool ia_switch_on_eop = wd_switch_on_eop;
 
-               si_pm4_set_reg(pm4, R_028AA8_IA_MULTI_VGT_PARAM,
+               si_pm4_set_reg(pm4, R_028B74_VGT_DISPATCH_DRAW_INDEX,
+                              ib->index_size == 4 ? 0xFC000000 : 0xFC00);
+
+               si_pm4_cmd_begin(pm4, PKT3_DRAW_PREAMBLE);
+               si_pm4_cmd_add(pm4, prim); /* VGT_PRIMITIVE_TYPE */
+               si_pm4_cmd_add(pm4, /* IA_MULTI_VGT_PARAM */
                               S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
                               S_028AA8_PARTIAL_VS_WAVE_ON(1) |
                               S_028AA8_PRIMGROUP_SIZE(63) |
                               S_028AA8_WD_SWITCH_ON_EOP(wd_switch_on_eop));
-               si_pm4_set_reg(pm4, R_028B74_VGT_DISPATCH_DRAW_INDEX,
-                              ib->index_size == 4 ? 0xFC000000 : 0xFC00);
-
-               si_pm4_set_reg(pm4, R_030908_VGT_PRIMITIVE_TYPE, prim);
+               si_pm4_cmd_add(pm4, 0); /* VGT_LS_HS_CONFIG */
+               si_pm4_cmd_end(pm4, false);
        } else {
                si_pm4_set_reg(pm4, R_008958_VGT_PRIMITIVE_TYPE, prim);
        }
index 2bd2cb4..558da10 100644 (file)
@@ -83,6 +83,8 @@
 #define PKT3_DRAW_INDEX_IMMD                   0x2E /* not on CIK */
 #define PKT3_NUM_INSTANCES                     0x2F
 #define PKT3_STRMOUT_BUFFER_UPDATE             0x34
+#define PKT3_DRAW_INDEX_OFFSET_2               0x35
+#define PKT3_DRAW_PREAMBLE                     0x36 /* new on CIK, required on GFX7.2 and later */
 #define PKT3_WRITE_DATA                        0x37
 #define     PKT3_WRITE_DATA_DST_SEL(x)             ((x) << 8)
 #define     PKT3_WRITE_DATA_DST_SEL_REG            0