#include <stdint.h>
//#include "radeon_track.h"
+#ifndef RADEON_DEBUG_BO
+#define RADEON_DEBUG_BO 1
+#endif
+
/* bo object */
#define RADEON_BO_FLAGS_MACRO_TILE 1
#define RADEON_BO_FLAGS_MICRO_TILE 2
/* bo functions */
struct radeon_bo_funcs {
+#ifdef RADEON_DEBUG_BO
+ struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom,
+ uint32_t handle,
+ uint32_t size,
+ uint32_t alignment,
+ uint32_t domains,
+ uint32_t flags,
+ char * szBufUsage);
+#else
struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom,
uint32_t handle,
uint32_t size,
uint32_t alignment,
uint32_t domains,
uint32_t flags);
+#endif /* RADEON_DEBUG_BO */
void (*bo_ref)(struct radeon_bo *bo);
struct radeon_bo *(*bo_unref)(struct radeon_bo *bo);
int (*bo_map)(struct radeon_bo *bo, int write);
uint32_t alignment,
uint32_t domains,
uint32_t flags,
+#ifdef RADEON_DEBUG_BO
+ char * szBufUsage,
+#endif /* RADEON_DEBUG_BO */
const char *file,
const char *func,
int line)
{
struct radeon_bo *bo;
+#ifdef RADEON_DEBUG_BO
+ bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags, szBufUsage);
+#else
bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags);
+#endif /* RADEON_DEBUG_BO */
+
#ifdef RADEON_BO_TRACK
if (bo) {
bo->track = radeon_tracker_add_track(&bom->tracker, bo->handle);
{
return bo->bom->funcs->bo_wait(bo);
}
-
+#ifdef RADEON_DEBUG_BO
+#define radeon_bo_open(bom, h, s, a, d, f, u)\
+ _radeon_bo_open(bom, h, s, a, d, f, u, __FILE__, __FUNCTION__, __LINE__)
+#else
#define radeon_bo_open(bom, h, s, a, d, f)\
_radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__)
+#endif /* RADEON_DEBUG_BO */
#define radeon_bo_ref(bo)\
_radeon_bo_ref(bo, __FILE__, __FUNCTION__, __LINE__)
#define radeon_bo_unref(bo)\
void *ptr;
struct bo_legacy *next, *prev;
struct bo_legacy *pnext, *pprev;
+#ifdef RADEON_DEBUG_BO
+ char szBufUsage[16];
+#endif /* RADEON_DEBUG_BO */
};
struct bo_manager_legacy {
uint32_t size,
uint32_t alignment,
uint32_t domains,
+#ifdef RADEON_DEBUG_BO
+ uint32_t flags,
+ char * szBufUsage)
+#else
uint32_t flags)
+#endif /* RADEON_DEBUG_BO */
{
struct bo_legacy *bo_legacy;
static int pgsize;
if (bo_legacy->next) {
bo_legacy->next->prev = bo_legacy;
}
+
+#ifdef RADEON_DEBUG_BO
+ sprintf(bo_legacy->szBufUsage, "%s", szBufUsage);
+#endif /* RADEON_DEBUG_BO */
+
return bo_legacy;
}
uint32_t size,
uint32_t alignment,
uint32_t domains,
+#ifdef RADEON_DEBUG_BO
+ uint32_t flags,
+ char * szBufUsage)
+#else
uint32_t flags)
+#endif /* RADEON_DEBUG_BO */
{
struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bom;
struct bo_legacy *bo_legacy;
}
return NULL;
}
-
+#ifdef RADEON_DEBUG_BO
+ bo_legacy = bo_allocate(boml, size, alignment, domains, flags, szBufUsage);
+#else
bo_legacy = bo_allocate(boml, size, alignment, domains, flags);
+#endif /* RADEON_DEBUG_BO */
bo_legacy->static_bo = 0;
r = legacy_new_handle(boml, &bo_legacy->base.handle);
if (r) {
bo_free(bo_legacy);
return NULL;
}
- if (bo_legacy->base.domains & RADEON_GEM_DOMAIN_GTT) {
- retry:
+ if (bo_legacy->base.domains & RADEON_GEM_DOMAIN_GTT)
+ {
+retry:
legacy_track_pending(boml, 0);
/* dma buffers */
r = bo_dma_alloc(&(bo_legacy->base));
- if (r) {
- if (legacy_wait_any_pending(boml) == -1) {
- bo_free(bo_legacy);
- return NULL;
- }
- goto retry;
- return NULL;
+ if (r)
+ {
+ if (legacy_wait_any_pending(boml) == -1)
+ {
+ bo_free(bo_legacy);
+ return NULL;
+ }
+ goto retry;
+ return NULL;
}
- } else {
+ }
+ else
+ {
bo_legacy->ptr = malloc(bo_legacy->base.size);
if (bo_legacy->ptr == NULL) {
bo_free(bo_legacy);
}
}
radeon_bo_ref(&(bo_legacy->base));
+
return (struct radeon_bo*)bo_legacy;
}
{
struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom;
struct bo_legacy *bo_legacy = (struct bo_legacy*)bo;
-
+
legacy_wait_pending(bo);
bo_legacy->validated = 0;
bo_legacy->dirty = 1;
volatile int *buf = (int*)boml->screen->driScreen->pFB;
p = *buf;
}
+
return 0;
}
{
struct bo_legacy *bo_legacy = (struct bo_legacy*)bo;
- if (--bo_legacy->map_count > 0) {
+ if (--bo_legacy->map_count > 0)
+ {
return 0;
}
+
bo->ptr = NULL;
+
return 0;
}
int retries = 0;
if (bo_legacy->map_count) {
+#ifdef RADEON_DEBUG_BO
+ fprintf(stderr, "bo(%p, %d, %s) is mapped (%d) can't valide it.\n",
+ bo, bo->size, bo_legacy->szBufUsage, bo_legacy->map_count);
+#else
fprintf(stderr, "bo(%p, %d) is mapped (%d) can't valide it.\n",
bo, bo->size, bo_legacy->map_count);
+#endif /* RADEON_DEBUG_BO */
+
return -EINVAL;
}
if (bo_legacy->static_bo || bo_legacy->validated) {
*soffset = bo_legacy->offset;
*eoffset = bo_legacy->offset + bo->size;
+
return 0;
}
if (!(bo->domains & RADEON_GEM_DOMAIN_GTT)) {
*soffset = bo_legacy->offset;
*eoffset = bo_legacy->offset + bo->size;
bo_legacy->validated = 1;
+
return 0;
}
}
static struct bo_legacy *radeon_legacy_bo_alloc_static(struct bo_manager_legacy *bom,
- int size, uint32_t offset)
+ int size,
+#ifdef RADEON_DEBUG_BO
+ uint32_t offset,
+ char * szBufUsage)
+#else
+ uint32_t offset)
+#endif /* RADEON_DEBUG_BO */
{
struct bo_legacy *bo;
+#ifdef RADEON_DEBUG_BO
+ bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0, szBufUsage);
+#else
bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0);
+#endif /* RADEON_DEBUG_BO */
if (bo == NULL)
return NULL;
bo->static_bo = 1;
size = 4096*4096*4;
/* allocate front */
+#ifdef RADEON_DEBUG_BO
+ bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->frontOffset, "FRONT BUF");
+#else
bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->frontOffset);
+#endif /* RADEON_DEBUG_BO */
if (!bo) {
radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
return NULL;
}
/* allocate back */
+#ifdef RADEON_DEBUG_BO
+ bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->backOffset, "BACK BUF");
+#else
bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->backOffset);
+#endif /* RADEON_DEBUG_BO */
if (!bo) {
radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
return NULL;
}
/* allocate depth */
+#ifdef RADEON_DEBUG_BO
+ bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->depthOffset, "Z BUF");
+#else
bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->depthOffset);
+#endif /* RADEON_DEBUG_BO */
if (!bo) {
radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
return NULL;
#include "radeon_dma.h"
#include "radeon_texture.h"
+#ifndef RADEON_DEBUG_BO
+#define RADEON_DEBUG_BO 1
+#endif
#define TRI_CLEAR_COLOR_BITS (BUFFER_BIT_BACK_LEFT | \
BUFFER_BIT_FRONT_LEFT | \
}
assert(radeon);
- if (radeon) {
+ if (radeon)
+ {
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R600) /* +r6/r7 */
if (IS_R600_CLASS(screen))
if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->frontOffset,
+ 0,
+ 0,
+ RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Front Buf");
+#else
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->frontOffset,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp;
}
if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->backOffset,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Back Buf");
+#else
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->backOffset,
+ 0,
+ 0,
+ RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->backPitch * rb->cpp;
}
if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->depthOffset,
+ 0,
+ 0,
+ RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Z Buf");
+#else
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->depthOffset,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
}
if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->depthOffset,
+ 0,
+ 0,
+ RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Stencil Buf");
+#else
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->depthOffset,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->frontOffset +
+ radeon->radeonScreen->fbLocation,
+ size,
+ 4096,
+ RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Front Buf");
+#else
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->frontOffset +
radeon->radeonScreen->fbLocation,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp;
}
if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->backOffset +
+ radeon->radeonScreen->fbLocation,
+ size,
+ 4096,
+ RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Back Buf");
+#else
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->backOffset +
radeon->radeonScreen->fbLocation,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->backPitch * rb->cpp;
}
if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->depthOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Z Buf");
+#else
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->depthOffset +
+ radeon->radeonScreen->fbLocation,
+ size,
+ 4096,
+ RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
}
if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) {
if (!rb->bo) {
+#ifdef RADEON_DEBUG_BO
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->depthOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Stencil Buf");
+#else
+ rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ radeon->radeonScreen->depthOffset +
+ radeon->radeonScreen->fbLocation,
+ size,
+ 4096,
+ RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
bo = depth_bo;
radeon_bo_ref(bo);
} else {
+#ifdef RADEON_DEBUG_BO
+ bo = radeon_bo_open(radeon->radeonScreen->bom,
+ buffers[i].name,
+ 0,
+ 0,
+ RADEON_GEM_DOMAIN_VRAM,
+ buffers[i].flags,
+ regname);
+#else
bo = radeon_bo_open(radeon->radeonScreen->bom,
buffers[i].name,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
buffers[i].flags);
+#endif /* RADEON_DEBUG_BO */
if (bo == NULL) {
fprintf(stderr, "failed to attach %s %d\n",
radeon_make_renderbuffer_current(radeon, drfb);
}
-
if (RADEON_DEBUG & DEBUG_DRI)
fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb);
if (RADEON_DEBUG & DEBUG_DRI)
fprintf(stderr, "End %s\n", __FUNCTION__);
+
return GL_TRUE;
}
#define RADEON_DEBUG 0
#endif
+#ifndef RADEON_DEBUG_BO
+#define RADEON_DEBUG_BO 1
+#endif
+
#endif
rmesa->dma.current = 0;
}
-again_alloc:
+again_alloc:
+#ifdef RADEON_DEBUG_BO
+ rmesa->dma.current = radeon_bo_open(rmesa->radeonScreen->bom,
+ 0, size, 4, RADEON_GEM_DOMAIN_GTT,
+ 0, "dma.current");
+#else
rmesa->dma.current = radeon_bo_open(rmesa->radeonScreen->bom,
0, size, 4, RADEON_GEM_DOMAIN_GTT,
0);
+#endif /* RADEON_DEBUG_BO */
if (!rmesa->dma.current) {
rcommonFlushCmdBuf(rmesa, __FUNCTION__);
rrb->pitch = pitch * cpp;
rrb->cpp = cpp;
+#ifdef RADEON_DEBUG_BO
+ rrb->bo = radeon_bo_open(radeon->radeonScreen->bom,
+ 0,
+ size,
+ 0,
+ RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "Radeon RBO");
+#else
rrb->bo = radeon_bo_open(radeon->radeonScreen->bom,
0,
size,
0,
RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
rb->Width = width;
rb->Height = height;
return GL_TRUE;
calculate_miptree_layout(mt);
+#ifdef RADEON_DEBUG_BO
+ mt->bo = radeon_bo_open(rmesa->radeonScreen->bom,
+ 0, mt->totalsize, 1024,
+ RADEON_GEM_DOMAIN_VRAM,
+ 0,
+ "MIPMAP TREE");
+#else
mt->bo = radeon_bo_open(rmesa->radeonScreen->bom,
0, mt->totalsize, 1024,
RADEON_GEM_DOMAIN_VRAM,
0);
+#endif /* RADEON_DEBUG_BO */
return mt;
}
#include "r300_tex.h"
#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R600)
#include "r600_context.h"
-//#include "r700_driconf.h" /* +r6/r7 */
+#include "r700_driconf.h" /* +r6/r7 */
#include "r700_tex.h" /* +r6/r7 */
#endif
screen->AGPMode = dri_priv->AGPMode;
ret = radeonGetParam(sPriv, RADEON_PARAM_FB_LOCATION, &temp);
-
+
/* +r6/r7 */
if(screen->chip_family >= CHIP_FAMILY_R600)
{
if (t->mt == image->mt) {
if (RADEON_DEBUG & DEBUG_TEXTURE)
fprintf(stderr, "OK\n");
+
continue;
}