arm64: dts: rockchip: fix gmac support for NanoPi R5S
authorTianling Shen <cnsztl@gmail.com>
Sat, 18 Mar 2023 08:37:44 +0000 (16:37 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 22 Mar 2023 23:17:03 +0000 (00:17 +0100)
- Changed phy-mode to rgmii.

- Fixed pull type in pinctrl for gmac0.

- Removed duplicate properties in mdio node.
  These properties are defined in the gmac0 node already.

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20230318083745.6181-5-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts

index e9adf5e665290ed9c6c37bbace0e2eac758d52f1..2a1118f15c2913f32d96046918f2735625e546fc 100644 (file)
@@ -57,7 +57,7 @@
        assigned-clock-rates = <0>, <125000000>;
        clock_in_out = "output";
        phy-handle = <&rgmii_phy0>;
-       phy-mode = "rgmii-id";
+       phy-mode = "rgmii";
        pinctrl-names = "default";
        pinctrl-0 = <&gmac0_miim
                     &gmac0_tx_bus2
@@ -79,9 +79,6 @@
                reg = <1>;
                pinctrl-0 = <&eth_phy0_reset_pin>;
                pinctrl-names = "default";
-               reset-assert-us = <10000>;
-               reset-deassert-us = <50000>;
-               reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
        };
 };
 
 &pinctrl {
        gmac0 {
                eth_phy0_reset_pin: eth-phy0-reset-pin {
-                       rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
+                       rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
                };
        };