[AMDGPU] Stop using getMinimalPhysRegClass in LowerFormalArguments
authorJay Foad <jay.foad@amd.com>
Thu, 17 Mar 2022 12:55:33 +0000 (12:55 +0000)
committerJay Foad <jay.foad@amd.com>
Thu, 17 Mar 2022 15:19:17 +0000 (15:19 +0000)
NFCI. The motivation for this is avoid problems in future if we add new
classes containing only a subset of all VGPRs, or a subset of all SGPRs.
getMinimalPhysRegClass would favour these smaller classes, which is not
what we want here.

Differential Revision: https://reviews.llvm.org/D121914

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

index 6601c12488f083bd75b41449494ac56b95537e25..c9bcb72bb4b004f7dc192832fc19905af20c80c7 100644 (file)
@@ -2548,7 +2548,13 @@ SDValue SITargetLowering::LowerFormalArguments(
     assert(VA.isRegLoc() && "Parameter must be in a register!");
 
     Register Reg = VA.getLocReg();
-    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
+    const TargetRegisterClass *RC = nullptr;
+    if (AMDGPU::VGPR_32RegClass.contains(Reg))
+      RC = &AMDGPU::VGPR_32RegClass;
+    else if (AMDGPU::SGPR_32RegClass.contains(Reg))
+      RC = &AMDGPU::SGPR_32RegClass;
+    else
+      llvm_unreachable("Unexpected register class in LowerFormalArguments!");
     EVT ValVT = VA.getValVT();
 
     Reg = MF.addLiveIn(Reg, RC);