ARM: dts: ast2600-evb: eMMC configuration

Enable the eMMC controller and limit it to 52MHz to avoid the host
controller reporting bus error conditions.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index 9870553..9443d3e 100644 (file)
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -71,10 +71,16 @@
        phy-handle = <&ethphy3>;
 };
 
-&emmc {
+&emmc_controller {
        status = "okay";
 };
 
+&emmc {
+       non-removable;
+       bus-width = <4>;
+       max-frequency = <52000000>;
+};
+
 &rtc {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 3a1422f..7ca45b0 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -235,7 +235,7 @@
                                };
                        };
 
-                       emmc: sdc@1e750000 {
+                       emmc_controller: sdc@1e750000 {
                                compatible = "aspeed,ast2600-sd-controller";
                                reg = <0x1e750000 0x100>;
                                #address-cells = <1>;
@@ -244,7 +244,7 @@
                                clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
                                status = "disabled";
 
-                               sdhci@1e750100 {
+                               emmc: sdhci@1e750100 {
                                        compatible = "aspeed,ast2600-sdhci";
                                        reg = <0x100 0x100>;
                                        sdhci,auto-cmd12;