#include <linux/slab.h>
#include <linux/vexpress.h>
-#define SYS_CFGDATA 0x0
+#define SYS_MISC 0x0
+#define SYS_MISC_MASTERSITE (1 << 14)
-#define SYS_CFGCTRL 0x4
+#define SYS_PROCID0 0x24
+#define SYS_PROCID1 0x28
+#define SYS_HBI_MASK 0xfff
+#define SYS_PROCIDx_HBI_SHIFT 0
+
+#define SYS_CFGDATA 0x40
+
+#define SYS_CFGCTRL 0x44
#define SYS_CFGCTRL_START (1 << 31)
#define SYS_CFGCTRL_WRITE (1 << 30)
#define SYS_CFGCTRL_DCC(n) (((n) & 0xf) << 26)
#define SYS_CFGCTRL_POSITION(n) (((n) & 0xf) << 12)
#define SYS_CFGCTRL_DEVICE(n) (((n) & 0xfff) << 0)
-#define SYS_CFGSTAT 0x8
+#define SYS_CFGSTAT 0x48
#define SYS_CFGSTAT_ERR (1 << 1)
#define SYS_CFGSTAT_COMPLETE (1 << 0)
+#define VEXPRESS_SITE_MB 0
+#define VEXPRESS_SITE_DB1 1
+#define VEXPRESS_SITE_DB2 2
+#define VEXPRESS_SITE_MASTER 0xf
struct vexpress_syscfg {
struct device *dev;
static u32 vexpress_config_site_master = VEXPRESS_SITE_MASTER;
-void vexpress_config_set_master(u32 site)
+static void vexpress_config_set_master(u32 site)
{
vexpress_config_site_master = site;
}
struct resource *res;
struct vexpress_config_bridge *bridge;
struct device_node *node;
+ int master;
+ u32 dt_hbi;
syscfg = devm_kzalloc(&pdev->dev, sizeof(*syscfg), GFP_KERNEL);
if (!syscfg)
dev_set_drvdata(&pdev->dev, bridge);
+ master = readl(syscfg->base + SYS_MISC) & SYS_MISC_MASTERSITE ?
+ VEXPRESS_SITE_DB2 : VEXPRESS_SITE_DB1;
+ vexpress_config_set_master(master);
+
+ /* Confirm board type against DT property, if available */
+ if (of_property_read_u32(of_root, "arm,hbi", &dt_hbi) == 0) {
+ u32 id = readl(syscfg->base + (master == VEXPRESS_SITE_DB1 ?
+ SYS_PROCID0 : SYS_PROCID1));
+ u32 hbi = (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK;
+
+ if (WARN_ON(dt_hbi != hbi))
+ dev_warn(&pdev->dev, "DT HBI (%x) is not matching hardware (%x)!\n",
+ dt_hbi, hbi);
+ }
+
for_each_compatible_node(node, NULL, "arm,vexpress,config-bus") {
struct device_node *bridge_np;
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/stat.h>
-#include <linux/vexpress.h>
#define SYS_ID 0x000
#define SYS_SW 0x004
#define SYS_CFGCTRL 0x0a4
#define SYS_CFGSTAT 0x0a8
-#define SYS_HBI_MASK 0xfff
-#define SYS_PROCIDx_HBI_SHIFT 0
-
-#define SYS_MISC_MASTERSITE (1 << 14)
-
/* The sysreg block is just a random collection of various functions... */
static struct bgpio_pdata vexpress_sysreg_sys_led_pdata = {
.name = "vexpress-syscfg",
.num_resources = 1,
.resources = (struct resource []) {
- DEFINE_RES_MEM(SYS_CFGDATA, 0xc),
+ DEFINE_RES_MEM(SYS_MISC, 0x4c),
},
}
};
struct resource *mem;
void __iomem *base;
struct gpio_chip *mmc_gpio_chip;
- int master;
- u32 dt_hbi;
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem)
if (!base)
return -ENOMEM;
- master = readl(base + SYS_MISC) & SYS_MISC_MASTERSITE ?
- VEXPRESS_SITE_DB2 : VEXPRESS_SITE_DB1;
- vexpress_config_set_master(master);
-
- /* Confirm board type against DT property, if available */
- if (of_property_read_u32(of_root, "arm,hbi", &dt_hbi) == 0) {
- u32 id = readl(base + (master == VEXPRESS_SITE_DB1 ?
- SYS_PROCID0 : SYS_PROCID1));
- u32 hbi = (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK;
-
- if (WARN_ON(dt_hbi != hbi))
- dev_warn(&pdev->dev, "DT HBI (%x) is not matching hardware (%x)!\n",
- dt_hbi, hbi);
- }
-
/*
* Duplicated SYS_MCI pseudo-GPIO controller for compatibility with
* older trees using sysreg node for MMC control lines.
#include <linux/device.h>
#include <linux/regmap.h>
-#define VEXPRESS_SITE_MB 0
-#define VEXPRESS_SITE_DB1 1
-#define VEXPRESS_SITE_DB2 2
-#define VEXPRESS_SITE_MASTER 0xf
-
-/* Config infrastructure */
-
-void vexpress_config_set_master(u32 site);
-
/* Config regmap API */
struct regmap *devm_regmap_init_vexpress_config(struct device *dev);