i965/vec4/gen6: fix exec_size for instructions with width of 4 in generate_gs_svb_write()
authorSamuel Iglesias Gonsalvez <siglesias@igalia.com>
Thu, 3 Dec 2015 17:27:39 +0000 (18:27 +0100)
committerSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Thu, 17 Mar 2016 07:23:25 +0000 (08:23 +0100)
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp

index 549b707..871b49a 100644 (file)
@@ -485,10 +485,13 @@ generate_gs_svb_write(struct brw_codegen *p,
    bool final_write = inst->sol_final_write;
 
    brw_push_insn_state(p);
+   brw_set_default_exec_size(p, BRW_EXECUTE_4);
    /* Copy Vertex data into M0.x */
    brw_MOV(p, stride(dst, 4, 4, 1),
            stride(retype(src0, BRW_REGISTER_TYPE_UD), 4, 4, 1));
+   brw_pop_insn_state(p);
 
+   brw_push_insn_state(p);
    /* Send SVB Write */
    brw_svb_write(p,
                  final_write ? src1 : brw_null_reg(), /* dest == src1 */