net/mlx5: Use RMW accessors for changing LNKCTL
authorIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Mon, 17 Jul 2023 12:04:59 +0000 (15:04 +0300)
committerBjorn Helgaas <bhelgaas@google.com>
Mon, 21 Aug 2023 19:11:51 +0000 (14:11 -0500)
Don't assume that only the driver would be accessing LNKCTL of the upstream
bridge. ASPM policy changes can trigger write to LNKCTL outside of driver's
control.

Use RMW capability accessors which do proper locking to avoid losing
concurrent updates to the register value.

Suggested-by: Lukas Wunner <lukas@wunner.de>
Fixes: eabe8e5e88f5 ("net/mlx5: Handle sync reset now event")
Link: https://lore.kernel.org/r/20230717120503.15276-8-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c

index 4804990..99dcbd0 100644 (file)
@@ -384,16 +384,11 @@ static int mlx5_pci_link_toggle(struct mlx5_core_dev *dev)
                pci_cfg_access_lock(sdev);
        }
        /* PCI link toggle */
-       err = pci_read_config_word(bridge, cap + PCI_EXP_LNKCTL, &reg16);
-       if (err)
-               return err;
-       reg16 |= PCI_EXP_LNKCTL_LD;
-       err = pci_write_config_word(bridge, cap + PCI_EXP_LNKCTL, reg16);
+       err = pcie_capability_set_word(bridge, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_LD);
        if (err)
                return err;
        msleep(500);
-       reg16 &= ~PCI_EXP_LNKCTL_LD;
-       err = pci_write_config_word(bridge, cap + PCI_EXP_LNKCTL, reg16);
+       err = pcie_capability_clear_word(bridge, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_LD);
        if (err)
                return err;