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arm64: dts: qcom: sc8180x: fix USB SS wakeup
authorJohan Hovold <johan+linaro@kernel.org>
Thu, 14 Dec 2023 07:43:19 +0000 (08:43 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 1 Feb 2024 00:18:54 +0000 (16:18 -0800)
commit 0afa885d42d05d30161ab8eab1ebacd993edb82b upstream.

The USB SS PHY interrupt needs to be provided by the PDC interrupt
controller in order to be able to wake the system up from low-power
states.

Fixes: b080f53a8f44 ("arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes")
Cc: stable@vger.kernel.org # 6.5
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231214074319.11023-4-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/boot/dts/qcom/sc8180x.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 1fcbc33..f9e929b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2561,7 +2561,7 @@
                        compatible = "qcom,sc8180x-dwc3", "qcom,dwc3";
                        reg = <0 0x0a6f8800 0 0x400>;
                        interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&intc GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
                                              <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
                        interrupt-names = "hs_phy_irq",
@@ -2635,7 +2635,7 @@
                        resets = <&gcc GCC_USB30_SEC_BCR>;
                        power-domains = <&gcc USB30_SEC_GDSC>;
                        interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&intc GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 7 IRQ_TYPE_LEVEL_HIGH>,
                                              <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 11 IRQ_TYPE_EDGE_BOTH>;
                        interrupt-names = "hs_phy_irq", "ss_phy_irq",
Domain: System / Kernel;