const struct pipe_blend_state *state, int mode)
{
uint32_t color_control = 0, target_mask = 0;
+ uint32_t alpha_to_mask = 0;
struct r600_blend_state *blend = CALLOC_STRUCT(r600_blend_state);
if (!blend) {
else
color_control |= S_028808_MODE(V_028808_CB_DISABLE);
-
r600_store_context_reg(&blend->buffer, R_028808_CB_COLOR_CONTROL, color_control);
- r600_store_context_reg(&blend->buffer, R_028B70_DB_ALPHA_TO_MASK,
- S_028B70_ALPHA_TO_MASK_ENABLE(state->alpha_to_coverage) |
- S_028B70_ALPHA_TO_MASK_OFFSET0(2) |
- S_028B70_ALPHA_TO_MASK_OFFSET1(2) |
- S_028B70_ALPHA_TO_MASK_OFFSET2(2) |
- S_028B70_ALPHA_TO_MASK_OFFSET3(2));
+
+ if (state->alpha_to_coverage) {
+ if (state->alpha_to_coverage_dither) {
+ alpha_to_mask = S_028B70_ALPHA_TO_MASK_ENABLE(1) |
+ S_028B70_ALPHA_TO_MASK_OFFSET0(3) |
+ S_028B70_ALPHA_TO_MASK_OFFSET1(1) |
+ S_028B70_ALPHA_TO_MASK_OFFSET2(0) |
+ S_028B70_ALPHA_TO_MASK_OFFSET3(2) |
+ S_028B70_OFFSET_ROUND(1);
+ } else {
+ alpha_to_mask = S_028B70_ALPHA_TO_MASK_ENABLE(1) |
+ S_028B70_ALPHA_TO_MASK_OFFSET0(2) |
+ S_028B70_ALPHA_TO_MASK_OFFSET1(2) |
+ S_028B70_ALPHA_TO_MASK_OFFSET2(2) |
+ S_028B70_ALPHA_TO_MASK_OFFSET3(2) |
+ S_028B70_OFFSET_ROUND(0);
+ }
+ }
+ r600_store_context_reg(&blend->buffer, R_028B70_DB_ALPHA_TO_MASK, alpha_to_mask);
+
r600_store_context_reg_seq(&blend->buffer, R_028780_CB_BLEND0_CONTROL, 8);
/* Copy over the dwords set so far into buffer_no_blend.
case PIPE_CAP_SHADER_ARRAY_COMPONENTS:
case PIPE_CAP_QUERY_BUFFER_OBJECT:
case PIPE_CAP_IMAGE_STORE_FORMATTED:
+ case PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL:
return family >= CHIP_CEDAR ? 1 : 0;
case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
return family >= CHIP_CEDAR ? 4 : 0;