ARM: dts: Augment VGA connector bridge on PB1176
authorLinus Walleij <linus.walleij@linaro.org>
Tue, 23 Jan 2018 12:32:09 +0000 (13:32 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 20 Mar 2018 01:01:57 +0000 (02:01 +0100)
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.

Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/arm-realview-pb1176.dts

index c789564..f935b72 100644 (file)
                port1-otg;
        };
 
+       bridge {
+               compatible = "ti,ths8134a", "ti,ths8134";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               vga_bridge_in: endpoint {
+                                       remote-endpoint = <&clcd_pads>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               vga_bridge_out: endpoint {
+                                       remote-endpoint = <&vga_con_in>;
+                               };
+                       };
+               };
+       };
+
+       vga {
+               compatible = "vga-connector";
+
+               port {
+                       vga_con_in: endpoint {
+                               remote-endpoint = <&vga_bridge_out>;
+                       };
+               };
+       };
+
        soc {
                #address-cells = <1>;
                #size-cells = <1>;
                        interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&oscclk0>, <&pclk>;
                        clock-names = "clcdclk", "apb_pclk";
+                       /* 1024x768 16bpp @65MHz works fine */
+                       max-memory-bandwidth = <95000000>;
 
                        port {
                                clcd_pads: endpoint {
-                                       remote-endpoint = <&clcd_panel>;
+                                       remote-endpoint = <&vga_bridge_in>;
                                        arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
                                };
                        };
-
-                       panel {
-                               compatible = "panel-dpi";
-
-                               port {
-                                       clcd_panel: endpoint {
-                                               remote-endpoint = <&clcd_pads>;
-                                       };
-                               };
-
-                               /* Standard 640x480 VGA timings */
-                               panel-timing {
-                                       clock-frequency = <25175000>;
-                                       hactive = <640>;
-                                       hback-porch = <48>;
-                                       hfront-porch = <16>;
-                                       hsync-len = <96>;
-                                       vactive = <480>;
-                                       vback-porch = <33>;
-                                       vfront-porch = <10>;
-                                       vsync-len = <2>;
-                               };
-                       };
                };
        };
 
                        clocks = <&pclk>;
                        clock-names = "apb_pclk";
                };
-
-
        };
 };