drm/i915/dg2: Enable Wa_22012727170/Wa_22012727685
authorJohn Harrison <John.C.Harrison@Intel.com>
Fri, 15 Apr 2022 22:40:25 +0000 (15:40 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Tue, 19 Apr 2022 18:33:48 +0000 (11:33 -0700)
The above two workaronuds regarding context isolation are implemented
by GuC. The KMD just needs to enable them.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220415224025.3693037-7-umesh.nerlige.ramappa@intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc.c
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

index 228070e..2c4ad4a 100644 (file)
@@ -319,6 +319,14 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
            IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))
                flags |= GUC_WA_RCS_RESET_BEFORE_RC6;
 
+       /*
+        * Wa_22012727170:dg2_g10[a0-c0), dg2_g11[a0..)
+        * Wa_22012727685:dg2_g11[a0..)
+        */
+       if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
+           IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_FOREVER))
+               flags |= GUC_WA_CONTEXT_ISOLATION;
+
        return flags;
 }
 
index e389a3a..42cb7a9 100644 (file)
 #define   GUC_WA_GAM_CREDITS           BIT(10)
 #define   GUC_WA_DUAL_QUEUE            BIT(11)
 #define   GUC_WA_RCS_RESET_BEFORE_RC6  BIT(13)
+#define   GUC_WA_CONTEXT_ISOLATION     BIT(15)
 #define   GUC_WA_PRE_PARSER            BIT(14)
 #define   GUC_WA_HOLD_CCS_SWITCHOUT    BIT(17)
 #define   GUC_WA_POLLCS                        BIT(18)