define void @masked_scatter_nxv4i16_sext(<vscale x 4 x i16> %data, i16* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i16_sext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x0, z1.d, sxtw #1]
-; CHECK-NEXT: st1h { z0.d }, p0, [x0, z2.d, sxtw #1]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw #1]
; CHECK-NEXT: ret
%ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr i16, i16* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4i32_sext(<vscale x 4 x i32> %data, i32* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i32_sext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x0, z1.d, sxtw #2]
-; CHECK-NEXT: st1w { z0.d }, p0, [x0, z2.d, sxtw #2]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw #2]
; CHECK-NEXT: ret
%ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr i32, i32* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4f16_sext(<vscale x 4 x half> %data, half* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4f16_sext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x0, z1.d, sxtw #1]
-; CHECK-NEXT: st1h { z0.d }, p0, [x0, z2.d, sxtw #1]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw #1]
; CHECK-NEXT: ret
%ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr half, half* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4bf16_sext(<vscale x 4 x bfloat> %data, bfloat* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4bf16_sext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x0, z1.d, sxtw #1]
-; CHECK-NEXT: st1h { z0.d }, p0, [x0, z2.d, sxtw #1]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw #1]
; CHECK-NEXT: ret
%ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr bfloat, bfloat* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4f32_sext(<vscale x 4 x float> %data, float* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4f32_sext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x0, z1.d, sxtw #2]
-; CHECK-NEXT: st1w { z0.d }, p0, [x0, z2.d, sxtw #2]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw #2]
; CHECK-NEXT: ret
%ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr float, float* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4i16_zext(<vscale x 4 x i16> %data, i16* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i16_zext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x0, z1.d, uxtw #1]
-; CHECK-NEXT: st1h { z0.d }, p0, [x0, z2.d, uxtw #1]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw #1]
; CHECK-NEXT: ret
%ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr i16, i16* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4i32_zext(<vscale x 4 x i32> %data, i32* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i32_zext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x0, z1.d, uxtw #2]
-; CHECK-NEXT: st1w { z0.d }, p0, [x0, z2.d, uxtw #2]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw #2]
; CHECK-NEXT: ret
%ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr i32, i32* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4f16_zext(<vscale x 4 x half> %data, half* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4f16_zext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x0, z1.d, uxtw #1]
-; CHECK-NEXT: st1h { z0.d }, p0, [x0, z2.d, uxtw #1]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw #1]
; CHECK-NEXT: ret
%ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr half, half* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4bf16_zext(<vscale x 4 x bfloat> %data, bfloat* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4bf16_zext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x0, z1.d, uxtw #1]
-; CHECK-NEXT: st1h { z0.d }, p0, [x0, z2.d, uxtw #1]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw #1]
; CHECK-NEXT: ret
%ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr bfloat, bfloat* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv4f32_zext(<vscale x 4 x float> %data, float* %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4f32_zext:
; CHECK: // %bb.0:
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: uunpkhi z2.d, z1.s
-; CHECK-NEXT: uunpklo z1.d, z1.s
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x0, z1.d, uxtw #2]
-; CHECK-NEXT: st1w { z0.d }, p0, [x0, z2.d, uxtw #2]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw #2]
; CHECK-NEXT: ret
%ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
%ptrs = getelementptr float, float* %base, <vscale x 4 x i64> %ext
define void @masked_scatter_nxv2i8_sext_offsets(<vscale x 2 x i8> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i8_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1b { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2i16_sext_offsets(<vscale x 2 x i16> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i16_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2i32_sext_offsets(<vscale x 2 x i32> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i32_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2i64_sext_offsets(<vscale x 2 x i64> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i64_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2f16_sext_offsets(<vscale x 2 x half> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2f16_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2bf16_sext_offsets(<vscale x 2 x bfloat> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv2bf16_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2f32_sext_offsets(<vscale x 2 x float> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2f32_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2f64_sext_offsets(<vscale x 2 x double> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2f64_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p1.d
-; CHECK-NEXT: sxtw z1.d, p1/m, z1.d
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2i8_zext_offsets(<vscale x 2 x i8> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i8_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1b { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2i16_zext_offsets(<vscale x 2 x i16> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i16_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2i32_zext_offsets(<vscale x 2 x i32> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i32_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2i64_zext_offsets(<vscale x 2 x i64> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2i64_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2f16_zext_offsets(<vscale x 2 x half> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2f16_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2bf16_zext_offsets(<vscale x 2 x bfloat> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv2bf16_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2f32_zext_offsets(<vscale x 2 x float> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2f32_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv2f64_zext_offsets(<vscale x 2 x double> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv2f64_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: and z1.d, z1.d, #0xffffffff
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets
define void @masked_scatter_nxv4i8_sext_offsets(<vscale x 4 x i8> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i8_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: sunpklo z3.d, z1.s
-; CHECK-NEXT: sunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1b { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1b { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1b { z0.s }, p0, [x0, z1.s, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4i16_sext_offsets(<vscale x 4 x i16> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i16_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: sunpklo z3.d, z1.s
-; CHECK-NEXT: sunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4i32_sext_offsets(<vscale x 4 x i32> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i32_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: sunpklo z3.d, z1.s
-; CHECK-NEXT: sunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4f16_sext_offsets(<vscale x 4 x half> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4f16_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: sunpklo z3.d, z1.s
-; CHECK-NEXT: sunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4bf16_sext_offsets(<vscale x 4 x bfloat> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4bf16_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: sunpklo z3.d, z1.s
-; CHECK-NEXT: sunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4f32_sext_offsets(<vscale x 4 x float> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4f32_sext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: sunpklo z3.d, z1.s
-; CHECK-NEXT: sunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw]
; CHECK-NEXT: ret
%offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4i8_zext_offsets(<vscale x 4 x i8> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i8_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: uunpklo z3.d, z1.s
-; CHECK-NEXT: uunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1b { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1b { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1b { z0.s }, p0, [x0, z1.s, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4i16_zext_offsets(<vscale x 4 x i16> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i16_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: uunpklo z3.d, z1.s
-; CHECK-NEXT: uunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4i32_zext_offsets(<vscale x 4 x i32> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4i32_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: uunpklo z3.d, z1.s
-; CHECK-NEXT: uunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4f16_zext_offsets(<vscale x 4 x half> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {
; CHECK-LABEL: masked_scatter_nxv4f16_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: uunpklo z3.d, z1.s
-; CHECK-NEXT: uunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4bf16_zext_offsets(<vscale x 4 x bfloat> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4bf16_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: uunpklo z3.d, z1.s
-; CHECK-NEXT: uunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1h { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets
define void @masked_scatter_nxv4f32_zext_offsets(<vscale x 4 x float> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {
; CHECK-LABEL: masked_scatter_nxv4f32_zext_offsets:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, x0
-; CHECK-NEXT: uunpklo z3.d, z1.s
-; CHECK-NEXT: uunpkhi z1.d, z1.s
-; CHECK-NEXT: pfalse p1.b
-; CHECK-NEXT: mov x8, xzr
-; CHECK-NEXT: add z1.d, z2.d, z1.d
-; CHECK-NEXT: add z2.d, z2.d, z3.d
-; CHECK-NEXT: uunpklo z3.d, z0.s
-; CHECK-NEXT: uunpkhi z0.d, z0.s
-; CHECK-NEXT: zip1 p2.s, p0.s, p1.s
-; CHECK-NEXT: zip2 p0.s, p0.s, p1.s
-; CHECK-NEXT: st1w { z3.d }, p2, [x8, z2.d]
-; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
+; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw]
; CHECK-NEXT: ret
%offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>
%byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets