cris: Add interrupt signals to the CPU device
authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Tue, 21 Jan 2014 12:44:23 +0000 (22:44 +1000)
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Mon, 3 Feb 2014 14:03:59 +0000 (14:03 +0000)
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
target-cris/cpu.c
target-cris/cpu.h

index acb5688e5efa39a81c15e7c5a33975a213cf6779..1ac8124d8cc99443bf2f65b12be6e2f3bb66eea9 100644 (file)
@@ -152,6 +152,21 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
     ccc->parent_realize(dev, errp);
 }
 
+#ifndef CONFIG_USER_ONLY
+static void cris_cpu_set_irq(void *opaque, int irq, int level)
+{
+    CRISCPU *cpu = opaque;
+    CPUState *cs = CPU(cpu);
+    int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
+
+    if (level) {
+        cpu_interrupt(cs, type);
+    } else {
+        cpu_reset_interrupt(cs, type);
+    }
+}
+#endif
+
 static void cris_cpu_initfn(Object *obj)
 {
     CPUState *cs = CPU(obj);
@@ -165,6 +180,11 @@ static void cris_cpu_initfn(Object *obj)
 
     env->pregs[PR_VR] = ccc->vr;
 
+#ifndef CONFIG_USER_ONLY
+    /* IRQ and NMI lines.  */
+    qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
+#endif
+
     if (tcg_enabled() && !tcg_initialized) {
         tcg_initialized = true;
         if (env->pregs[PR_VR] < 32) {
index 4b9fc4cb45cd6198135acb433ccd99ddc3e7724a..1d7d80d3dcbd5fc3d07715371227e2a2816e239b 100644 (file)
 /* CRIS-specific interrupt pending bits.  */
 #define CPU_INTERRUPT_NMI       CPU_INTERRUPT_TGT_EXT_3
 
+/* CRUS CPU device objects interrupt lines.  */
+#define CRIS_CPU_IRQ 0
+#define CRIS_CPU_NMI 1
+
 /* Register aliases. R0 - R15 */
 #define R_FP  8
 #define R_SP  14