LOCAL / arm64: dts: exynos5433-tm2-common: add the extra pcie property
authorJaehoon Chung <jh80.chung@samsung.com>
Wed, 4 Apr 2018 02:22:42 +0000 (11:22 +0900)
committerJunghoon Kim <jhoon20.kim@samsung.com>
Thu, 14 Feb 2019 05:56:53 +0000 (14:56 +0900)
Add the specific property of tm2.
Remove the duplicated initiailzation gpio pins.

Change-Id: I2416ef7cb6d3e43c6dbe9377d89dbeec0fa7c564
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi

index b112cdd..3369089 100644 (file)
        bus-width = <4>;
 };
 
+&pcie {
+       status = "okay";
+       assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
+                       <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
+       assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
+                       <&cmu_top CLK_MOUT_BUS_PLL_USER>;
+       assigned-clock-rates = <0>, <100000000>;
+       #interrupt-cells = <1>;
+       interrupt-map-mask = <0 0 0 0>;
+       interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
+};
+
 &ppmu_d0_general {
        status = "okay";
        events {
        pinctrl-0 = <&initial_ese>;
 
        initial_ese: initial-state {
-               PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
                PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
                PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
        };
                PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
                PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
                PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
-               PIN(INPUT, gpr3-7, NONE, FAST_SR1);
        };
 };