spi: altera: add 32bit data width transfer support.
authorXu Yilun <yilun.xu@intel.com>
Thu, 11 Jun 2020 03:25:06 +0000 (11:25 +0800)
committerMark Brown <broonie@kernel.org>
Mon, 15 Jun 2020 22:36:01 +0000 (23:36 +0100)
Add support for 32bit width data register, then it supports 32bit
data width spi slave device and spi transfers.

Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/1591845911-10197-2-git-send-email-yilun.xu@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-altera.c

index 41d71ba..d5fa0c5 100644 (file)
@@ -86,6 +86,13 @@ static void altera_spi_tx_word(struct altera_spi *hw)
                        txd = (hw->tx[hw->count * 2]
                                | (hw->tx[hw->count * 2 + 1] << 8));
                        break;
+               case 4:
+                       txd = (hw->tx[hw->count * 4]
+                               | (hw->tx[hw->count * 4 + 1] << 8)
+                               | (hw->tx[hw->count * 4 + 2] << 16)
+                               | (hw->tx[hw->count * 4 + 3] << 24));
+                       break;
+
                }
        }
 
@@ -106,6 +113,13 @@ static void altera_spi_rx_word(struct altera_spi *hw)
                        hw->rx[hw->count * 2] = rxd;
                        hw->rx[hw->count * 2 + 1] = rxd >> 8;
                        break;
+               case 4:
+                       hw->rx[hw->count * 4] = rxd;
+                       hw->rx[hw->count * 4 + 1] = rxd >> 8;
+                       hw->rx[hw->count * 4 + 2] = rxd >> 16;
+                       hw->rx[hw->count * 4 + 3] = rxd >> 24;
+                       break;
+
                }
        }