drm/amd/display: add sanity check for clk table from smu
authorEric Yang <Eric.Yang2@amd.com>
Thu, 3 Oct 2019 19:06:01 +0000 (15:06 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 17 Oct 2019 20:29:46 +0000 (16:29 -0400)
[Why]
Handle the case where we don't get a valid table. Also fixes compiler
warning for variable potentially used before assignment.

[How]
If the entire table has no valid fclk, reject the table and use our own
hard code.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

index fb8aa94..0e712df 100644 (file)
@@ -546,6 +546,8 @@ void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struc
 {
        int i, j = 0;
 
+       j = -1;
+
        ASSERT(PP_SMU_NUM_FCLK_DPM_LEVELS <= MAX_NUM_DPM_LVL);
 
        /* Find lowest DPM, FCLK is filled in reverse order*/
@@ -557,6 +559,12 @@ void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struc
                }
        }
 
+       if (j == -1) {
+               /* clock table is all 0s, just use our own hardcode */
+               ASSERT(0);
+               return;
+       }
+
        bw_params->clk_table.num_entries = j + 1;
 
        for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) {