pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions

This patch adds MMC pins, groups and functions to R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165929.31002-8-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 0f5b31a..5cbc9be 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -2009,6 +2009,65 @@ static const unsigned int intc_ex_irq5_mux[] = {
        IRQ5_MARK,
 };
 
+/* - MMC -------------------------------------------------------------------- */
+static const unsigned int mmc_data1_pins[] = {
+       /* MMC_SD_D0 */
+       RCAR_GP_PIN(0, 19),
+};
+static const unsigned int mmc_data1_mux[] = {
+       MMC_SD_D0_MARK,
+};
+static const unsigned int mmc_data4_pins[] = {
+       /* MMC_SD_D[0:3] */
+       RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 20),
+       RCAR_GP_PIN(0, 21), RCAR_GP_PIN(0, 22),
+};
+static const unsigned int mmc_data4_mux[] = {
+       MMC_SD_D0_MARK, MMC_SD_D1_MARK,
+       MMC_SD_D2_MARK, MMC_SD_D3_MARK,
+};
+static const unsigned int mmc_data8_pins[] = {
+       /* MMC_SD_D[0:3], MMC_D[4:7] */
+       RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 20),
+       RCAR_GP_PIN(0, 21), RCAR_GP_PIN(0, 22),
+       RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
+       RCAR_GP_PIN(0, 26), RCAR_GP_PIN(0, 27),
+};
+static const unsigned int mmc_data8_mux[] = {
+       MMC_SD_D0_MARK, MMC_SD_D1_MARK,
+       MMC_SD_D2_MARK, MMC_SD_D3_MARK,
+       MMC_D4_MARK, MMC_D5_MARK,
+       MMC_D6_MARK, MMC_D7_MARK,
+};
+static const unsigned int mmc_ctrl_pins[] = {
+       /* MMC_SD_CLK, MMC_SD_CMD */
+       RCAR_GP_PIN(0, 23), RCAR_GP_PIN(0, 18),
+};
+static const unsigned int mmc_ctrl_mux[] = {
+       MMC_SD_CLK_MARK, MMC_SD_CMD_MARK,
+};
+static const unsigned int mmc_cd_pins[] = {
+       /* SD_CD */
+       RCAR_GP_PIN(0, 16),
+};
+static const unsigned int mmc_cd_mux[] = {
+       SD_CD_MARK,
+};
+static const unsigned int mmc_wp_pins[] = {
+       /* SD_WP */
+       RCAR_GP_PIN(0, 15),
+};
+static const unsigned int mmc_wp_mux[] = {
+       SD_WP_MARK,
+};
+static const unsigned int mmc_ds_pins[] = {
+       /* MMC_DS */
+       RCAR_GP_PIN(0, 17),
+};
+static const unsigned int mmc_ds_mux[] = {
+       MMC_DS_MARK,
+};
+
 /* - SCIF0 ------------------------------------------------------------------ */
 static const unsigned int scif0_data_pins[] = {
        /* RX0, TX0 */
@@ -2221,6 +2280,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(intc_ex_irq4),
        SH_PFC_PIN_GROUP(intc_ex_irq5),
 
+       SH_PFC_PIN_GROUP(mmc_data1),
+       SH_PFC_PIN_GROUP(mmc_data4),
+       SH_PFC_PIN_GROUP(mmc_data8),
+       SH_PFC_PIN_GROUP(mmc_ctrl),
+       SH_PFC_PIN_GROUP(mmc_cd),
+       SH_PFC_PIN_GROUP(mmc_wp),
+       SH_PFC_PIN_GROUP(mmc_ds),
+
        SH_PFC_PIN_GROUP(scif0_data),
        SH_PFC_PIN_GROUP(scif0_clk),
        SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -2413,6 +2480,16 @@ static const char * const intc_ex_groups[] = {
        "intc_ex_irq5",
 };
 
+static const char * const mmc_groups[] = {
+       "mmc_data1",
+       "mmc_data4",
+       "mmc_data8",
+       "mmc_ctrl",
+       "mmc_cd",
+       "mmc_wp",
+       "mmc_ds",
+};
+
 static const char * const scif0_groups[] = {
        "scif0_data",
        "scif0_clk",
@@ -2477,6 +2554,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
 
        SH_PFC_FUNCTION(intc_ex),
 
+       SH_PFC_FUNCTION(mmc),
+
        SH_PFC_FUNCTION(scif0),
        SH_PFC_FUNCTION(scif1),
        SH_PFC_FUNCTION(scif3),