mfd: Avoid unbalanced asic3 irq wakeup enables/disables

The mfd/asic3 driver does not currently define a irq_set_wake() handler.
Consequently any attempt to configure the 3 ASIC3 GPIO buttons - RECORD,
CALENDAR, HOME - as wakeup sources results in Unbalanced IRQ warnings
when the system is woken from sleep mode:

WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8()
Unbalanced IRQ 342 wake disable
...
WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8()
Unbalanced IRQ 337 wake disable
...
WARNING: at kernel/irq/manage.c:520 irq_set_irq_wake+0xc4/0xf8()
Unbalanced IRQ 339 wake disable
...

This patch adds a irq_set_wake() handler to the mfd/asic3 driver.

Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index 4c3ec81..9d4a492 100644 (file)
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -353,12 +353,28 @@ static int asic3_gpio_irq_type(struct irq_data *data, unsigned int type)
        return 0;
 }
 
+static int asic3_gpio_irq_set_wake(struct irq_data *data, unsigned int on)
+{
+       struct asic3 *asic = irq_data_get_irq_chip_data(data);
+       u32 bank, index;
+       u16 bit;
+
+       bank = asic3_irq_to_bank(asic, data->irq);
+       index = asic3_irq_to_index(asic, data->irq);
+       bit = 1<<index;
+
+       asic3_set_register(asic, bank + ASIC3_GPIO_SLEEP_MASK, bit, !on);
+
+       return 0;
+}
+
 static struct irq_chip asic3_gpio_irq_chip = {
        .name           = "ASIC3-GPIO",
        .irq_ack        = asic3_mask_gpio_irq,
        .irq_mask       = asic3_mask_gpio_irq,
        .irq_unmask     = asic3_unmask_gpio_irq,
        .irq_set_type   = asic3_gpio_irq_type,
+       .irq_set_wake   = asic3_gpio_irq_set_wake,
 };
 
 static struct irq_chip asic3_irq_chip = {