MIPS: Fix clz implementation of the simulator.
authorplind44@gmail.com <plind44@gmail.com@ce2b1a6d-e550-0410-aec6-3dcde31c8c00>
Thu, 20 Feb 2014 17:18:57 +0000 (17:18 +0000)
committerplind44@gmail.com <plind44@gmail.com@ce2b1a6d-e550-0410-aec6-3dcde31c8c00>
Thu, 20 Feb 2014 17:18:57 +0000 (17:18 +0000)
BUG=
R=plind44@gmail.com

Review URL: https://codereview.chromium.org/166273020

Patch from Balazs Kilvady <kilvadyb@homejinni.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19517 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/mips/simulator-mips.cc

index 10417d5..efce887 100644 (file)
@@ -1926,7 +1926,11 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
           alu_out = rs_u * rt_u;  // Only the lower 32 bits are kept.
           break;
         case CLZ:
-          alu_out = __builtin_clz(rs_u);
+          // MIPS32 spec: If no bits were set in GPR rs, the result written to
+          // GPR rd is 32.
+          // GCC __builtin_clz: If input is 0, the result is undefined.
+          alu_out =
+              rs_u == 0 ? 32 : CompilerIntrinsics::CountLeadingZeros(rs_u);
           break;
         default:
           UNREACHABLE();