ARM: OMAP2+: gpmc: nand register helper bch update

Update helper function that provides gpmc-nand register
details for nand driver with bch register information.
Using this nand driver can be made self sufficient to
handle remaining gpmc-nand operations by itself instead
of relying on gpmc exported nand functions.

Signed-off-by: Afzal Mohammed <afzal@ti.com>

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 34823b3..f5cde49 100644 (file)
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -61,6 +61,9 @@
 #define GPMC_ECC_SIZE_CONFIG   0x1fc
 #define GPMC_ECC1_RESULT        0x200
 #define GPMC_ECC_BCH_RESULT_0   0x240   /* not available on OMAP2 */
+#define        GPMC_ECC_BCH_RESULT_1   0x244   /* not available on OMAP2 */
+#define        GPMC_ECC_BCH_RESULT_2   0x248   /* not available on OMAP2 */
+#define        GPMC_ECC_BCH_RESULT_3   0x24c   /* not available on OMAP2 */
 
 /* GPMC ECC control settings */
 #define GPMC_ECC_CTRL_ECCCLEAR         0x100
@@ -77,6 +80,7 @@
 
 #define GPMC_CS0_OFFSET                0x60
 #define GPMC_CS_SIZE           0x30
+#define        GPMC_BCH_SIZE           0x10
 
 #define GPMC_MEM_START         0x00000000
 #define GPMC_MEM_END           0x3FFFFFFF
@@ -731,6 +735,8 @@ EXPORT_SYMBOL(gpmc_prefetch_reset);
 
 void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
 {
+       int i;
+
        reg->gpmc_status = gpmc_base + GPMC_STATUS;
        reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +
                                GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
@@ -746,7 +752,17 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
        reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;
        reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;
        reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;
-       reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0;
+
+       for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) {
+               reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 +
+                                          GPMC_BCH_SIZE * i;
+               reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 +
+                                          GPMC_BCH_SIZE * i;
+               reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 +
+                                          GPMC_BCH_SIZE * i;
+               reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 +
+                                          GPMC_BCH_SIZE * i;
+       }
 }
 
 int gpmc_get_client_irq(unsigned irq_config)

diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index e1965fe..24d32ca 100644 (file)
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -13,6 +13,8 @@
 
 #include <linux/mtd/partitions.h>
 
+#define        GPMC_BCH_NUM_REMAINDER  8
+
 enum nand_io {
        NAND_OMAP_PREFETCH_POLLED = 0,  /* prefetch polled mode, default */
        NAND_OMAP_POLLED,               /* polled mode, without prefetch */
@@ -43,7 +45,10 @@ struct gpmc_nand_regs {
        void __iomem    *gpmc_ecc_control;
        void __iomem    *gpmc_ecc_size_config;
        void __iomem    *gpmc_ecc1_result;
-       void __iomem    *gpmc_bch_result0;
+       void __iomem    *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
+       void __iomem    *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
+       void __iomem    *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
+       void __iomem    *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
 };
 
 struct omap_nand_platform_data {