drm/i915/gt: Add some missing blank lines after declaration

Trivial checkpatch cleanup.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210122192913.4518-2-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c b/drivers/gpu/drm/i915/gt/debugfs_gt.c
index aa18d3b..591eb60 100644 (file)
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
@@ -36,6 +36,7 @@ void intel_gt_debugfs_register_files(struct dentry *root,
 {
        while (count--) {
                umode_t mode = files->fops->write ? 0644 : 0444;
+
                if (!files->eval || files->eval(data))
                        debugfs_create_file(files->name,
                                            mode, root, data,

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index 755522c..03a9d43 100644 (file)
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -145,6 +145,7 @@ static unsigned int gen8_pt_count(u64 start, u64 end)
 static unsigned int gen8_pd_top_count(const struct i915_address_space *vm)
 {
        unsigned int shift = __gen8_pte_shift(vm->top);
+
        return (vm->total + (1ull << shift) - 1) >> shift;
 }
 

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index f3498e2..e891552 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -580,6 +580,7 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
                        }
                } else {
                        u32 dimm_c0, dimm_c1;
+
                        dimm_c0 = intel_uncore_read(uncore, MAD_DIMM_C0);
                        dimm_c1 = intel_uncore_read(uncore, MAD_DIMM_C1);
                        dimm_c0 &= MAD_DIMM_A_SIZE_MASK | MAD_DIMM_B_SIZE_MASK;
@@ -769,10 +770,12 @@ i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
        i = 0;
        for_each_sgt_page(page, sgt_iter, pages) {
                char new_bit_17 = page_to_phys(page) >> 17;
+
                if ((new_bit_17 & 0x1) != (test_bit(i, obj->bit_17) != 0)) {
                        swizzle_page(page);
                        set_page_dirty(page);
                }
+
                i++;
        }
 }

diff --git a/drivers/gpu/drm/i915/gt/intel_renderstate.c b/drivers/gpu/drm/i915/gt/intel_renderstate.c
index 87d2da8..8335a43 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_renderstate.c
+++ b/drivers/gpu/drm/i915/gt/intel_renderstate.c
@@ -62,6 +62,7 @@ static int render_state_setup(struct intel_renderstate *so,
 
                if (i * 4  == rodata->reloc[reloc_index]) {
                        u64 r = s + so->vma->node.start;
+
                        s = lower_32_bits(r);
                        if (HAS_64BIT_RELOC(i915)) {
                                if (i + 1 >= rodata->batch_items ||

diff --git a/drivers/gpu/drm/i915/gt/intel_ring.h b/drivers/gpu/drm/i915/gt/intel_ring.h
index 44e9029..dbf5f14 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_ring.h
+++ b/drivers/gpu/drm/i915/gt/intel_ring.h
@@ -81,6 +81,7 @@ static inline u32 intel_ring_offset(const struct i915_request *rq, void *addr)
 {
        /* Don't write ring->size (equivalent to 0) as that hangs some GPUs. */
        u32 offset = addr - rq->ring->vaddr;
+
        GEM_BUG_ON(offset > rq->ring->size);
        return intel_ring_wrap(rq->ring, offset);
 }