; RUN: opt < %s -passes=simple-loop-unswitch -verify-memoryssa -disable-output
- %struct.BLEND_MAP = type { i16, i16, i16, i32, %struct.BLEND_MAP_ENTRY* }
+ %struct.BLEND_MAP = type { i16, i16, i16, i32, ptr }
%struct.BLEND_MAP_ENTRY = type { float, i8, { [5 x float], [4 x i8] } }
- %struct.TPATTERN = type { i16, i16, i16, i32, float, float, float, %struct.WARP*, %struct.TPATTERN*, %struct.BLEND_MAP*, { %struct.anon, [4 x i8] } }
- %struct.TURB = type { i16, %struct.WARP*, [3 x double], i32, float, float }
- %struct.WARP = type { i16, %struct.WARP* }
+ %struct.TPATTERN = type { i16, i16, i16, i32, float, float, float, ptr, ptr, ptr, { %struct.anon, [4 x i8] } }
+ %struct.TURB = type { i16, ptr, [3 x double], i32, float, float }
+ %struct.WARP = type { i16, ptr }
%struct.anon = type { float, [3 x double] }
define void @Parse_Pattern() {
bb671: ; preds = %cond_true1099
br label %bb1096.outer23
bb1096.outer20.loopexit: ; preds = %cond_true1099
- %Local_Turb.0.ph24.lcssa = phi %struct.TURB* [ %Local_Turb.0.ph24, %cond_true1099 ] ; <%struct.TURB*> [#uses=1]
+ %Local_Turb.0.ph24.lcssa = phi ptr [ %Local_Turb.0.ph24, %cond_true1099 ] ; <ptr> [#uses=1]
br label %bb1096.outer20
bb1096.outer20: ; preds = %bb1096.outer20.loopexit, %entry
- %Local_Turb.0.ph22 = phi %struct.TURB* [ undef, %entry ], [ %Local_Turb.0.ph24.lcssa, %bb1096.outer20.loopexit ] ; <%struct.TURB*> [#uses=1]
+ %Local_Turb.0.ph22 = phi ptr [ undef, %entry ], [ %Local_Turb.0.ph24.lcssa, %bb1096.outer20.loopexit ] ; <ptr> [#uses=1]
%tmp1098 = icmp eq i32 0, 0 ; <i1> [#uses=1]
br label %bb1096.outer23
bb1096.outer23: ; preds = %bb1096.outer20, %bb671
- %Local_Turb.0.ph24 = phi %struct.TURB* [ %Local_Turb.0.ph22, %bb1096.outer20 ], [ null, %bb671 ] ; <%struct.TURB*> [#uses=2]
+ %Local_Turb.0.ph24 = phi ptr [ %Local_Turb.0.ph22, %bb1096.outer20 ], [ null, %bb671 ] ; <ptr> [#uses=2]
br label %bb1096
bb1096: ; preds = %cond_true1099, %bb1096.outer23
br i1 %tmp1098, label %cond_true1099, label %bb1102
i32 359, label %bb1096
]
bb1102: ; preds = %bb1096
- %Local_Turb.0.ph24.lcssa1 = phi %struct.TURB* [ %Local_Turb.0.ph24, %bb1096 ] ; <%struct.TURB*> [#uses=0]
+ %Local_Turb.0.ph24.lcssa1 = phi ptr [ %Local_Turb.0.ph24, %bb1096 ] ; <ptr> [#uses=0]
ret void
}
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-pc-linux-gnu"
- %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* }
- %struct.ada__tags__dispatch_table = type { [1 x i8*] }
+ %struct.ada__streams__root_stream_type = type { ptr }
+ %struct.ada__tags__dispatch_table = type { [1 x ptr] }
%struct.quotes__T173s = type { i8, %struct.quotes__T173s__T174s, [2 x [1 x double]], [2 x i16], i64, i8 }
%struct.quotes__T173s__T174s = type { i8, i8, i8, i16, i16, [2 x [1 x double]] }
; RUN: opt < %s -passes='loop(simple-loop-unswitch),instcombine' -verify-memoryssa -disable-output
-@str3 = external constant [3 x i8] ; <[3 x i8]*> [#uses=1]
+@str3 = external constant [3 x i8] ; <ptr> [#uses=1]
define i32 @stringSearch_Clib(i32 %count) {
entry:
br i1 %ttmp33, label %bb.nph, label %bb41
bb.nph: ; preds = %bb36.outer
- %ttmp8 = icmp eq i8* null, null ; <i1> [#uses=1]
- %ttmp6 = icmp eq i8* null, null ; <i1> [#uses=1]
- %tmp31 = call i32 @strcspn( i8* null, i8* getelementptr ([3 x i8], [3 x i8]* @str3, i64 0, i64 0) ) ; <i32> [#uses=1]
+ %ttmp8 = icmp eq ptr null, null ; <i1> [#uses=1]
+ %ttmp6 = icmp eq ptr null, null ; <i1> [#uses=1]
+ %tmp31 = call i32 @strcspn( ptr null, ptr @str3 ) ; <i32> [#uses=1]
br i1 %ttmp8, label %cond_next, label %cond_true
cond_true: ; preds = %bb.nph
ret i32 %c.01.1
}
-declare i32 @strcspn(i8*, i8*)
+declare i32 @strcspn(ptr, ptr)
; RUN: opt < %s -passes=simple-loop-unswitch -verify-memoryssa -disable-output
-define i32 @main(i32 %argc, i8** %argv) {
+define i32 @main(i32 %argc, ptr %argv) {
entry:
%tmp1785365 = icmp ult i32 0, 100 ; <i1> [#uses=1]
br label %bb
; PR1559
target triple = "i686-pc-linux-gnu"
- %struct.re_pattern_buffer = type { i8*, i32, i32, i32, i8*, i8*, i32, i8 }
+ %struct.re_pattern_buffer = type { ptr, i32, i32, i32, ptr, ptr, i32, i8 }
-define fastcc i32 @byte_regex_compile(i8* %pattern, i32 %size, i32 %syntax, %struct.re_pattern_buffer* %bufp) {
+define fastcc i32 @byte_regex_compile(ptr %pattern, i32 %size, i32 %syntax, ptr %bufp) {
entry:
br i1 false, label %bb147, label %cond_next123
br label %bb1855.outer.outer
bb1855.outer.outer: ; preds = %cond_true1849, %bb1734
- %b.10.ph.ph = phi i8* [ null, %cond_true1849 ], [ null, %bb1734 ] ; <i8*> [#uses=1]
+ %b.10.ph.ph = phi ptr [ null, %cond_true1849 ], [ null, %bb1734 ] ; <ptr> [#uses=1]
br label %bb1855.outer
bb1855.outer: ; preds = %bb1855.outer.outer, %cond_next1844
- %b.10.ph = phi i8* [ null, %cond_next1844 ], [ %b.10.ph.ph, %bb1855.outer.outer ] ; <i8*> [#uses=1]
- %tmp1837 = icmp eq i8* null, null ; <i1> [#uses=2]
+ %b.10.ph = phi ptr [ null, %cond_next1844 ], [ %b.10.ph.ph, %bb1855.outer.outer ] ; <ptr> [#uses=1]
+ %tmp1837 = icmp eq ptr null, null ; <i1> [#uses=2]
br i1 false, label %cond_true1831, label %cond_next1915
cond_next1915: ; preds = %cond_next1961, %bb1855.outer
- store i8* null, i8** null
+ store ptr null, ptr null
br i1 %tmp1837, label %cond_next1929, label %cond_true1923
cond_true1923: ; preds = %cond_next1915
br i1 false, label %cond_next1961, label %cond_next2009
cond_next1961: ; preds = %cond_next1929
- %tmp1992 = getelementptr i8, i8* %b.10.ph, i32 0 ; <i8*> [#uses=0]
+ %tmp1992 = getelementptr i8, ptr %b.10.ph, i32 0 ; <ptr> [#uses=0]
br label %cond_next1915
cond_next2009: ; preds = %cond_next1929
%struct.QBasicAtomic = type { i32 }
-define void @_ZNK5QDate9addMonthsEi(%struct.QBasicAtomic* sret(%struct.QBasicAtomic) %agg.result, %struct.QBasicAtomic* %this, i32 %nmonths) {
+define void @_ZNK5QDate9addMonthsEi(ptr sret(%struct.QBasicAtomic) %agg.result, ptr %this, i32 %nmonths) {
entry:
br label %cond_true90
br i1 false, label %bb93, label %cond_true90
bb58: ; preds = %bb45
- store i32 0, i32* null, align 4
+ store i32 0, ptr null, align 4
br i1 false, label %cond_true90, label %bb93
cond_true90: ; preds = %bb58, %bb53, %bb16, %entry
; RUN: opt < %s -passes='loop(simple-loop-unswitch),instcombine' -verify-memoryssa -disable-output
%struct.ClassDef = type { %struct.QByteArray, %struct.QByteArray, %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", i8, i8, %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QMap<QByteArray,QByteArray>", %"struct.QList<ArgumentDef>", %"struct.QMap<QByteArray,QByteArray>", i32, i32 }
- %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
- %struct.Generator = type { %struct.FILE*, %struct.ClassDef*, %"struct.QList<ArgumentDef>", %struct.QByteArray, %"struct.QList<ArgumentDef>" }
+ %struct.FILE = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i16, i8, [1 x i8], ptr, i64, ptr, ptr, ptr, ptr, i32, i32, [40 x i8] }
+ %struct.Generator = type { ptr, ptr, %"struct.QList<ArgumentDef>", %struct.QByteArray, %"struct.QList<ArgumentDef>" }
%struct.QBasicAtomic = type { i32 }
- %struct.QByteArray = type { %"struct.QByteArray::Data"* }
- %"struct.QByteArray::Data" = type { %struct.QBasicAtomic, i32, i32, i8*, [1 x i8] }
+ %struct.QByteArray = type { ptr }
+ %"struct.QByteArray::Data" = type { %struct.QBasicAtomic, i32, i32, ptr, [1 x i8] }
%"struct.QList<ArgumentDef>" = type { %"struct.QList<ArgumentDef>::._19" }
%"struct.QList<ArgumentDef>::._19" = type { %struct.QListData }
- %struct.QListData = type { %"struct.QListData::Data"* }
- %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] }
+ %struct.QListData = type { ptr }
+ %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x ptr] }
%"struct.QMap<QByteArray,QByteArray>" = type { %"struct.QMap<QByteArray,QByteArray>::._56" }
- %"struct.QMap<QByteArray,QByteArray>::._56" = type { %struct.QMapData* }
- %struct.QMapData = type { %struct.QMapData*, [12 x %struct.QMapData*], %struct.QBasicAtomic, i32, i32, i32, i8 }
- %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
-@.str9 = external constant [1 x i8] ; <[1 x i8]*> [#uses=1]
+ %"struct.QMap<QByteArray,QByteArray>::._56" = type { ptr }
+ %struct.QMapData = type { ptr, [12 x ptr], %struct.QBasicAtomic, i32, i32, i32, i8 }
+ %struct._IO_marker = type { ptr, ptr, i32 }
+@.str9 = external constant [1 x i8] ; <ptr> [#uses=1]
-declare i32 @strcmp(i8*, i8*)
+declare i32 @strcmp(ptr, ptr)
-define i32 @_ZN9Generator6strregEPKc(%struct.Generator* %this, i8* %s) {
+define i32 @_ZN9Generator6strregEPKc(ptr %this, ptr %s) {
entry:
- %s_addr.0 = select i1 false, i8* getelementptr ([1 x i8], [1 x i8]* @.str9, i32 0, i32 0), i8* %s ; <i8*> [#uses=2]
- %tmp122 = icmp eq i8* %s_addr.0, null ; <i1> [#uses=1]
+ %s_addr.0 = select i1 false, ptr @.str9, ptr %s ; <ptr> [#uses=2]
+ %tmp122 = icmp eq ptr %s_addr.0, null ; <i1> [#uses=1]
br label %bb184
bb55: ; preds = %bb184
br i1 %tmp122, label %bb154, label %bb128
bb128: ; preds = %bb88
- %tmp138 = call i32 @strcmp( i8* null, i8* %s_addr.0 ) ; <i32> [#uses=1]
+ %tmp138 = call i32 @strcmp( ptr null, ptr %s_addr.0 ) ; <i32> [#uses=1]
%iftmp.37.0.in4 = icmp eq i32 %tmp138, 0 ; <i1> [#uses=1]
br i1 %iftmp.37.0.in4, label %bb250, label %bb166
; RUN: opt < %s -passes='loop-mssa(licm),loop-unroll' -disable-output
-@resonant = external global i32 ; <i32*> [#uses=2]
+@resonant = external global i32 ; <ptr> [#uses=2]
define void @weightadj() {
entry:
br label %bb
bb: ; preds = %bb158, %entry
- store i32 0, i32* @resonant, align 4
+ store i32 0, ptr @resonant, align 4
br i1 false, label %g.exit, label %bb158
g.exit: ; preds = %bb68, %bb
br i1 false, label %bb68, label %cond_true
cond_true: ; preds = %g.exit
- store i32 1, i32* @resonant, align 4
+ store i32 1, ptr @resonant, align 4
br label %bb68
bb68: ; preds = %cond_true, %g.exit
; RUN: opt < %s -passes=licm,simple-loop-unswitch -disable-output
-@g_56 = external global i16 ; <i16*> [#uses=2]
+@g_56 = external global i16 ; <ptr> [#uses=2]
define i32 @func_67(i32 %p_68, i8 signext %p_69, i8 signext %p_71) nounwind {
entry:
bb29: ; preds = %bb19, %bb3
ret i32 0
bb36: ; preds = %bb19
- store i16 0, i16* @g_56, align 2
+ store i16 0, ptr @g_56, align 2
br i1 false, label %bb44, label %bb3
bb44: ; preds = %bb44, %bb36
- %tmp46 = load i16, i16* @g_56, align 2 ; <i16> [#uses=0]
+ %tmp46 = load i16, ptr @g_56, align 2 ; <i16> [#uses=0]
br i1 false, label %bb, label %bb44
}
br i1 true, label %for.end12, label %bb.nph
bb.nph: ; preds = %entry
- %g_38.promoted = load i32, i32* @g_38
+ %g_38.promoted = load i32, ptr @g_38
br label %for.body
for.body: ; preds = %for.cond, %bb.nph
br i1 true, label %for.cond.for.end12_crit_edge, label %for.body
for.cond.for.end12_crit_edge: ; preds = %for.cond
- store i32 %call1, i32* @g_38
+ store i32 %call1, ptr @g_38
br label %for.end12
for.end12: ; preds = %for.cond.for.end12_crit_edge, %entry
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.2"
-%class.MyContainer.1.3.19.29 = type { [6 x %class.MyMemVarClass.0.2.18.28*] }
+%class.MyContainer.1.3.19.29 = type { [6 x ptr] }
%class.MyMemVarClass.0.2.18.28 = type { i32 }
-define void @_ZN11MyContainer1fEi(%class.MyContainer.1.3.19.29* %this, i32 %doit) uwtable ssp align 2 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @_ZN11MyContainer1fEi(ptr %this, i32 %doit) uwtable ssp align 2 personality ptr @__gxx_personality_v0 {
entry:
br label %for.cond
if.then: ; preds = %for.body
%idxprom = sext i32 %inc1 to i64
- %array_ = getelementptr inbounds %class.MyContainer.1.3.19.29, %class.MyContainer.1.3.19.29* %this, i32 0, i32 0
- %arrayidx = getelementptr inbounds [6 x %class.MyMemVarClass.0.2.18.28*], [6 x %class.MyMemVarClass.0.2.18.28*]* %array_, i32 0, i64 %idxprom
- %tmp4 = load %class.MyMemVarClass.0.2.18.28*, %class.MyMemVarClass.0.2.18.28** %arrayidx, align 8
- %isnull = icmp eq %class.MyMemVarClass.0.2.18.28* %tmp4, null
+ %arrayidx = getelementptr inbounds [6 x ptr], ptr %this, i32 0, i64 %idxprom
+ %tmp4 = load ptr, ptr %arrayidx, align 8
+ %isnull = icmp eq ptr %tmp4, null
br i1 %isnull, label %for.inc, label %delete.notnull
delete.notnull: ; preds = %if.then
- invoke void @_ZN13MyMemVarClassD1Ev(%class.MyMemVarClass.0.2.18.28* %tmp4)
+ invoke void @_ZN13MyMemVarClassD1Ev(ptr %tmp4)
to label %invoke.cont unwind label %lpad
invoke.cont: ; preds = %delete.notnull
- %0 = bitcast %class.MyMemVarClass.0.2.18.28* %tmp4 to i8*
- call void @_ZdlPv(i8* %0) nounwind
+ call void @_ZdlPv(ptr %tmp4) nounwind
br label %for.inc
lpad: ; preds = %delete.notnull
- %1 = landingpad { i8*, i32 }
+ %0 = landingpad { ptr, i32 }
cleanup
- %2 = extractvalue { i8*, i32 } %1, 0
- %3 = extractvalue { i8*, i32 } %1, 1
- %4 = bitcast %class.MyMemVarClass.0.2.18.28* %tmp4 to i8*
- call void @_ZdlPv(i8* %4) nounwind
- %lpad.val = insertvalue { i8*, i32 } undef, i8* %2, 0
- %lpad.val7 = insertvalue { i8*, i32 } %lpad.val, i32 %3, 1
- resume { i8*, i32 } %lpad.val7
+ %1 = extractvalue { ptr, i32 } %0, 0
+ %2 = extractvalue { ptr, i32 } %0, 1
+ call void @_ZdlPv(ptr %tmp4) nounwind
+ %lpad.val = insertvalue { ptr, i32 } undef, ptr %1, 0
+ %lpad.val7 = insertvalue { ptr, i32 } %lpad.val, i32 %2, 1
+ resume { ptr, i32 } %lpad.val7
for.inc: ; preds = %invoke.cont, %if.then, %for.body
%inc = add nsw i32 %inc1, 1
ret void
}
-declare void @_ZN13MyMemVarClassD1Ev(%class.MyMemVarClass.0.2.18.28*)
+declare void @_ZN13MyMemVarClassD1Ev(ptr)
declare i32 @__gxx_personality_v0(...)
-declare void @_ZdlPv(i8*) nounwind
+declare void @_ZdlPv(ptr) nounwind
; CHECK-NEXT: br label %"16"
; CHECK: "16": ; preds = %"22", %"5"
-; CHECK-NEXT: indirectbr i8* undef, [label %"22", label %"33"]
+; CHECK-NEXT: indirectbr ptr undef, [label %"22", label %"33"]
; CHECK: "22": ; preds = %"16"
; CHECK-NEXT: br i1 %0, label %"16", label %"26"
br label %"16"
"16": ; preds = %"22", %"5"
- indirectbr i8* undef, [label %"22", label %"33"]
+ indirectbr ptr undef, [label %"22", label %"33"]
"22": ; preds = %"16"
br i1 %0, label %"16", label %"26"
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7.0"
-%class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379 = type { %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376*, %class.B.21.41.65.101.137.157.177.197.237.241.245.249.261.293.301.337.345.378 }
-%class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376 = type { %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* }
-%class.B.21.41.65.101.137.157.177.197.237.241.245.249.261.293.301.337.345.378 = type { %class.A.20.40.64.100.136.156.176.196.236.240.244.248.260.292.300.336.344.377* }
+%class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379 = type { ptr, %class.B.21.41.65.101.137.157.177.197.237.241.245.249.261.293.301.337.345.378 }
+%class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376 = type { ptr }
+%class.B.21.41.65.101.137.157.177.197.237.241.245.249.261.293.301.337.345.378 = type { ptr }
%class.A.20.40.64.100.136.156.176.196.236.240.244.248.260.292.300.336.344.377 = type { i8 }
-define void @_Z23get_reconstruction_pathv() uwtable ssp personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @_Z23get_reconstruction_pathv() uwtable ssp personality ptr @__gxx_personality_v0 {
entry:
%c = alloca %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379, align 8
br label %for.cond
for.cond: ; preds = %for.end, %entry
- invoke void @_ZN1DptEv(%class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %c)
+ invoke void @_ZN1DptEv(ptr %c)
to label %invoke.cont unwind label %lpad
invoke.cont: ; preds = %for.cond
to label %for.cond3 unwind label %lpad
for.cond3: ; preds = %invoke.cont6, %invoke.cont
- invoke void @_ZN1DptEv(%class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %c)
+ invoke void @_ZN1DptEv(ptr %c)
to label %invoke.cont4 unwind label %lpad
invoke.cont4: ; preds = %for.cond3
br i1 undef, label %for.cond3, label %for.end
lpad: ; preds = %for.end, %invoke.cont4, %for.cond3, %invoke.cont, %for.cond
- %0 = landingpad { i8*, i32 }
+ %0 = landingpad { ptr, i32 }
cleanup
- resume { i8*, i32 } undef
+ resume { ptr, i32 } undef
for.end: ; preds = %invoke.cont6
invoke void @_ZN1C13_M_insert_auxER1D()
to label %for.cond unwind label %lpad
}
-define void @_ZN1DptEv(%class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this) uwtable ssp align 2 {
+define void @_ZN1DptEv(ptr %this) uwtable ssp align 2 {
entry:
- %this.addr = alloca %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379*, align 8
- store %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr, align 8
- %this1 = load %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379*, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr
- %px = getelementptr inbounds %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this1, i32 0, i32 0
- %0 = load %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376*, %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376** %px, align 8
- %tobool = icmp ne %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376* %0, null
+ %this.addr = alloca ptr, align 8
+ store ptr %this, ptr %this.addr, align 8
+ %this1 = load ptr, ptr %this.addr
+ %0 = load ptr, ptr %this1, align 8
+ %tobool = icmp ne ptr %0, null
br i1 %tobool, label %cond.end, label %cond.false
cond.false: ; preds = %entry
define void @func() noreturn nounwind uwtable {
entry:
- %0 = load i32, i32* @a, align 4
+ %0 = load i32, ptr @a, align 4
%tobool = icmp eq i32 %0, 0
- %1 = load i32, i32* @b, align 4
+ %1 = load i32, ptr @b, align 4
br label %while.body
while.body: ; preds = %while.body, %entry
define void @foo() {
; CHECK-LABEL: @foo
entry:
- %arrayidx.i1 = getelementptr inbounds i16, i16* undef, i16 undef
- %arrayidx.i = addrspacecast i16* %arrayidx.i1 to i16 addrspace(1)*
+ %arrayidx.i1 = getelementptr inbounds i16, ptr undef, i16 undef
+ %arrayidx.i = addrspacecast ptr %arrayidx.i1 to ptr addrspace(1)
br i1 undef, label %for.body.i, label %bar.exit
for.body.i: ; preds = %for.body.i, %entry
; will try to find the base object to prove deferenceability. If we look
; through the addrspacecast, we'll fail an assertion about bitwidths matching
; CHECK-LABEL: for.body.i
-; CHECK: %0 = load i16, i16 addrspace(1)* %arrayidx.i, align 2
- %0 = load i16, i16 addrspace(1)* %arrayidx.i, align 2
+; CHECK: %0 = load i16, ptr addrspace(1) %arrayidx.i, align 2
+ %0 = load i16, ptr addrspace(1) %arrayidx.i, align 2
%cmp1.i = icmp eq i16 %0, 0
br i1 %cmp1.i, label %bar.exit, label %for.body.i
declare void @b()
declare void @x()
-define void @test_no_unswitch(i1* %ptr, i1 %cond) {
+define void @test_no_unswitch(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_no_unswitch(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: ret void
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch(i1* %ptr, i1 %cond) {
+define void @test_unswitch(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK-NEXT: call void @a()
; CHECK-NEXT: br label [[LOOP_LATCH_US:%.*]]
; CHECK: loop_latch.us:
-; CHECK-NEXT: [[V_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V_US]], label [[LOOP_BEGIN_US]], label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label [[LOOP_EXIT:%.*]]
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH:%.*]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT_SPLIT:%.*]]
; CHECK: loop_exit.split:
; CHECK-NEXT: br label [[LOOP_EXIT]]
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_minsize(i1* %ptr, i1 %cond) #0 {
+define void @test_unswitch_minsize(ptr %ptr, i1 %cond) #0 {
; CHECK-LABEL: @test_unswitch_minsize(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: ret void
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_non_dup_code(i1* %ptr, i1 %cond) {
+define void @test_unswitch_non_dup_code(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_non_dup_code(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK-NEXT: call void @a()
; CHECK-NEXT: br label [[LOOP_LATCH_US:%.*]]
; CHECK: loop_latch.us:
-; CHECK-NEXT: [[V_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V_US]], label [[LOOP_BEGIN_US]], label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label [[LOOP_EXIT:%.*]]
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH:%.*]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT_SPLIT:%.*]]
; CHECK: loop_exit.split:
; CHECK-NEXT: br label [[LOOP_EXIT]]
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_non_dup_code_minsize(i1* %ptr, i1 %cond) #0 {
+define void @test_unswitch_non_dup_code_minsize(ptr %ptr, i1 %cond) #0 {
; CHECK-LABEL: @test_unswitch_non_dup_code_minsize(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: ret void
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_non_dup_code_in_cfg(i1* %ptr, i1 %cond) {
+define void @test_unswitch_non_dup_code_in_cfg(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_non_dup_code_in_cfg(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK-NEXT: call void @x()
; CHECK-NEXT: br label [[LOOP_A_US:%.*]]
; CHECK: loop_a.us:
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[LOOP_A_A_US:%.*]], label [[LOOP_A_B_US:%.*]]
; CHECK: loop_a_b.us:
; CHECK-NEXT: call void @a()
; CHECK-NEXT: call void @a()
; CHECK-NEXT: br label [[LOOP_LATCH_US]]
; CHECK: loop_latch.us:
-; CHECK-NEXT: [[V3_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3_US]], label [[LOOP_BEGIN_US]], label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label [[LOOP_EXIT:%.*]]
; CHECK-NEXT: call void @x()
; CHECK-NEXT: br label [[LOOP_B:%.*]]
; CHECK: loop_b:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_B_A:%.*]], label [[LOOP_B_B:%.*]]
; CHECK: loop_b_a:
; CHECK-NEXT: call void @b()
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[LOOP_BEGIN]], label [[LOOP_EXIT_SPLIT:%.*]]
; CHECK: loop_exit.split:
; CHECK-NEXT: br label [[LOOP_EXIT]]
br i1 %cond, label %loop_a, label %loop_b
loop_a:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a_a, label %loop_a_b
loop_a_a:
br label %loop_latch
loop_b:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_b_a, label %loop_b_b
loop_b_a:
br label %loop_latch
loop_latch:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_non_dup_code_in_cfg_minsize(i1* %ptr, i1 %cond) #0 {
+define void @test_unswitch_non_dup_code_in_cfg_minsize(ptr %ptr, i1 %cond) #0 {
; CHECK-LABEL: @test_unswitch_non_dup_code_in_cfg_minsize(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK-NEXT: call void @x()
; CHECK-NEXT: br i1 [[COND:%.*]], label [[LOOP_A:%.*]], label [[LOOP_B:%.*]]
; CHECK: loop_a:
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_A_A:%.*]], label [[LOOP_A_B:%.*]]
; CHECK: loop_a_a:
; CHECK-NEXT: call void @a()
; CHECK-NEXT: call void @a()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop_b:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_B_A:%.*]], label [[LOOP_B_B:%.*]]
; CHECK: loop_b_a:
; CHECK-NEXT: call void @b()
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: ret void
br i1 %cond, label %loop_a, label %loop_b
loop_a:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a_a, label %loop_a_b
loop_a_a:
br label %loop_latch
loop_b:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_b_a, label %loop_b_b
loop_b_a:
br label %loop_latch
loop_latch:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_no_unswitch_non_dup_code(i1* %ptr, i1 %cond) {
+define void @test_no_unswitch_non_dup_code(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_no_unswitch_non_dup_code(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK-NEXT: call void @x()
; CHECK-NEXT: br i1 [[COND:%.*]], label [[LOOP_A:%.*]], label [[LOOP_B:%.*]]
; CHECK: loop_a:
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_A_A:%.*]], label [[LOOP_A_B:%.*]]
; CHECK: loop_a_a:
; CHECK-NEXT: call void @a()
; CHECK-NEXT: call void @a()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop_b:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_B_A:%.*]], label [[LOOP_B_B:%.*]]
; CHECK: loop_b_a:
; CHECK-NEXT: call void @b()
; CHECK: loop_latch:
; CHECK-NEXT: call void @x()
; CHECK-NEXT: call void @x()
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: ret void
br i1 %cond, label %loop_a, label %loop_b
loop_a:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a_a, label %loop_a_b
loop_a_a:
br label %loop_latch
loop_b:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_b_a, label %loop_b_b
loop_b_a:
loop_latch:
call void @x()
call void @x()
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_large_exit(i1* %ptr, i1 %cond) {
+define void @test_unswitch_large_exit(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_large_exit(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK-NEXT: call void @a()
; CHECK-NEXT: br label [[LOOP_LATCH_US:%.*]]
; CHECK: loop_latch.us:
-; CHECK-NEXT: [[V_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V_US]], label [[LOOP_BEGIN_US]], label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label [[LOOP_EXIT:%.*]]
; CHECK-NEXT: call void @b()
; CHECK-NEXT: br label [[LOOP_LATCH:%.*]]
; CHECK: loop_latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT_SPLIT:%.*]]
; CHECK: loop_exit.split:
; CHECK-NEXT: br label [[LOOP_EXIT]]
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_dedicated_exiting(i1* %ptr, i1 %cond) {
+define void @test_unswitch_dedicated_exiting(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_dedicated_exiting(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK-NEXT: call void @a()
; CHECK-NEXT: br label [[LOOP_LATCH_US:%.*]]
; CHECK: loop_latch.us:
-; CHECK-NEXT: [[V_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V_US]], label [[LOOP_BEGIN_US]], label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label [[LOOP_EXIT:%.*]]
ret void
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
ret void
}
-define void @test_unswitch_dedicated_exiting_minsize(i1* %ptr, i1 %cond) #0 {
+define void @test_unswitch_dedicated_exiting_minsize(ptr %ptr, i1 %cond) #0 {
; CHECK-LABEL: @test_unswitch_dedicated_exiting_minsize(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK-NEXT: call void @b()
; CHECK-NEXT: ret void
; CHECK: loop_latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: ret void
ret void
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
declare i32 @a()
declare i32 @b()
; Check loops in cold functions will not be applied non-trivial loop unswitch
-define void @f1(i32 %i, i1 %cond, i1 %hot_cond, i1 %cold_cond, i1* %ptr) !prof !0 {
+define void @f1(i32 %i, i1 %cond, i1 %hot_cond, i1 %cold_cond, ptr %ptr) !prof !0 {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[COLD_LOOP_BEGIN:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @b()
; CHECK-NEXT: br label [[COLD_LOOP_LATCH]]
; CHECK: cold_loop_latch:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[COLD_LOOP_BEGIN]], label [[COLD_LOOP_EXIT:%.*]]
; CHECK: cold_loop_exit:
; CHECK-NEXT: ret void
br label %cold_loop_latch
cold_loop_latch:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %cold_loop_begin, label %cold_loop_exit
cold_loop_exit:
; Check loops will be applied non-trivial loop unswitch in a non-cold function,
; even loop headers are cold
-define void @f1(i32 %i, i1 %cond, i1 %hot_cond, i1 %cold_cond, i1* %ptr) !prof !14 {
+define void @f1(i32 %i, i1 %cond, i1 %hot_cond, i1 %cold_cond, ptr %ptr) !prof !14 {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[ENTRY_COLD_LOOP:%.*]]
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @a()
; CHECK-NEXT: br label [[COLD_LOOP_LATCH_US:%.*]]
; CHECK: cold_loop_latch.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[COLD_LOOP_BEGIN_US]], label [[COLD_LOOP_EXIT_LOOPEXIT_SPLIT_US:%.*]]
; CHECK: cold_loop_exit.loopexit.split.us:
; CHECK-NEXT: br label [[COLD_LOOP_EXIT_LOOPEXIT:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @b()
; CHECK-NEXT: br label [[COLD_LOOP_LATCH:%.*]]
; CHECK: cold_loop_latch:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[COLD_LOOP_BEGIN]], label [[COLD_LOOP_EXIT_LOOPEXIT_SPLIT:%.*]]
; CHECK: cold_loop_exit.loopexit.split:
; CHECK-NEXT: br label [[COLD_LOOP_EXIT_LOOPEXIT]]
br label %cold_loop_latch
cold_loop_latch:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %cold_loop_begin, label %cold_loop_exit
cold_loop_exit:
; RUN: opt -passes='loop(simple-loop-unswitch),verify<loops>' -S < %s | FileCheck %s
; RUN: opt -verify-memoryssa -passes='loop-mssa(simple-loop-unswitch),verify<loops>' -S < %s | FileCheck %s
-define i32 @test(i32* %A, i1 %C) {
+define i32 @test(ptr %A, i1 %C) {
entry:
br label %no_exit
no_exit: ; preds = %no_exit.backedge, %entry
%i.0.0 = phi i32 [ 0, %entry ], [ %i.0.0.be, %no_exit.backedge ] ; <i32> [#uses=3]
%gep.upgrd.1 = zext i32 %i.0.0 to i64 ; <i64> [#uses=1]
- %tmp.7 = getelementptr i32, i32* %A, i64 %gep.upgrd.1 ; <i32*> [#uses=4]
- %tmp.13 = load i32, i32* %tmp.7 ; <i32> [#uses=2]
+ %tmp.7 = getelementptr i32, ptr %A, i64 %gep.upgrd.1 ; <ptr> [#uses=4]
+ %tmp.13 = load i32, ptr %tmp.7 ; <i32> [#uses=2]
%tmp.14 = add i32 %tmp.13, 1 ; <i32> [#uses=1]
- store i32 %tmp.14, i32* %tmp.7
+ store i32 %tmp.14, ptr %tmp.7
br i1 %C, label %then, label %endif
then: ; preds = %no_exit
- %tmp.29 = load i32, i32* %tmp.7 ; <i32> [#uses=1]
+ %tmp.29 = load i32, ptr %tmp.7 ; <i32> [#uses=1]
%tmp.30 = add i32 %tmp.29, 2 ; <i32> [#uses=1]
- store i32 %tmp.30, i32* %tmp.7
+ store i32 %tmp.30, ptr %tmp.7
%inc9 = add i32 %i.0.0, 1 ; <i32> [#uses=2]
%tmp.112 = icmp ult i32 %inc9, 100000 ; <i1> [#uses=1]
br i1 %tmp.112, label %no_exit.backedge, label %return
; the noduplicate call.
; CHECK-LABEL: @test2(
-define i32 @test2(i32* %var) {
+define i32 @test2(ptr %var) {
%mem = alloca i32
- store i32 2, i32* %mem
- %c = load i32, i32* %mem
+ store i32 2, ptr %mem
+ %c = load i32, ptr %mem
br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %c, label %default [
i32 1, label %inc
; the convergent call that is not control-dependent on the unswitch condition.
; CHECK-LABEL: @test3(
-define i32 @test3(i32* %var) {
+define i32 @test3(ptr %var) {
%mem = alloca i32
- store i32 2, i32* %mem
- %c = load i32, i32* %mem
+ store i32 2, ptr %mem
+ %c = load i32, ptr %mem
br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
; CHECK: call void @conv()
; CHECK-NOT: call void @conv()
declare void @foo()
-define void @test(i1 %arg) personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
+define void @test(i1 %arg) personality ptr @__gxx_wasm_personality_v0 {
entry:
br label %while.body
%0 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
- %1 = catchpad within %0 [i8* null]
+ %1 = catchpad within %0 [ptr null]
unreachable
cleanup: ; preds = %invoke.cont
; RUN: opt -S -passes=simple-loop-unswitch -verify-memoryssa < %s | FileCheck %s
target triple = "x86_64-pc-win32"
-define void @f(i32 %doit, i1 %x, i1 %y) personality i32 (...)* @__CxxFrameHandler3 {
+define void @f(i32 %doit, i1 %x, i1 %y) personality ptr @__CxxFrameHandler3 {
entry:
%tobool = icmp eq i32 %doit, 0
br label %for.cond
; RUN: opt < %s -passes=simple-loop-unswitch -verify-memoryssa -disable-output
-define void @test1(i32* %S2) {
+define void @test1(ptr %S2) {
entry:
br i1 false, label %list_Length.exit, label %cond_true.i
cond_true.i: ; preds = %entry
cond_next68: ; preds = %bb62
br i1 false, label %return.loopexit, label %bb44
bb78: ; preds = %list_Length.exit9
- %tmp49.not = icmp eq i32* %S2, null ; <i1> [#uses=1]
+ %tmp49.not = icmp eq ptr %S2, null ; <i1> [#uses=1]
br label %bb44
return.loopexit: ; preds = %cond_next68, %bb62
%retval.0.ph = phi i32 [ 1, %cond_next68 ], [ 0, %bb62 ] ; <i32> [#uses=1]
}
; PR6879
-define i32* @test3(i32** %p_45, i16 zeroext %p_46, i64 %p_47, i64 %p_48, i16 signext %p_49) nounwind {
+define ptr @test3(ptr %p_45, i16 zeroext %p_46, i64 %p_47, i64 %p_48, i16 signext %p_49) nounwind {
entry:
br label %for.cond
br label %for.cond
for.end88: ; preds = %for.cond
- ret i32* undef
+ ret ptr undef
}
; CHECK: for.cond:
; CHECK-NEXT: br i1 false, label [[FOR_END:%.*]], label [[FOR_COND]]
; CHECK: for.end:
-; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* null, align 2
+; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr null, align 2
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[TMP0]], 0
; CHECK-NEXT: br i1 [[TMP1]], label [[FOR_END_SPLIT:%.*]], label [[FOR_END_SPLIT_US:%.*]]
; CHECK: for.end.split.us:
; CHECK: g.us:
; CHECK-NEXT: br label [[G_SPLIT_US6:%.*]]
; CHECK: for.cond1.us1:
-; CHECK-NEXT: [[TMP2:%.*]] = load i16, i16* null, align 2
+; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr null, align 2
; CHECK-NEXT: [[TOBOOL4_NOT_US:%.*]] = icmp eq i16 [[TMP2]], 0
; CHECK-NEXT: br i1 [[TOBOOL4_NOT_US]], label [[FOR_COND5_PREHEADER_US4:%.*]], label [[G_LOOPEXIT_US:%.*]]
; CHECK: for.cond5.us2:
; CHECK-NEXT: br i1 false, label [[FOR_COND1_LOOPEXIT_US5:%.*]], label [[FOR_INC_US3:%.*]]
; CHECK: for.inc.us3:
-; CHECK-NEXT: store i8 0, i8* @b, align 1
+; CHECK-NEXT: store i8 0, ptr @b, align 1
; CHECK-NEXT: br label [[FOR_COND5_US2:%.*]]
; CHECK: for.cond5.preheader.us4:
; CHECK-NEXT: br label [[FOR_COND5_US2]]
; CHECK: g.loopexit:
; CHECK-NEXT: br label [[G]], !llvm.loop [[LOOP2:![0-9]+]]
; CHECK: g:
-; CHECK-NEXT: [[TMP3:%.*]] = load i16, i16* null, align 2
+; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr null, align 2
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i16 [[TMP3]], 0
; CHECK-NEXT: br i1 [[TMP4]], label [[G_SPLIT_US:%.*]], label [[G_SPLIT:%.*]]
; CHECK: g.split.us:
; CHECK: for.cond5.us:
; CHECK-NEXT: br i1 false, label [[FOR_COND1_LOOPEXIT_US:%.*]], label [[FOR_INC_US:%.*]]
; CHECK: for.inc.us:
-; CHECK-NEXT: store i8 0, i8* @b, align 1
+; CHECK-NEXT: store i8 0, ptr @b, align 1
; CHECK-NEXT: br label [[FOR_COND5_US:%.*]]
; CHECK: for.cond5.preheader.us:
; CHECK-NEXT: br label [[FOR_COND5_US]]
; CHECK: for.cond1.loopexit:
; CHECK-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP0]]
; CHECK: for.cond1:
-; CHECK-NEXT: [[TMP5:%.*]] = load i16, i16* null, align 2
+; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr null, align 2
; CHECK-NEXT: [[TOBOOL4_NOT:%.*]] = icmp eq i16 [[TMP5]], 0
; CHECK-NEXT: br i1 [[TOBOOL4_NOT]], label [[FOR_COND5_PREHEADER:%.*]], label [[G_LOOPEXIT:%.*]]
; CHECK: for.cond5.preheader:
; CHECK: for.cond5:
; CHECK-NEXT: br i1 false, label [[FOR_COND1_LOOPEXIT:%.*]], label [[FOR_INC:%.*]]
; CHECK: for.inc:
-; CHECK-NEXT: store i8 0, i8* @b, align 1
+; CHECK-NEXT: store i8 0, ptr @b, align 1
; CHECK-NEXT: br label [[FOR_COND5]]
;
entry:
br label %for.cond1
for.cond1: ; preds = %for.cond5, %g
- %0 = load i16, i16* null, align 2
+ %0 = load i16, ptr null, align 2
%tobool4.not = icmp eq i16 %0, 0
br i1 %tobool4.not, label %for.cond5, label %g
br i1 false, label %for.cond1, label %for.inc
for.inc: ; preds = %for.cond5
- store i8 0, i8* @b, align 1
+ store i8 0, ptr @b, align 1
br label %for.cond5
}
; RUN: opt -passes=simple-loop-unswitch -verify-memoryssa -S < %s | FileCheck %s
-define void @f(i32 %n, i32* %ptr) {
+define void @f(i32 %n, ptr %ptr) {
; CHECK-LABEL: @f(
entry:
br label %loop
br i1 %us.29, label %leave, label %be
be:
- store volatile i32 0, i32* %ptr
+ store volatile i32 0, ptr %ptr
%becond = icmp ult i32 %iv.inc, %n
br i1 %becond, label %leave, label %loop
declare void @bar()
-define void @loop_nested3_conds5(i32* %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
+define void @loop_nested3_conds5(ptr %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
entry:
- %addr1 = getelementptr i32, i32* %addr, i64 0
- %addr2 = getelementptr i32, i32* %addr, i64 1
- %addr3 = getelementptr i32, i32* %addr, i64 2
+ %addr2 = getelementptr i32, ptr %addr, i64 1
+ %addr3 = getelementptr i32, ptr %addr, i64 2
br label %outer
outer:
%iv1 = phi i32 [0, %entry], [%iv1.next, %outer_latch]
br label %loop_latch
loop_latch:
- store volatile i32 0, i32* %addr1
+ store volatile i32 0, ptr %addr
%test_loop = icmp slt i32 %iv3, 50
br i1 %test_loop, label %loop, label %middle_latch
middle_latch:
- store volatile i32 0, i32* %addr2
+ store volatile i32 0, ptr %addr2
%test_middle = icmp slt i32 %iv2, 50
br i1 %test_middle, label %middle, label %outer_latch
outer_latch:
- store volatile i32 0, i32* %addr3
+ store volatile i32 0, ptr %addr3
%test_outer = icmp slt i32 %iv1, 50
br i1 %test_outer, label %outer, label %exit
exit:
declare void @bar()
-define void @loop_nested3_conds5(i32* %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
+define void @loop_nested3_conds5(ptr %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
entry:
- %addr1 = getelementptr i32, i32* %addr, i64 0
- %addr2 = getelementptr i32, i32* %addr, i64 1
- %addr3 = getelementptr i32, i32* %addr, i64 2
+ %addr2 = getelementptr i32, ptr %addr, i64 1
+ %addr3 = getelementptr i32, ptr %addr, i64 2
br label %outer
outer:
%iv1 = phi i32 [0, %entry], [%iv1.next, %outer_latch]
br label %loop_latch
loop_latch:
- store volatile i32 0, i32* %addr1
+ store volatile i32 0, ptr %addr
%test_loop = icmp slt i32 %iv3, 50
br i1 %test_loop, label %loop, label %middle_latch
middle_latch:
- store volatile i32 0, i32* %addr2
+ store volatile i32 0, ptr %addr2
%test_middle = icmp slt i32 %iv2, 50
br i1 %test_middle, label %middle, label %outer_latch
outer_latch:
- store volatile i32 0, i32* %addr3
+ store volatile i32 0, ptr %addr3
%test_outer = icmp slt i32 %iv1, 50
br i1 %test_outer, label %outer, label %exit
exit:
; LOOP32-COUNT-32: Loop at depth 1 containing:
; LOOP32-NOT: Loop at depth 1 containing:
-define void @loop_simple5(i32* %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
+define void @loop_simple5(ptr %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
entry:
br label %loop
loop:
loop_latch_right:
br label %loop_latch
loop_latch:
- store volatile i32 0, i32* %addr
+ store volatile i32 0, ptr %addr
%test_loop = icmp slt i32 %iv, 50
br i1 %test_loop, label %loop, label %exit
exit:
declare void @bar()
-define void @loop_simple5(i32* %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
+define void @loop_simple5(ptr %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
entry:
br label %loop
loop:
loop_next4:
br i1 %c5, label %loop_latch, label %exit
loop_latch:
- store volatile i32 0, i32* %addr
+ store volatile i32 0, ptr %addr
%test_loop = icmp slt i32 %iv, 50
br i1 %test_loop, label %loop, label %exit
exit:
; LOOP-MAX-COUNT-111: Loop at depth 2 containing:
; LOOP-MAX-NOT: Loop at depth 2 containing:
-define i32 @loop_switch(i32* %addr, i32 %c1, i32 %c2) {
+define i32 @loop_switch(ptr %addr, i32 %c1, i32 %c2) {
entry:
- %addr1 = getelementptr i32, i32* %addr, i64 0
- %addr2 = getelementptr i32, i32* %addr, i64 1
+ %addr2 = getelementptr i32, ptr %addr, i64 1
%check0 = icmp eq i32 %c2, 0
%check1 = icmp eq i32 %c2, 31
%check2 = icmp eq i32 %c2, 32
br i1 %check0, label %exit, label %inner_latch
inner_latch:
- store volatile i32 0, i32* %addr1
+ store volatile i32 0, ptr %addr
%test_inner = icmp slt i32 %iv2, 50
br i1 %test_inner, label %inner_loop, label %outer_latch
outer_latch:
- store volatile i32 0, i32* %addr2
+ store volatile i32 0, ptr %addr2
%test_outer = icmp slt i32 %iv1, 50
br i1 %test_outer, label %outer_loop, label %exit
; CHECK-LABEL: @test_cleanuppad(
; CHECK: call void (i1, ...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ]
; CHECK-NOT: call void (i1, ...) @llvm.experimental.guard(
-define void @test_cleanuppad(i1 %cond, i32 %N) personality i32 (...)* @__CxxFrameHandler3 {
+define void @test_cleanuppad(i1 %cond, i32 %N) personality ptr @__CxxFrameHandler3 {
entry:
br label %loop
; unswitched because we may exit loop before we reach the condition, so
; there is no guarantee that following implicit branch always means getting
; to throw_npe block.
-define i32 @test_should_drop_make_implicit(i32* %p1, i32* %p2) {
+define i32 @test_should_drop_make_implicit(ptr %p1, ptr %p2) {
; CHECK-LABEL: @test_should_drop_make_implicit(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq i32* [[P2:%.*]], null
+; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq ptr [[P2:%.*]], null
; CHECK-NEXT: [[NULL_CHECK_FR:%.*]] = freeze i1 [[NULL_CHECK]]
; CHECK-NEXT: br i1 [[NULL_CHECK_FR]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_US:%.*]]
; CHECK: loop.us:
; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ]
-; CHECK-NEXT: [[X_US:%.*]] = load i32, i32* [[P1:%.*]], align 4
+; CHECK-NEXT: [[X_US:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[SIDE_EXIT_COND_US:%.*]] = icmp eq i32 [[X_US]], 0
; CHECK-NEXT: br i1 [[SIDE_EXIT_COND_US]], label [[SIDE_EXIT_SPLIT_US:%.*]], label [[NULL_CHECK_BLOCK_US:%.*]]
; CHECK: null_check_block.us:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P1]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P1]], align 4
; CHECK-NEXT: [[SIDE_EXIT_COND:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: br i1 [[SIDE_EXIT_COND]], label [[SIDE_EXIT_SPLIT:%.*]], label [[NULL_CHECK_BLOCK:%.*]]
; CHECK: null_check_block:
; CHECK-NEXT: ret i32 [[X_LCSSA2]]
;
entry:
- %null_check = icmp eq i32* %p2, null
+ %null_check = icmp eq ptr %p2, null
br label %loop
loop:
%iv = phi i32 [0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p1
+ %x = load i32, ptr %p1
%side_exit_cond = icmp eq i32 %x, 0
br i1 %side_exit_cond, label %side_exit, label %null_check_block
; Here make.implicit notion may be preserved because we always get to throw_npe
; after following true branch. This is a trivial unswitch.
-define i32 @test_may_keep_make_implicit_trivial(i32* %p1, i32* %p2) {
+define i32 @test_may_keep_make_implicit_trivial(ptr %p1, ptr %p2) {
; CHECK-LABEL: @test_may_keep_make_implicit_trivial(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq i32* [[P2:%.*]], null
+; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq ptr [[P2:%.*]], null
; CHECK-NEXT: br i1 [[NULL_CHECK]], label [[THROW_NPE:%.*]], label [[ENTRY_SPLIT:%.*]], !make.implicit !0
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P1:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[SIDE_EXIT_COND:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: br label [[SIDE_EXIT_BLOCK:%.*]]
; CHECK: side_exit_block:
; CHECK-NEXT: ret i32 [[X_LCSSA2]]
;
entry:
- %null_check = icmp eq i32* %p2, null
+ %null_check = icmp eq ptr %p2, null
br label %loop
loop:
%iv = phi i32 [0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p1
+ %x = load i32, ptr %p1
%side_exit_cond = icmp eq i32 %x, 0
br i1 %null_check, label %throw_npe, label %side_exit_block, !make.implicit !0
ret i32 %x
}
-define i32 @test_may_keep_make_implicit_non_trivial(i32* %p1, i32* %p2) {
+define i32 @test_may_keep_make_implicit_non_trivial(ptr %p1, ptr %p2) {
; CHECK-LABEL: @test_may_keep_make_implicit_non_trivial(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq i32* [[P2:%.*]], null
+; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq ptr [[P2:%.*]], null
; CHECK-NEXT: br i1 [[NULL_CHECK]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]], !make.implicit !0
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_US:%.*]]
; CHECK: loop.us:
; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ]
-; CHECK-NEXT: [[X_US:%.*]] = load i32, i32* [[P1:%.*]], align 4
+; CHECK-NEXT: [[X_US:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[INNER_BLOCK_COND_US:%.*]] = icmp eq i32 [[X_US]], 0
; CHECK-NEXT: br i1 [[INNER_BLOCK_COND_US]], label [[INNER_BLOCK_US:%.*]], label [[NULL_CHECK_BLOCK_US:%.*]]
; CHECK: inner_block.us:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P1]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P1]], align 4
; CHECK-NEXT: [[INNER_BLOCK_COND:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: br i1 [[INNER_BLOCK_COND]], label [[INNER_BLOCK:%.*]], label [[NULL_CHECK_BLOCK:%.*]]
; CHECK: inner_block:
; CHECK-NEXT: ret i32 [[X_LCSSA1]]
;
entry:
- %null_check = icmp eq i32* %p2, null
+ %null_check = icmp eq ptr %p2, null
br label %loop
loop:
%iv = phi i32 [0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p1
+ %x = load i32, ptr %p1
%inner_block_cond = icmp eq i32 %x, 0
br i1 %inner_block_cond, label %inner_block, label %null_check_block
}
; Here make.implicit notion should be dropped because of exiting call.
-define i32 @test_should_drop_make_implicit_exiting_call(i32* %p1, i32* %p2) {
+define i32 @test_should_drop_make_implicit_exiting_call(ptr %p1, ptr %p2) {
; CHECK-LABEL: @test_should_drop_make_implicit_exiting_call(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq i32* [[P2:%.*]], null
+; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq ptr [[P2:%.*]], null
; CHECK-NEXT: [[NULL_CHECK_FR:%.*]] = freeze i1 [[NULL_CHECK]]
; CHECK-NEXT: br i1 [[NULL_CHECK_FR]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK: loop.us:
; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ]
; CHECK-NEXT: call void @may_exit()
-; CHECK-NEXT: [[X_US:%.*]] = load i32, i32* [[P1:%.*]], align 4
+; CHECK-NEXT: [[X_US:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[SIDE_EXIT_COND_US:%.*]] = icmp eq i32 [[X_US]], 0
; CHECK-NEXT: br label [[THROW_NPE_SPLIT_US:%.*]]
; CHECK: throw_npe.split.us:
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; CHECK-NEXT: call void @may_exit()
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P1]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P1]], align 4
; CHECK-NEXT: [[SIDE_EXIT_COND:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: br label [[BACKEDGE]]
; CHECK: backedge:
; CHECK-NEXT: ret i32 [[X_LCSSA1]]
;
entry:
- %null_check = icmp eq i32* %p2, null
+ %null_check = icmp eq ptr %p2, null
br label %loop
loop:
%iv = phi i32 [0, %entry], [%iv.next, %backedge]
call void @may_exit()
- %x = load i32, i32* %p1
+ %x = load i32, ptr %p1
%side_exit_cond = icmp eq i32 %x, 0
br i1 %null_check, label %throw_npe, label %backedge, !make.implicit !0
}
; Here exiting call goes after the null check, so make.implicit may be preserved.
-define i32 @test_may_keep_make_implicit_exiting_call(i32* %p1, i32* %p2) {
+define i32 @test_may_keep_make_implicit_exiting_call(ptr %p1, ptr %p2) {
; CHECK-LABEL: @test_may_keep_make_implicit_exiting_call(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq i32* [[P2:%.*]], null
+; CHECK-NEXT: [[NULL_CHECK:%.*]] = icmp eq ptr [[P2:%.*]], null
; CHECK-NEXT: br i1 [[NULL_CHECK]], label [[THROW_NPE:%.*]], label [[ENTRY_SPLIT:%.*]], !make.implicit !0
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P1:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[SIDE_EXIT_COND:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: br label [[BACKEDGE]]
; CHECK: backedge:
; CHECK-NEXT: ret i32 [[X_LCSSA1]]
;
entry:
- %null_check = icmp eq i32* %p2, null
+ %null_check = icmp eq ptr %p2, null
br label %loop
loop:
%iv = phi i32 [0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p1
+ %x = load i32, ptr %p1
%side_exit_cond = icmp eq i32 %x, 0
br i1 %null_check, label %throw_npe, label %backedge, !make.implicit !0
; Test that the branch on "y" is inside the loop (after the first unconditional
; branch).
-define void @may_not_execute_trivial(i1* %x) sanitize_memory {
+define void @may_not_execute_trivial(ptr %x) sanitize_memory {
; CHECK-LABEL: @may_not_execute_trivial(
entry:
- %y = load i64, i64* @y, align 8
+ %y = load i64, ptr @y, align 8
%y.cmp = icmp eq i64 %y, 0
br label %for.body
-; CHECK: %[[Y:.*]] = load i64, i64* @y
+; CHECK: %[[Y:.*]] = load i64, ptr @y
; CHECK: %[[YCMP:.*]] = icmp eq i64 %[[Y]], 0
; CHECK-NOT: br i1
; CHECK: br label %for.body
for.body:
%i = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
- %x.load = load i1, i1* %x
+ %x.load = load i1, ptr %x
br i1 %x.load, label %for.inc, label %if.then
-; CHECK: %[[XLOAD:.*]] = load i1, i1* %x
+; CHECK: %[[XLOAD:.*]] = load i1, ptr %x
; CHECK: br i1 %[[XLOAD]]
if.then:
; This shows that it is not enough to suppress hoisting of load instructions,
; the actual problem is in the speculative branching.
-define void @may_not_execute2_trivial(i1* %x, i1 %y) sanitize_memory {
+define void @may_not_execute2_trivial(ptr %x, i1 %y) sanitize_memory {
; CHECK-LABEL: @may_not_execute2_trivial(
entry:
br label %for.body
for.body:
%i = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
- %x.load = load i1, i1* %x
+ %x.load = load i1, ptr %x
br i1 %x.load, label %for.inc, label %if.then
-; CHECK: %[[XLOAD:.*]] = load i1, i1* %x
+; CHECK: %[[XLOAD:.*]] = load i1, ptr %x
; CHECK: br i1 %[[XLOAD]]
if.then:
define void @must_execute_trivial() sanitize_memory {
; CHECK-LABEL: @must_execute_trivial(
entry:
- %y = load i64, i64* @y, align 8
+ %y = load i64, ptr @y, align 8
%y.cmp = icmp eq i64 %y, 0
br label %for.body
-; CHECK: %[[Y:.*]] = load i64, i64* @y
+; CHECK: %[[Y:.*]] = load i64, ptr @y
; CHECK: %[[YCMP:.*]] = icmp eq i64 %[[Y]], 0
; CHECK: br i1 %[[YCMP]], label %[[EXIT_SPLIT:.*]], label %[[PH:.*]]
;
; First establish enough code size in the duplicated 'loop_begin' block to
; suppress unswitching.
-define void @test_no_unswitch(i1* %ptr, i1 %cond) {
+define void @test_no_unswitch(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_no_unswitch(
entry:
br label %loop_begin
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; Now check that the smaller formulation of 'loop_begin' does in fact unswitch
; with our low threshold.
-define void @test_unswitch(i1* %ptr, i1 %cond) {
+define void @test_unswitch(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_latch.us
;
; CHECK: loop_latch.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_latch
;
; CHECK: loop_latch:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split
;
; CHECK: loop_exit.split:
; CHECK-NEXT: br label %loop_exit
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; Check that even with large amounts of code on either side of the unswitched
; branch, if that code would be kept in only one of the unswitched clones it
; doesn't contribute to the cost.
-define void @test_unswitch_non_dup_code(i1* %ptr, i1 %cond) {
+define void @test_unswitch_non_dup_code(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_non_dup_code(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_latch.us
;
; CHECK: loop_latch.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_latch
;
; CHECK: loop_latch:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split
;
; CHECK: loop_exit.split:
; CHECK-NEXT: br label %loop_exit
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; Much like with non-duplicated code directly in the successor, we also won't
; duplicate even interesting CFGs.
-define void @test_unswitch_non_dup_code_in_cfg(i1* %ptr, i1 %cond) {
+define void @test_unswitch_non_dup_code_in_cfg(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_non_dup_code_in_cfg(
entry:
br label %loop_begin
br i1 %cond, label %loop_a, label %loop_b
loop_a:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a_a, label %loop_a_b
loop_a_a:
; CHECK-NEXT: br label %loop_a.us
;
; CHECK: loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a_a.us, label %loop_a_b.us
;
; CHECK: loop_a_b.us:
; CHECK-NEXT: br label %loop_latch.us
;
; CHECK: loop_latch.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_exit
loop_b:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_b_a, label %loop_b_b
loop_b_a:
; CHECK-NEXT: br label %loop_b
;
; CHECK: loop_b:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_b_a, label %loop_b_b
;
; CHECK: loop_b_a:
; CHECK-NEXT: br label %loop_latch
;
; CHECK: loop_latch:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split
;
; CHECK: loop_exit.split:
; CHECK-NEXT: br label %loop_exit
loop_latch:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_begin, label %loop_exit
loop_exit:
; Check that even if there is *some* non-duplicated code on one side of an
; unswitch, we don't count any other code in the loop that will in fact have to
; be duplicated.
-define void @test_no_unswitch_non_dup_code(i1* %ptr, i1 %cond) {
+define void @test_no_unswitch_non_dup_code(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_no_unswitch_non_dup_code(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond, label %loop_a, label %loop_b
loop_a:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a_a, label %loop_a_b
loop_a_a:
br label %loop_latch
loop_b:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_b_a, label %loop_b_b
loop_b_a:
loop_latch:
call void @x()
call void @x()
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; Check that we still unswitch when the exit block contains lots of code, even
; though we do clone the exit block as part of unswitching. This should work
; because we should split the exit block before anything inside it.
-define void @test_unswitch_large_exit(i1* %ptr, i1 %cond) {
+define void @test_unswitch_large_exit(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_large_exit(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_latch.us
;
; CHECK: loop_latch.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_latch
;
; CHECK: loop_latch:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split
;
; CHECK: loop_exit.split:
; CHECK-NEXT: br label %loop_exit
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; Check that we handle a dedicated exit edge unswitch which is still
; non-trivial and has lots of code in the exit.
-define void @test_unswitch_dedicated_exiting(i1* %ptr, i1 %cond) {
+define void @test_unswitch_dedicated_exiting(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_unswitch_dedicated_exiting(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_latch.us
;
; CHECK: loop_latch.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: ret void
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
declare i32 @__CxxFrameHandler3(...)
-define i32 @test1_freeze(i1* %ptr0, i1* %ptr1, i1* %ptr2) {
+define i32 @test1_freeze(ptr %ptr0, ptr %ptr1, ptr %ptr2) {
; CHECK-LABEL: @test1_freeze(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[COND1:%.*]] = load i1, i1* [[PTR1:%.*]], align 1
-; CHECK-NEXT: [[COND2:%.*]] = load i1, i1* [[PTR2:%.*]], align 1
+; CHECK-NEXT: [[COND1:%.*]] = load i1, ptr [[PTR1:%.*]], align 1
+; CHECK-NEXT: [[COND2:%.*]] = load i1, ptr [[PTR2:%.*]], align 1
; CHECK-NEXT: br i1 [[COND1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US:%.*]]
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @a()
; CHECK-NEXT: br label [[LATCH_US:%.*]]
; CHECK: latch.us:
-; CHECK-NEXT: [[V_US:%.*]] = load i1, i1* [[PTR0:%.*]], align 1
+; CHECK-NEXT: [[V_US:%.*]] = load i1, ptr [[PTR0:%.*]], align 1
; CHECK-NEXT: br i1 [[V_US]], label [[LOOP_BEGIN_US]], label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label [[LOOP_EXIT:%.*]]
; CHECK-NEXT: call void @sink3(i1 true)
; CHECK-NEXT: br label [[LATCH_US2:%.*]]
; CHECK: latch.us2:
-; CHECK-NEXT: [[V_US3:%.*]] = load i1, i1* [[PTR0]], align 1
+; CHECK-NEXT: [[V_US3:%.*]] = load i1, ptr [[PTR0]], align 1
; CHECK-NEXT: br i1 [[V_US3]], label [[LOOP_BEGIN_US1]], label [[LOOP_EXIT_SPLIT_SPLIT_US:%.*]]
; CHECK: loop_exit.split.split.us:
; CHECK-NEXT: br label [[LOOP_EXIT_SPLIT:%.*]]
; CHECK-NEXT: call void @sink4(i1 false)
; CHECK-NEXT: br label [[LATCH:%.*]]
; CHECK: latch:
-; CHECK-NEXT: [[V:%.*]] = load i1, i1* [[PTR0]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[PTR0]], align 1
; CHECK-NEXT: br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT_SPLIT_SPLIT:%.*]]
; CHECK: loop_exit.split.split:
; CHECK-NEXT: br label [[LOOP_EXIT_SPLIT]]
; CHECK-NEXT: ret i32 0
;
entry:
- %cond1 = load i1, i1* %ptr1
- %cond2 = load i1, i1* %ptr2
+ %cond1 = load i1, ptr %ptr1
+ %cond2 = load i1, ptr %ptr2
br label %loop_begin
loop_begin:
; %cond2 is replaced to false
latch:
- %v = load i1, i1* %ptr0
+ %v = load i1, ptr %ptr0
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; produces a non-loop clone that can reach multiple exit blocks which are part
; of different outer loops we correctly divide the cloned loop blocks between
; the outer loops based on reachability.
-define i32 @test7a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test7a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test7a(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
; CHECK-NEXT: [[A_PHI:%.*]] = phi i32 [ [[A]], [[LOOP_BEGIN]] ], [ [[A2:%.*]], [[INNER_INNER_LOOP_EXIT:%.*]] ]
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_LOOP_BEGIN_SPLIT_US:%.*]], label [[INNER_LOOP_BEGIN_SPLIT:%.*]]
; CHECK: inner_loop_begin.split.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[INNER_INNER_LOOP_A_US:%.*]], label [[INNER_INNER_LOOP_B_US:%.*]]
; CHECK: inner_inner_loop_b.us:
-; CHECK-NEXT: [[V3_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3_US]], label [[INNER_INNER_LOOP_EXIT_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_C_US_LOOPEXIT:%.*]]
; CHECK: inner_inner_loop_a.us:
; CHECK-NEXT: [[A_PHI_LCSSA10:%.*]] = phi i32 [ [[A_PHI]], [[INNER_INNER_LOOP_BEGIN_US]] ]
; CHECK-NEXT: [[B_LCSSA6:%.*]] = phi i32 [ [[B]], [[INNER_INNER_LOOP_BEGIN_US]] ]
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[LOOP_EXIT_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_C_US:%.*]]
; CHECK: inner_inner_loop_c.us.loopexit:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_C_US]]
; CHECK: inner_inner_loop_c.us:
-; CHECK-NEXT: [[V4_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4_US]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_D_US:%.*]]
; CHECK: inner_inner_loop_d.us:
; CHECK-NEXT: br label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT_US]]
; CHECK: inner_loop_begin.split:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[INNER_INNER_LOOP_A:%.*]], label [[INNER_INNER_LOOP_B:%.*]]
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_EXIT_SPLIT:%.*]], label [[INNER_INNER_LOOP_C:%.*]]
; CHECK: inner_inner_loop_b:
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[INNER_INNER_LOOP_EXIT_SPLIT:%.*]], label [[INNER_INNER_LOOP_C]]
; CHECK: inner_inner_loop_c:
-; CHECK-NEXT: [[V4:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT:%.*]], label [[INNER_INNER_LOOP_D:%.*]]
; CHECK: inner_inner_loop_d:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN]]
; CHECK: inner_inner_loop_exit.split:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_EXIT]]
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: [[A2]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V5:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A2]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V5:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V5]], label [[INNER_LOOP_EXIT_LOOPEXIT1:%.*]], label [[INNER_LOOP_BEGIN]]
; CHECK: inner_loop_exit.loopexit.split:
; CHECK-NEXT: br label [[INNER_LOOP_EXIT_LOOPEXIT]]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %inner_inner_loop_c
inner_inner_loop_b:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_inner_loop_exit, label %inner_inner_loop_c
inner_inner_loop_c:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_inner_loop_d
inner_inner_loop_d:
; The original copy that continues to loop.
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v5 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %inner_loop_exit, label %inner_loop_begin
inner_loop_exit:
; Same pattern as @test7a but here the original loop becomes a non-loop that
; can reach multiple exit blocks which are part of different outer loops.
-define i32 @test7b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test7b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test7b(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
; CHECK-NEXT: [[A_PHI:%.*]] = phi i32 [ [[A]], [[LOOP_BEGIN]] ], [ [[A2:%.*]], [[INNER_INNER_LOOP_EXIT:%.*]] ]
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_LOOP_BEGIN_SPLIT_US:%.*]], label [[INNER_LOOP_BEGIN_SPLIT:%.*]]
; CHECK: inner_loop_begin.split.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[INNER_INNER_LOOP_A_US:%.*]], label [[INNER_INNER_LOOP_B_US:%.*]]
; CHECK: inner_inner_loop_b.us:
-; CHECK-NEXT: [[V3_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3_US]], label [[INNER_INNER_LOOP_EXIT_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_C_US:%.*]]
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[LOOP_EXIT_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_C_US]]
; CHECK: inner_inner_loop_c.us:
-; CHECK-NEXT: [[V4_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4_US]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_D_US:%.*]]
; CHECK: inner_inner_loop_d.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US]]
; CHECK: inner_loop_begin.split:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[INNER_INNER_LOOP_A:%.*]], label [[INNER_INNER_LOOP_B:%.*]]
; CHECK: inner_inner_loop_a:
; CHECK-NEXT: [[A_PHI_LCSSA:%.*]] = phi i32 [ [[A_PHI]], [[INNER_INNER_LOOP_BEGIN]] ]
; CHECK-NEXT: [[B_LCSSA3:%.*]] = phi i32 [ [[B]], [[INNER_INNER_LOOP_BEGIN]] ]
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_EXIT_SPLIT:%.*]], label [[INNER_INNER_LOOP_C:%.*]]
; CHECK: inner_inner_loop_b:
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[INNER_INNER_LOOP_EXIT_SPLIT:%.*]], label [[INNER_INNER_LOOP_C_LOOPEXIT:%.*]]
; CHECK: inner_inner_loop_c.loopexit:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_C]]
; CHECK: inner_inner_loop_c:
-; CHECK-NEXT: [[V4:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT:%.*]], label [[INNER_INNER_LOOP_D:%.*]]
; CHECK: inner_inner_loop_d:
; CHECK-NEXT: br label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT]]
; CHECK: inner_inner_loop_exit.split:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_EXIT]]
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: [[A2]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V5:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A2]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V5:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V5]], label [[INNER_LOOP_EXIT_LOOPEXIT1:%.*]], label [[INNER_LOOP_BEGIN]]
; CHECK: inner_loop_exit.loopexit.split:
; CHECK-NEXT: br label [[INNER_LOOP_EXIT_LOOPEXIT]]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %inner_inner_loop_c
inner_inner_loop_b:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_inner_loop_exit, label %inner_inner_loop_c
inner_inner_loop_c:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_inner_loop_d
inner_inner_loop_d:
; blocks.
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v5 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %inner_loop_exit, label %inner_loop_begin
inner_loop_exit:
; Test that when the exit block set of an inner loop changes to start at a less
; high level of the loop nest we correctly hoist the loop up the nest.
-define i32 @test8a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test8a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test8a(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
; CHECK-NEXT: [[A_PHI:%.*]] = phi i32 [ [[A]], [[LOOP_BEGIN]] ], [ [[A2:%.*]], [[INNER_INNER_LOOP_EXIT:%.*]] ]
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_LOOP_BEGIN_SPLIT_US:%.*]], label [[INNER_LOOP_BEGIN_SPLIT:%.*]]
; CHECK: inner_loop_begin.split.us:
; CHECK-NEXT: [[A_PHI_LCSSA4:%.*]] = phi i32 [ [[A_PHI]], [[INNER_LOOP_BEGIN]] ]
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[INNER_INNER_LOOP_A_US:%.*]], label [[INNER_INNER_LOOP_B_US:%.*]]
; CHECK: inner_inner_loop_b.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_LATCH_US:%.*]]
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[INNER_INNER_LOOP_LATCH_US]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT_US:%.*]]
; CHECK: inner_inner_loop_latch.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US]]
; CHECK: inner_loop_begin.split:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[INNER_INNER_LOOP_A:%.*]], label [[INNER_INNER_LOOP_B:%.*]]
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[INNER_INNER_LOOP_LATCH:%.*]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT:%.*]]
; CHECK: inner_inner_loop_b:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_EXIT]]
; CHECK: inner_inner_loop_latch:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN]]
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: [[A2]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V4:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A2]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V4:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4]], label [[INNER_LOOP_EXIT_LOOPEXIT1:%.*]], label [[INNER_LOOP_BEGIN]]
; CHECK: inner_loop_exit.loopexit.split:
; CHECK-NEXT: [[A_PHI_LCSSA2:%.*]] = phi i32 [ [[A_PHI]], [[INNER_INNER_LOOP_A]] ]
; CHECK-NEXT: br label [[INNER_LOOP_EXIT]]
; CHECK: inner_loop_exit:
; CHECK-NEXT: [[A_PHI3:%.*]] = phi i32 [ [[A_PHI_LCSSA]], [[INNER_LOOP_EXIT_LOOPEXIT1]] ], [ [[DOTUS_PHI]], [[INNER_LOOP_EXIT_LOOPEXIT]] ]
-; CHECK-NEXT: [[V5:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V5:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V5]], label [[LOOP_EXIT:%.*]], label [[LOOP_BEGIN]]
; CHECK: loop_exit:
; CHECK-NEXT: [[A_LCSSA:%.*]] = phi i32 [ [[A_PHI3]], [[INNER_LOOP_EXIT]] ]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_latch, label %inner_loop_exit
inner_inner_loop_b:
; The original region exits the loop earlier.
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v4 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_loop_begin
inner_loop_exit:
- %v5 = load i1, i1* %ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %loop_exit, label %loop_begin
loop_exit:
; Same pattern as @test8a but where the original loop looses an exit block and
; needs to be hoisted up the nest.
-define i32 @test8b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test8b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test8b(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
; CHECK-NEXT: [[A_PHI:%.*]] = phi i32 [ [[A]], [[LOOP_BEGIN]] ], [ [[A2:%.*]], [[INNER_INNER_LOOP_EXIT:%.*]] ]
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_LOOP_BEGIN_SPLIT_US:%.*]], label [[INNER_LOOP_BEGIN_SPLIT:%.*]]
; CHECK: inner_loop_begin.split.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[INNER_INNER_LOOP_A_US:%.*]], label [[INNER_INNER_LOOP_B_US:%.*]]
; CHECK: inner_inner_loop_b.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[INNER_INNER_LOOP_LATCH_US:%.*]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT_US:%.*]]
; CHECK: inner_inner_loop_latch.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US]]
; CHECK-NEXT: [[A_PHI_LCSSA4:%.*]] = phi i32 [ [[A_PHI]], [[INNER_LOOP_BEGIN]] ]
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[INNER_INNER_LOOP_A:%.*]], label [[INNER_INNER_LOOP_B:%.*]]
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[INNER_INNER_LOOP_LATCH:%.*]], label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT:%.*]]
; CHECK: inner_inner_loop_b:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_LATCH]]
; CHECK: inner_inner_loop_latch:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN]]
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: [[A2]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V4:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A2]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V4:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4]], label [[INNER_LOOP_EXIT_LOOPEXIT1:%.*]], label [[INNER_LOOP_BEGIN]]
; CHECK: inner_loop_exit.loopexit.split:
; CHECK-NEXT: [[A_PHI_LCSSA2:%.*]] = phi i32 [ [[A_PHI_LCSSA4]], [[INNER_INNER_LOOP_A]] ]
; CHECK-NEXT: br label [[INNER_LOOP_EXIT]]
; CHECK: inner_loop_exit:
; CHECK-NEXT: [[A_PHI3:%.*]] = phi i32 [ [[A_PHI_LCSSA]], [[INNER_LOOP_EXIT_LOOPEXIT1]] ], [ [[DOTUS_PHI]], [[INNER_LOOP_EXIT_LOOPEXIT]] ]
-; CHECK-NEXT: [[V5:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V5:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V5]], label [[LOOP_EXIT:%.*]], label [[LOOP_BEGIN]]
; CHECK: loop_exit:
; CHECK-NEXT: [[A_LCSSA:%.*]] = phi i32 [ [[A_PHI3]], [[INNER_LOOP_EXIT]] ]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_latch, label %inner_loop_exit
inner_inner_loop_b:
; The original region is now an exit in the preheader.
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v4 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_loop_begin
inner_loop_exit:
- %v5 = load i1, i1* %ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %loop_exit, label %loop_begin
loop_exit:
}
; Test that requires re-forming dedicated exits for the cloned loop.
-define i32 @test10a(i1* %ptr, i1 %cond, i32* %a.ptr) {
+define i32 @test10a(ptr %ptr, i1 %cond, ptr %a.ptr) {
; CHECK-LABEL: @test10a(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US:%.*]]
; CHECK: loop_begin.us:
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[LOOP_A_US:%.*]], label [[LOOP_B_US:%.*]]
; CHECK: loop_b.us:
; CHECK-NEXT: [[A_US_LCSSA:%.*]] = phi i32 [ [[A_US]], [[LOOP_BEGIN_US]] ]
; CHECK-NEXT: br label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[LOOP_EXIT_SPLIT_US_LOOPEXIT:%.*]], label [[LOOP_BEGIN_BACKEDGE_US:%.*]]
; CHECK: loop_begin.backedge.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US]]
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_A:%.*]], label [[LOOP_B:%.*]]
; CHECK: loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_EXIT_SPLIT:%.*]], label [[LOOP_BEGIN_BACKEDGE:%.*]]
; CHECK: loop_begin.backedge:
; CHECK-NEXT: br label [[LOOP_BEGIN]]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %loop_begin
loop_b:
}
; Test that requires re-forming dedicated exits for the original loop.
-define i32 @test10b(i1* %ptr, i1 %cond, i32* %a.ptr) {
+define i32 @test10b(ptr %ptr, i1 %cond, ptr %a.ptr) {
; CHECK-LABEL: @test10b(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US:%.*]]
; CHECK: loop_begin.us:
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[LOOP_A_US:%.*]], label [[LOOP_B_US:%.*]]
; CHECK: loop_b.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_BACKEDGE_US:%.*]]
; CHECK: loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[LOOP_BEGIN_BACKEDGE_US]], label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_begin.backedge.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US]]
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_A:%.*]], label [[LOOP_B:%.*]]
; CHECK: loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_BEGIN_BACKEDGE:%.*]], label [[LOOP_EXIT_SPLIT_LOOPEXIT:%.*]]
; CHECK: loop_begin.backedge:
; CHECK-NEXT: br label [[LOOP_BEGIN]]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_begin, label %loop_exit
loop_b:
; exits even an outer loop, we don't add the cloned preheader to the outer
; loop and do add the needed LCSSA phi nodes for the new exit block from the
; outer loop.
-define i32 @test11a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test11a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test11a(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_LATCH:%.*]], label [[INNER_LOOP_PH:%.*]]
; CHECK: inner_loop_ph:
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_LOOP_PH_SPLIT_US:%.*]], label [[INNER_LOOP_PH_SPLIT:%.*]]
; CHECK: inner_loop_ph.split.us:
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 [[B_LCSSA]])
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXIT_SPLIT_US:%.*]]
; CHECK: loop_exit.loopexit.split.us:
; CHECK-NEXT: [[A_LCSSA2_US:%.*]] = phi i32 [ [[A_US]], [[INNER_LOOP_BEGIN_US]] ]
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 [[B]])
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_A:%.*]]
; CHECK: inner_loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[INNER_LOOP_EXIT:%.*]], label [[INNER_LOOP_BEGIN]]
; CHECK: inner_loop_exit:
; CHECK-NEXT: [[A_INNER_LCSSA:%.*]] = phi i32 [ [[A]], [[INNER_LOOP_A]] ]
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[LOOP_LATCH]], label [[LOOP_EXIT_LOOPEXIT1:%.*]]
; CHECK: loop_latch:
; CHECK-NEXT: br label [[LOOP_BEGIN]]
br label %loop_begin
loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_latch, label %inner_loop_ph
inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_loop_begin
inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %loop_exit, label %inner_loop_a
inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_loop_exit, label %inner_loop_begin
; The cloned path doesn't actually loop and is an exit from the outer loop as
; well.
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_latch, label %loop_exit
loop_latch:
; directly exits even an outer loop, we remove the original preheader from the
; outer loop and add needed LCSSA phi nodes for the new exit block from the
; outer loop.
-define i32 @test11b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test11b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test11b(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_LATCH:%.*]], label [[INNER_LOOP_PH:%.*]]
; CHECK: inner_loop_ph:
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_LOOP_PH_SPLIT_US:%.*]], label [[INNER_LOOP_PH_SPLIT:%.*]]
; CHECK: inner_loop_ph.split.us:
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 [[B]])
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_A_US:%.*]]
; CHECK: inner_loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[INNER_LOOP_EXIT_SPLIT_US:%.*]], label [[INNER_LOOP_BEGIN_US]]
; CHECK: inner_loop_exit.split.us:
; CHECK-NEXT: [[A_INNER_LCSSA_US:%.*]] = phi i32 [ [[A_US]], [[INNER_LOOP_A_US]] ]
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 [[B_LCSSA]])
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXIT:%.*]]
; CHECK: inner_loop_exit:
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[LOOP_LATCH]], label [[LOOP_EXIT_LOOPEXIT1:%.*]]
; CHECK: loop_latch:
; CHECK-NEXT: br label [[LOOP_BEGIN]]
br label %loop_begin
loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_latch, label %inner_loop_ph
inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_loop_begin
inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_loop_a, label %loop_exit
inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_loop_exit, label %inner_loop_begin
; The cloned path continues to loop without the exit out of the entire nest.
; The original remains a loop losing the exit edge.
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_latch, label %loop_exit
loop_latch:
; another loop, we correctly attribute the cloned preheader to that outermost
; loop rather than only handling the case where the preheader is not in any loop
; at all.
-define i32 @test12a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test12a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test12a(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[INNER_LOOP_LATCH:%.*]], label [[INNER_INNER_LOOP_PH:%.*]]
; CHECK: inner_inner_loop_ph:
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_INNER_LOOP_PH_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_PH_SPLIT:%.*]]
; CHECK: inner_inner_loop_ph.split.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 [[B_LCSSA]])
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_EXIT_LOOPEXIT_SPLIT_US:%.*]]
; CHECK: inner_loop_exit.loopexit.split.us:
; CHECK-NEXT: [[A_LCSSA2_US:%.*]] = phi i32 [ [[A_US]], [[INNER_INNER_LOOP_BEGIN_US]] ]
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 [[B]])
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
; CHECK-NEXT: br label [[INNER_INNER_LOOP_A:%.*]]
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[INNER_INNER_LOOP_EXIT:%.*]], label [[INNER_INNER_LOOP_BEGIN]]
; CHECK: inner_inner_loop_exit:
; CHECK-NEXT: [[A_INNER_INNER_LCSSA:%.*]] = phi i32 [ [[A]], [[INNER_INNER_LOOP_A]] ]
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[INNER_LOOP_LATCH]], label [[INNER_LOOP_EXIT_LOOPEXIT1:%.*]]
; CHECK: inner_loop_latch:
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN]]
; CHECK-NEXT: br label [[INNER_LOOP_EXIT]]
; CHECK: inner_loop_exit:
; CHECK-NEXT: [[A_INNER_LCSSA:%.*]] = phi i32 [ [[A_LCSSA2_US]], [[INNER_LOOP_EXIT_LOOPEXIT]] ], [ [[A_INNER_INNER_LCSSA_LCSSA]], [[INNER_LOOP_EXIT_LOOPEXIT1]] ]
-; CHECK-NEXT: [[V4:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: [[A_LCSSA:%.*]] = phi i32 [ [[A_INNER_LCSSA]], [[INNER_LOOP_EXIT]] ]
br label %inner_loop_begin
inner_loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_loop_latch, label %inner_inner_loop_ph
inner_inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_inner_loop_begin
inner_inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_loop_exit, label %inner_inner_loop_a
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_exit, label %inner_inner_loop_begin
; The cloned path doesn't actually loop and is an exit from the outer loop as
; well.
inner_inner_loop_exit:
%a.inner_inner_lcssa = phi i32 [ %a, %inner_inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_loop_latch, label %inner_loop_exit
inner_loop_latch:
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_inner_loop_begin ], [ %a.inner_inner_lcssa, %inner_inner_loop_exit ]
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_begin, label %loop_exit
loop_exit:
; another loop, we correctly sink the preheader to the outermost loop rather
; than only handling the case where the preheader is completely removed from
; a loop.
-define i32 @test12b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test12b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test12b(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_loop_begin:
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[INNER_LOOP_LATCH:%.*]], label [[INNER_INNER_LOOP_PH:%.*]]
; CHECK: inner_inner_loop_ph:
-; CHECK-NEXT: [[COND:%.*]] = load i1, i1* [[COND_PTR:%.*]], align 1
+; CHECK-NEXT: [[COND:%.*]] = load i1, ptr [[COND_PTR:%.*]], align 1
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND]]
; CHECK-NEXT: br i1 [[COND_FR]], label [[INNER_INNER_LOOP_PH_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_PH_SPLIT:%.*]]
; CHECK: inner_inner_loop_ph.split.us:
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN_US:%.*]]
; CHECK: inner_inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 [[B]])
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
; CHECK-NEXT: br label [[INNER_INNER_LOOP_A_US:%.*]]
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[INNER_INNER_LOOP_EXIT_SPLIT_US:%.*]], label [[INNER_INNER_LOOP_BEGIN_US]]
; CHECK: inner_inner_loop_exit.split.us:
; CHECK-NEXT: [[A_INNER_INNER_LCSSA_US:%.*]] = phi i32 [ [[A_US]], [[INNER_INNER_LOOP_A_US]] ]
; CHECK-NEXT: br label [[INNER_INNER_LOOP_BEGIN:%.*]]
; CHECK: inner_inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 [[B_LCSSA]])
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
; CHECK-NEXT: br label [[INNER_LOOP_EXIT_LOOPEXIT:%.*]]
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[INNER_LOOP_LATCH]], label [[INNER_LOOP_EXIT_LOOPEXIT1:%.*]]
; CHECK: inner_loop_latch:
; CHECK-NEXT: br label [[INNER_LOOP_BEGIN]]
; CHECK-NEXT: br label [[INNER_LOOP_EXIT]]
; CHECK: inner_loop_exit:
; CHECK-NEXT: [[A_INNER_LCSSA:%.*]] = phi i32 [ [[A_LCSSA2]], [[INNER_LOOP_EXIT_LOOPEXIT]] ], [ [[A_INNER_INNER_LCSSA_LCSSA]], [[INNER_LOOP_EXIT_LOOPEXIT1]] ]
-; CHECK-NEXT: [[V4:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
; CHECK: loop_exit:
; CHECK-NEXT: [[A_LCSSA:%.*]] = phi i32 [ [[A_INNER_LCSSA]], [[INNER_LOOP_EXIT]] ]
br label %inner_loop_begin
inner_loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_loop_latch, label %inner_inner_loop_ph
inner_inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_inner_loop_begin
inner_inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_inner_loop_a, label %inner_loop_exit
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_exit, label %inner_inner_loop_begin
; The cloned path continues to loop without the exit out of the entire nest.
; The original remains a loop losing the exit edge.
inner_inner_loop_exit:
%a.inner_inner_lcssa = phi i32 [ %a, %inner_inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_loop_latch, label %inner_loop_exit
inner_loop_latch:
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_inner_loop_begin ], [ %a.inner_inner_lcssa, %inner_inner_loop_exit ]
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_begin, label %loop_exit
loop_exit:
; exiting block that connects the inner loop to the cloned loop is not the header
; block. This ensures that we correctly handle interesting corner cases of
; traversing back to the header when establishing the cloned loop.
-define i32 @test13a(i1* %ptr, i1 %cond, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test13a(ptr %ptr, i1 %cond, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test13a(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US:%.*]]
; CHECK: loop_begin.us:
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[LOOP_A_US:%.*]], label [[LOOP_B_US:%.*]]
; CHECK: loop_b.us:
-; CHECK-NEXT: [[B_US:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[B_US:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP_B_INNER_PH_US:%.*]]
; CHECK: loop_b_inner_ph.us:
; CHECK-NEXT: br label [[LOOP_B_INNER_HEADER_US:%.*]]
; CHECK: loop_b_inner_header.us:
-; CHECK-NEXT: [[V3_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3_US]], label [[LOOP_B_INNER_LATCH_US:%.*]], label [[LOOP_B_INNER_BODY_US:%.*]]
; CHECK: loop_b_inner_body.us:
-; CHECK-NEXT: [[V4_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4_US]], label [[LOOP_B_INNER_LATCH_US]], label [[LOOP_B_INNER_EXIT_US:%.*]]
; CHECK: loop_b_inner_exit.us:
; CHECK-NEXT: br label [[LOOP_LATCH_US:%.*]]
; CHECK: loop_b_inner_latch.us:
; CHECK-NEXT: br label [[LOOP_B_INNER_HEADER_US]]
; CHECK: loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[LOOP_EXIT_SPLIT_US:%.*]], label [[LOOP_LATCH_US]]
; CHECK: loop_latch.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US]]
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_A:%.*]], label [[LOOP_B:%.*]]
; CHECK: loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_EXIT_SPLIT_LOOPEXIT:%.*]], label [[LOOP_LATCH:%.*]]
; CHECK: loop_b:
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR]], align 4
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR]], align 4
; CHECK-NEXT: br label [[LOOP_EXIT_SPLIT:%.*]]
; CHECK: loop_latch:
; CHECK-NEXT: br label [[LOOP_BEGIN]]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %loop_latch
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %cond, label %loop_b_inner_ph, label %loop_exit
loop_b_inner_ph:
br label %loop_b_inner_header
loop_b_inner_header:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_b_inner_latch, label %loop_b_inner_body
loop_b_inner_body:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_b_inner_latch, label %loop_b_inner_exit
loop_b_inner_latch:
; the header block. This ensures that we correctly handle interesting corner
; cases of traversing back to the header when re-establishing the original loop
; still exists after unswitching.
-define i32 @test13b(i1* %ptr, i1 %cond, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test13b(ptr %ptr, i1 %cond, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test13b(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[COND:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US:%.*]]
; CHECK: loop_begin.us:
-; CHECK-NEXT: [[A_US:%.*]] = load i32, i32* [[A_PTR:%.*]], align 4
-; CHECK-NEXT: [[V1_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[A_US:%.*]] = load i32, ptr [[A_PTR:%.*]], align 4
+; CHECK-NEXT: [[V1_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[V1_US]], label [[LOOP_A_US:%.*]], label [[LOOP_B_US:%.*]]
; CHECK: loop_b.us:
-; CHECK-NEXT: [[B_US:%.*]] = load i32, i32* [[B_PTR:%.*]], align 4
+; CHECK-NEXT: [[B_US:%.*]] = load i32, ptr [[B_PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP_EXIT_SPLIT_US:%.*]]
; CHECK: loop_a.us:
-; CHECK-NEXT: [[V2_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2_US]], label [[LOOP_EXIT_SPLIT_US_LOOPEXIT:%.*]], label [[LOOP_LATCH_US:%.*]]
; CHECK: loop_latch.us:
; CHECK-NEXT: br label [[LOOP_BEGIN_US]]
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_PTR]], align 4
-; CHECK-NEXT: [[V1:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_PTR]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V1]], label [[LOOP_A:%.*]], label [[LOOP_B:%.*]]
; CHECK: loop_a:
-; CHECK-NEXT: [[V2:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V2:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V2]], label [[LOOP_EXIT_SPLIT:%.*]], label [[LOOP_LATCH:%.*]]
; CHECK: loop_b:
-; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_PTR]], align 4
+; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_PTR]], align 4
; CHECK-NEXT: br label [[LOOP_B_INNER_PH:%.*]]
; CHECK: loop_b_inner_ph:
; CHECK-NEXT: br label [[LOOP_B_INNER_HEADER:%.*]]
; CHECK: loop_b_inner_header:
-; CHECK-NEXT: [[V3:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V3:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V3]], label [[LOOP_B_INNER_LATCH:%.*]], label [[LOOP_B_INNER_BODY:%.*]]
; CHECK: loop_b_inner_body:
-; CHECK-NEXT: [[V4:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[V4:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[V4]], label [[LOOP_B_INNER_LATCH]], label [[LOOP_B_INNER_EXIT:%.*]]
; CHECK: loop_b_inner_latch:
; CHECK-NEXT: br label [[LOOP_B_INNER_HEADER]]
br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %loop_latch
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %cond, label %loop_exit, label %loop_b_inner_ph
loop_b_inner_ph:
br label %loop_b_inner_header
loop_b_inner_header:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_b_inner_latch, label %loop_b_inner_body
loop_b_inner_body:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_b_inner_latch, label %loop_b_inner_exit
loop_b_inner_latch:
; skip whole subregions of the outer loop blocks but just because the header of
; the outer loop is also the preheader of an inner loop shouldn't confuse this
; walk.
-define void @test23(i1 %arg, i1* %ptr) {
+define void @test23(i1 %arg, ptr %ptr) {
; CHECK-LABEL: @test23(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i1 [[ARG:%.*]]
; CHECK-NEXT: call void @f()
; CHECK-NEXT: br label [[INNER_LATCH_US:%.*]]
; CHECK: inner.latch.us:
-; CHECK-NEXT: [[INNER_COND_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT: [[INNER_COND_US:%.*]] = load i1, ptr [[PTR:%.*]], align 1
; CHECK-NEXT: br i1 [[INNER_COND_US]], label [[INNER_HEADER_US]], label [[OUTER_BODY_US:%.*]]
; CHECK: outer.body.us:
; CHECK-NEXT: br label [[OUTER_BODY_LEFT_US:%.*]]
; CHECK-NEXT: call void @f()
; CHECK-NEXT: br label [[OUTER_LATCH_US:%.*]]
; CHECK: outer.latch.us:
-; CHECK-NEXT: [[OUTER_COND_US:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[OUTER_COND_US:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[OUTER_COND_US]], label [[OUTER_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
; CHECK: exit.split.us:
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK-NEXT: call void @f()
; CHECK-NEXT: br label [[INNER_LATCH:%.*]]
; CHECK: inner.latch:
-; CHECK-NEXT: [[INNER_COND:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[INNER_COND:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[INNER_COND]], label [[INNER_HEADER]], label [[OUTER_BODY:%.*]]
; CHECK: outer.body:
; CHECK-NEXT: br label [[OUTER_BODY_RIGHT:%.*]]
; CHECK-NEXT: call void @g()
; CHECK-NEXT: br label [[OUTER_LATCH:%.*]]
; CHECK: outer.latch:
-; CHECK-NEXT: [[OUTER_COND:%.*]] = load i1, i1* [[PTR]], align 1
+; CHECK-NEXT: [[OUTER_COND:%.*]] = load i1, ptr [[PTR]], align 1
; CHECK-NEXT: br i1 [[OUTER_COND]], label [[OUTER_HEADER]], label [[EXIT_SPLIT:%.*]]
; CHECK: exit.split:
; CHECK-NEXT: br label [[EXIT]]
br label %inner.latch
inner.latch:
- %inner.cond = load i1, i1* %ptr
+ %inner.cond = load i1, ptr %ptr
br i1 %inner.cond, label %inner.header, label %outer.body
outer.body:
br label %outer.latch
outer.latch:
- %outer.cond = load i1, i1* %ptr
+ %outer.cond = load i1, ptr %ptr
br i1 %outer.cond, label %outer.header, label %exit
exit:
; A < B < C
; into
; A < (B, C)
-define void @hoist_inner_loop1(i32* %ptr) {
+define void @hoist_inner_loop1(ptr %ptr) {
; CHECK-LABEL: @hoist_inner_loop1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[A_HEADER:%.*]]
; CHECK: a.header:
-; CHECK-NEXT: [[X_A:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[X_A:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[B_HEADER:%.*]]
; CHECK: b.header:
-; CHECK-NEXT: [[X_B:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[X_B:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[V1:%.*]] = call i1 @cond()
; CHECK-NEXT: [[V1_FR:%.*]] = freeze i1 [[V1]]
; CHECK-NEXT: br i1 [[V1_FR]], label [[B_HEADER_SPLIT_US:%.*]], label [[B_HEADER_SPLIT:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @c()
; CHECK-NEXT: br label [[C_LATCH:%.*]]
; CHECK: c.latch:
-; CHECK-NEXT: store i32 [[X_A]], i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 [[X_B_LCSSA]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_A]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_B_LCSSA]], ptr [[PTR]], align 4
; CHECK-NEXT: [[V2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[V2]], label [[C_HEADER]], label [[A_EXIT_C:%.*]]
; CHECK: b.latch:
br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %a.exit.c
; A < B < C
; into
; (A < B), C
-define void @hoist_inner_loop2(i32* %ptr) {
+define void @hoist_inner_loop2(ptr %ptr) {
; CHECK-LABEL: @hoist_inner_loop2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[A_HEADER:%.*]]
; CHECK: a.header:
-; CHECK-NEXT: [[X_A:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[X_A:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[B_HEADER:%.*]]
; CHECK: b.header:
-; CHECK-NEXT: [[X_B:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[X_B:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[V1:%.*]] = call i1 @cond()
; CHECK-NEXT: [[V1_FR:%.*]] = freeze i1 [[V1]]
; CHECK-NEXT: br i1 [[V1_FR]], label [[B_HEADER_SPLIT_US:%.*]], label [[B_HEADER_SPLIT:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @c()
; CHECK-NEXT: br label [[C_LATCH:%.*]]
; CHECK: c.latch:
-; CHECK-NEXT: store i32 [[X_A_LCSSA]], i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 [[X_B_LCSSA]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_A_LCSSA]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_B_LCSSA]], ptr [[PTR]], align 4
; CHECK-NEXT: [[V2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[V2]], label [[C_HEADER]], label [[EXIT:%.*]]
; CHECK: b.latch:
br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %exit
; A < B < C < D
; into
; (A < B), (C < D)
-define void @hoist_inner_loop3(i32* %ptr) {
+define void @hoist_inner_loop3(ptr %ptr) {
; CHECK-LABEL: @hoist_inner_loop3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[A_HEADER:%.*]]
; CHECK: a.header:
-; CHECK-NEXT: [[X_A:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[X_A:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[B_HEADER:%.*]]
; CHECK: b.header:
-; CHECK-NEXT: [[X_B:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[X_B:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[V1:%.*]] = call i1 @cond()
; CHECK-NEXT: [[V1_FR:%.*]] = freeze i1 [[V1]]
; CHECK-NEXT: br i1 [[V1_FR]], label [[B_HEADER_SPLIT_US:%.*]], label [[B_HEADER_SPLIT:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @c()
; CHECK-NEXT: br label [[C_BODY:%.*]]
; CHECK: c.body:
-; CHECK-NEXT: [[X_C:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[X_C:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[D_HEADER:%.*]]
; CHECK: d.header:
-; CHECK-NEXT: store i32 [[X_A_LCSSA]], i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 [[X_B_LCSSA]], i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 [[X_C]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_A_LCSSA]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_B_LCSSA]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_C]], ptr [[PTR]], align 4
; CHECK-NEXT: [[V2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[V2]], label [[D_HEADER]], label [[C_LATCH:%.*]]
; CHECK: c.latch:
br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
br i1 %v1, label %b.latch, label %c.body
c.body:
- %x.c = load i32, i32* %ptr
+ %x.c = load i32, ptr %ptr
br label %d.header
d.header:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
- store i32 %x.c, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
+ store i32 %x.c, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %d.header, label %c.latch
; A < B < C < D
; into
; A < ((B < C), D)
-define void @hoist_inner_loop5(i32* %ptr) {
+define void @hoist_inner_loop5(ptr %ptr) {
; CHECK-LABEL: @hoist_inner_loop5(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[A_HEADER:%.*]]
; CHECK: a.header:
-; CHECK-NEXT: [[X_A:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[X_A:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[B_HEADER:%.*]]
; CHECK: b.header:
-; CHECK-NEXT: [[X_B:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[X_B:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[C_HEADER:%.*]]
; CHECK: c.header:
-; CHECK-NEXT: [[X_C:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[X_C:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[V1:%.*]] = call i1 @cond()
; CHECK-NEXT: [[V1_FR:%.*]] = freeze i1 [[V1]]
; CHECK-NEXT: br i1 [[V1_FR]], label [[C_HEADER_SPLIT_US:%.*]], label [[C_HEADER_SPLIT:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @d()
; CHECK-NEXT: br label [[D_LATCH:%.*]]
; CHECK: d.latch:
-; CHECK-NEXT: store i32 [[X_A]], i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 [[X_B_LCSSA]], i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 [[X_C_LCSSA]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_A]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_B_LCSSA]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_C_LCSSA]], ptr [[PTR]], align 4
; CHECK-NEXT: [[V2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[V2]], label [[D_HEADER]], label [[A_LATCH:%.*]]
; CHECK: c.latch:
br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
br label %c.header
c.header:
- %x.c = load i32, i32* %ptr
+ %x.c = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %d.header
d.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
- store i32 %x.c, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
+ store i32 %x.c, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %d.header, label %a.latch
ret void
}
-define void @hoist_inner_loop_switch(i32* %ptr) {
+define void @hoist_inner_loop_switch(ptr %ptr) {
; CHECK-LABEL: @hoist_inner_loop_switch(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[A_HEADER:%.*]]
; CHECK: a.header:
-; CHECK-NEXT: [[X_A:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[X_A:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[B_HEADER:%.*]]
; CHECK: b.header:
-; CHECK-NEXT: [[X_B:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[X_B:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[V1:%.*]] = call i32 @cond.i32()
; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]]
; CHECK-NEXT: switch i32 [[V1_FR]], label [[B_HEADER_SPLIT:%.*]] [
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @c()
; CHECK-NEXT: br label [[C_LATCH:%.*]]
; CHECK: c.latch:
-; CHECK-NEXT: store i32 [[X_A_LCSSA]], i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 [[X_B_LCSSA]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_A_LCSSA]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 [[X_B_LCSSA]], ptr [[PTR]], align 4
; CHECK-NEXT: [[V2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[V2]], label [[C_HEADER]], label [[EXIT:%.*]]
; CHECK: b.latch:
br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i32 @cond.i32()
br label %c.header
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %exit
; CHECK-NEXT: Running analysis: LoopAccessAnalysis on test6
-define i32 @test6(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test6(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
entry:
br label %loop_begin
loop_begin:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %cond1, label %loop_a, label %loop_b
loop_a:
br label %loop_a_inner
loop_a_inner:
- %va = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %va = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %va, label %loop_a_inner, label %loop_a_inner_exit
loop_a_inner_exit:
br label %loop_b_inner
loop_b_inner:
- %vb = load i1, i1* %ptr
- %b = load i32, i32* %b.ptr
+ %vb = load i1, ptr %ptr
+ %b = load i32, ptr %b.ptr
br i1 %vb, label %loop_b_inner, label %loop_b_inner_exit
loop_b_inner_exit:
; RUN: opt -passes='loop-mssa(simple-loop-unswitch<nontrivial>)' -disable-output -S < %s
; This loop shouldn't trigger asserts in SimpleLoopUnswitch.
-define void @test_redundant_switch(i1* %ptr, i32 %cond) {
+define void @test_redundant_switch(ptr %ptr, i32 %cond) {
entry:
br label %loop_begin
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
declare i32 @cond.i32()
; Negative test: we cannot unswitch convergent calls.
-define void @test_no_unswitch_convergent(i1* %ptr, i1 %cond) {
+define void @test_no_unswitch_convergent(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_no_unswitch_convergent(
entry:
br label %loop_begin
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
}
; Negative test: we cannot unswitch noduplicate calls.
-define void @test_no_unswitch_noduplicate(i1* %ptr, i1 %cond) {
+define void @test_no_unswitch_noduplicate(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_no_unswitch_noduplicate(
entry:
br label %loop_begin
br label %loop_latch
loop_latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; Negative test: we cannot unswitch when tokens are used across blocks as we
; might introduce PHIs.
-define void @test_no_unswitch_cross_block_token(i1* %ptr, i1 %cond) nounwind personality i32 (...)* @__CxxFrameHandler3 {
+define void @test_no_unswitch_cross_block_token(ptr %ptr, i1 %cond) nounwind personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @test_no_unswitch_cross_block_token(
entry:
br label %loop_begin
; Non-trivial loop unswitching where there are two distinct trivial conditions
; to unswitch within the loop.
-define i32 @test1(i1* %ptr, i1 %cond1, i1 %cond2) {
+define i32 @test1(ptr %ptr, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test1(
entry:
br label %loop_begin
; CHECK-NEXT: br label %latch.us
;
; CHECK: latch.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %latch.us2
;
; CHECK: latch.us2:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us1, label %loop_exit.split.split.us
;
; CHECK: loop_exit.split.split.us:
; CHECK-NEXT: br label %latch
;
; CHECK: latch:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split.split
;
; CHECK: loop_exit.split.split:
; CHECK-NEXT: br label %loop_exit.split
latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
; CHECK-NEXT: ret
}
-define i32 @test2(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr, i32* %c.ptr) {
+define i32 @test2(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr, ptr %c.ptr) {
; CHECK-LABEL: @test2(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split
loop_begin:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %cond1, label %loop_a, label %loop_b
loop_a:
- %a = load i32, i32* %a.ptr
- %ac = load i32, i32* %c.ptr
+ %a = load i32, ptr %a.ptr
+ %ac = load i32, ptr %c.ptr
br i1 %v, label %loop_begin, label %loop_exit
; The 'loop_a' unswitched loop.
;
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br label %loop_a.us
;
; CHECK: loop_a.us:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[AC:.*]] = load i32, i32* %c.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[AC:.*]] = load i32, ptr %c.ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_exit
loop_b:
- %b = load i32, i32* %b.ptr
- %bc = load i32, i32* %c.ptr
+ %b = load i32, ptr %b.ptr
+ %bc = load i32, ptr %c.ptr
br i1 %v, label %loop_begin, label %loop_exit
; The 'loop_b' unswitched loop.
;
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br label %loop_b
;
; CHECK: loop_b:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
-; CHECK-NEXT: %[[BC:.*]] = load i32, i32* %c.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
+; CHECK-NEXT: %[[BC:.*]] = load i32, ptr %c.ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge, label %loop_exit.split
;
; CHECK: loop_exit.split:
; Test a non-trivial unswitch of an exiting edge to an exit block with other
; in-loop predecessors.
-define i32 @test3a(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test3a(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test3a(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split
loop_begin:
- %v = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %v = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond1, label %loop_exit, label %loop_b
; The 'loop_exit' clone.
;
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_exit
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %v, label %loop_begin, label %loop_exit
; The 'loop_b' unswitched loop.
;
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_b
;
; CHECK: loop_b:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split
;
; CHECK: loop_exit.split:
; Test a non-trivial unswitch of an exiting edge to an exit block with other
; in-loop predecessors. This is the same as @test3a but with the reversed order
; of successors so that the exiting edge is *not* the cloned edge.
-define i32 @test3b(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test3b(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test3b(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split
loop_begin:
- %v = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %v = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond1, label %loop_b, label %loop_exit
; The 'loop_b' unswitched loop.
;
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_b.us
;
; CHECK: loop_b.us:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_exit
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %v, label %loop_begin, label %loop_exit
; The original loop, now non-looping due to unswitching..
;
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit.split
;
; CHECK: loop_exit.split:
; Test a non-trivial unswitch of an exiting edge to an exit block with no other
; in-loop predecessors.
-define void @test4a(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define void @test4a(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test4a(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split
loop_begin:
- %v = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %v = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond1, label %loop_exit1, label %loop_b
; The 'loop_exit' clone.
;
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit1.split.us
;
; CHECK: loop_exit1.split.us:
; CHECK-NEXT: br label %loop_exit1
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %v, label %loop_begin, label %loop_exit2
; The 'loop_b' unswitched loop.
;
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_b
;
; CHECK: loop_b:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit2
loop_exit1:
; Test a non-trivial unswitch of an exiting edge to an exit block with no other
; in-loop predecessors. This is the same as @test4a but with the edges reversed
; so that the exiting edge is *not* the cloned edge.
-define void @test4b(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define void @test4b(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test4b(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split
loop_begin:
- %v = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %v = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond1, label %loop_b, label %loop_exit1
; The 'loop_b' clone.
;
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_b.us
;
; CHECK: loop_b.us:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit2.split.us
;
; CHECK: loop_exit2.split.us:
; CHECK-NEXT: br label %loop_exit2
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %v, label %loop_begin, label %loop_exit2
; The 'loop_exit' unswitched path.
;
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit1
loop_exit1:
; in-loop predecessors. This is the same as @test4a but with a common merge
; block after the independent loop exits. This requires a different structural
; update to the dominator tree.
-define void @test4c(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define void @test4c(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test4c(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split
loop_begin:
- %v = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %v = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond1, label %loop_exit1, label %loop_b
; The 'loop_exit' clone.
;
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit1.split.us
;
; CHECK: loop_exit1.split.us:
; CHECK-NEXT: br label %loop_exit1
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %v, label %loop_begin, label %loop_exit2
; The 'loop_b' unswitched loop.
;
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_b
;
; CHECK: loop_b:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit2
loop_exit1:
}
; Test that we can unswitch a condition out of multiple layers of a loop nest.
-define i32 @test5(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test5(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test5(
entry:
br label %loop_begin
br label %inner_loop_begin
inner_loop_begin:
- %v = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %v = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond1, label %loop_exit, label %inner_loop_b
; The 'loop_exit' clone.
;
; CHECK-NEXT: br label %inner_loop_begin.us
;
; CHECK: inner_loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit.loopexit.split.us
;
; CHECK: loop_exit.loopexit.split.us:
; CHECK-NEXT: br label %loop_exit
inner_loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %v, label %inner_loop_begin, label %loop_latch
; The 'inner_loop_b' unswitched loop.
;
; CHECK-NEXT: br label %inner_loop_begin
;
; CHECK: inner_loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_b
;
; CHECK: inner_loop_b:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_begin, label %loop_latch
loop_latch:
%b.phi = phi i32 [ %b, %inner_loop_b ]
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_begin, label %loop_exit
; CHECK: loop_latch:
; CHECK-NEXT: %[[B_INNER_LCSSA:.*]] = phi i32 [ %[[B]], %inner_loop_b ]
-; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V2:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V2]], label %loop_begin, label %loop_exit.loopexit1
loop_exit:
; Test that we can unswitch a condition where we end up only cloning some of
; the nested loops and needing to delete some of the nested loops.
-define i32 @test6(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test6(ptr %ptr, i1 %cond1, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test6(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split
loop_begin:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %cond1, label %loop_a, label %loop_b
loop_a:
br label %loop_a_inner
loop_a_inner:
- %va = load i1, i1* %ptr
- %a = load i32, i32* %a.ptr
+ %va = load i1, ptr %ptr
+ %a = load i32, ptr %a.ptr
br i1 %va, label %loop_a_inner, label %loop_a_inner_exit
loop_a_inner_exit:
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br label %loop_a.us
;
; CHECK: loop_a.us:
; CHECK-NEXT: br label %loop_a_inner.us
;
; CHECK: loop_a_inner.us
-; CHECK-NEXT: %[[VA:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[VA:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br i1 %[[VA]], label %loop_a_inner.us, label %loop_a_inner_exit.us
;
; CHECK: loop_a_inner_exit.us:
br label %loop_b_inner
loop_b_inner:
- %vb = load i1, i1* %ptr
- %b = load i32, i32* %b.ptr
+ %vb = load i1, ptr %ptr
+ %b = load i32, ptr %b.ptr
br i1 %vb, label %loop_b_inner, label %loop_b_inner_exit
loop_b_inner_exit:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br label %loop_b
;
; CHECK: loop_b:
; CHECK-NEXT: br label %loop_b_inner
;
; CHECK: loop_b_inner
-; CHECK-NEXT: %[[VB:.*]] = load i1, i1* %ptr
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[VB:.*]] = load i1, ptr %ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br i1 %[[VB]], label %loop_b_inner, label %loop_b_inner_exit
;
; CHECK: loop_b_inner_exit:
; produces a non-loop clone that can reach multiple exit blocks which are part
; of different outer loops we correctly divide the cloned loop blocks between
; the outer loops based on reachability.
-define i32 @test7a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test7a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test7a(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
; CHECK: inner_loop_begin:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ]
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_loop_begin.split.us, label %inner_loop_begin.split
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %inner_inner_loop_c
inner_inner_loop_b:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_inner_loop_exit, label %inner_inner_loop_c
inner_inner_loop_c:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_inner_loop_d
inner_inner_loop_d:
; CHECK-NEXT: br label %inner_inner_loop_begin.us
;
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us
;
; CHECK: inner_inner_loop_b.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split.us, label %inner_inner_loop_c.us.loopexit
;
; CHECK: inner_inner_loop_a.us:
; CHECK-NEXT: %[[A_NEW_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_begin.us ]
; CHECK-NEXT: %[[B_NEW_LCSSA:.*]] = phi i32 [ %[[B]], %inner_inner_loop_begin.us ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us, label %inner_inner_loop_c.us
;
; CHECK: inner_inner_loop_c.us.loopexit:
; CHECK-NEXT: br label %inner_inner_loop_c.us
;
; CHECK: inner_inner_loop_c.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split.us, label %inner_inner_loop_d.us
;
; CHECK: inner_inner_loop_d.us:
; CHECK-NEXT: br label %inner_inner_loop_begin
;
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b
;
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %inner_inner_loop_c
;
; CHECK: inner_inner_loop_b:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split, label %inner_inner_loop_c
;
; CHECK: inner_inner_loop_c:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split, label %inner_inner_loop_d
;
; CHECK: inner_inner_loop_d:
; CHECK-NEXT: br label %inner_inner_loop_exit
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v5 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %inner_loop_exit, label %inner_loop_begin
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A2]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin
inner_loop_exit:
; Same pattern as @test7a but here the original loop becomes a non-loop that
; can reach multiple exit blocks which are part of different outer loops.
-define i32 @test7b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test7b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test7b(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
; CHECK: inner_loop_begin:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ]
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_loop_begin.split.us, label %inner_loop_begin.split
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %inner_inner_loop_c
inner_inner_loop_b:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_inner_loop_exit, label %inner_inner_loop_c
inner_inner_loop_c:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_inner_loop_d
inner_inner_loop_d:
; CHECK-NEXT: br label %inner_inner_loop_begin.us
;
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us
;
; CHECK: inner_inner_loop_b.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split.us, label %inner_inner_loop_c.us
;
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us, label %inner_inner_loop_c.us
;
; CHECK: inner_inner_loop_c.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split.us, label %inner_inner_loop_d.us
;
; CHECK: inner_inner_loop_d.us:
; CHECK-NEXT: br label %inner_inner_loop_begin
;
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b
;
; CHECK: inner_inner_loop_a:
; CHECK-NEXT: %[[A_NEW_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_begin ]
; CHECK-NEXT: %[[B_NEW_LCSSA:.*]] = phi i32 [ %[[B]], %inner_inner_loop_begin ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %inner_inner_loop_c
;
; CHECK: inner_inner_loop_b:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split, label %inner_inner_loop_c.loopexit
;
; CHECK: inner_inner_loop_c.loopexit:
; CHECK-NEXT: br label %inner_inner_loop_c
;
; CHECK: inner_inner_loop_c:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split, label %inner_inner_loop_d
;
; CHECK: inner_inner_loop_d:
; CHECK-NEXT: br label %inner_inner_loop_exit
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v5 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %inner_loop_exit, label %inner_loop_begin
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A2]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin
inner_loop_exit:
; Test that when the exit block set of an inner loop changes to start at a less
; high level of the loop nest we correctly hoist the loop up the nest.
-define i32 @test8a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test8a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test8a(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
; CHECK: inner_loop_begin:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ]
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_loop_begin.split.us, label %inner_loop_begin.split
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_latch, label %inner_loop_exit
inner_inner_loop_b:
; CHECK-NEXT: br label %inner_inner_loop_begin.us
;
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us
;
; CHECK: inner_inner_loop_b.us:
; CHECK-NEXT: br label %inner_inner_loop_latch.us
;
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch.us, label %inner_loop_exit.loopexit.split.us
;
; CHECK: inner_inner_loop_latch.us:
; CHECK-NEXT: br label %inner_inner_loop_begin
;
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b
;
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch, label %inner_loop_exit.loopexit.split
;
; CHECK: inner_inner_loop_b:
; CHECK-NEXT: br label %inner_inner_loop_begin
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v4 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_loop_begin
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A2]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin
inner_loop_exit:
- %v5 = load i1, i1* %ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %loop_exit, label %loop_begin
; CHECK: inner_loop_exit.loopexit.split:
; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_a ]
;
; CHECK: inner_loop_exit:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA2]], %inner_loop_exit.loopexit1 ], [ %[[A_INNER_US_PHI]], %inner_loop_exit.loopexit ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit, label %loop_begin
loop_exit:
; Same pattern as @test8a but where the original loop looses an exit block and
; needs to be hoisted up the nest.
-define i32 @test8b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test8b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test8b(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br label %inner_loop_begin
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_begin
inner_loop_begin:
%a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ]
- %cond = load i1, i1* %cond.ptr
- %b = load i32, i32* %b.ptr
+ %cond = load i1, ptr %cond.ptr
+ %b = load i32, ptr %b.ptr
br label %inner_inner_loop_begin
; CHECK: inner_loop_begin:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ]
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_loop_begin.split.us, label %inner_loop_begin.split
inner_inner_loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_latch, label %inner_loop_exit
inner_inner_loop_b:
; CHECK-NEXT: br label %inner_inner_loop_begin.us
;
; CHECK: inner_inner_loop_begin.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us
;
; CHECK: inner_inner_loop_b.us:
; CHECK-NEXT: br label %inner_inner_loop_exit.split.us
;
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch.us, label %inner_loop_exit.loopexit.split.us
;
; CHECK: inner_inner_loop_latch.us:
; CHECK-NEXT: br label %inner_inner_loop_begin
;
; CHECK: inner_inner_loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b
;
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch, label %inner_loop_exit.loopexit.split
;
; CHECK: inner_inner_loop_b:
; CHECK-NEXT: br label %inner_inner_loop_begin
inner_inner_loop_exit:
- %a2 = load i32, i32* %a.ptr
- %v4 = load i1, i1* %ptr
+ %a2 = load i32, ptr %a.ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %inner_loop_exit, label %inner_loop_begin
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A2]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin
inner_loop_exit:
- %v5 = load i1, i1* %ptr
+ %v5 = load i1, ptr %ptr
br i1 %v5, label %loop_exit, label %loop_begin
; CHECK: inner_loop_exit.loopexit.split:
; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A_INNER_INNER_LCSSA]], %inner_inner_loop_a ]
;
; CHECK: inner_loop_exit:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA2]], %inner_loop_exit.loopexit1 ], [ %[[A_INNER_US_PHI]], %inner_loop_exit.loopexit ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit, label %loop_begin
loop_exit:
; the clone no longer has an exiting edge *at all* and loops infinitely.
; Because it doesn't ever exit to the outer loop it is no longer an inner loop
; but needs to be hoisted up the nest to be a top-level loop.
-define i32 @test9a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test9a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test9a(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %b = load i32, i32* %b.ptr
- %cond = load i1, i1* %cond.ptr
+ %b = load i32, ptr %b.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_loop_begin
; CHECK: loop_begin:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
; CHECK-NEXT: br i1 %[[COND]], label %loop_begin.split.us, label %loop_begin.split
inner_loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_loop_latch, label %inner_loop_exit
inner_loop_latch:
; CHECK-NEXT: br label %inner_loop_begin.us
;
; CHECK: inner_loop_begin.us:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_latch.us
;
; CHECK: inner_loop_latch.us:
; CHECK-NEXT: br label %inner_loop_begin
;
; CHECK: inner_loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_exit
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_loop_begin ]
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
; CHECK: inner_loop_exit:
; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_loop_begin ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit
loop_exit:
; The same core pattern as @test9a, but instead of the cloned loop becoming an
; infinite loop, the original loop has its only exit unswitched and the
; original loop becomes infinite and must be hoisted out of the loop nest.
-define i32 @test9b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test9b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test9b(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %b = load i32, i32* %b.ptr
- %cond = load i1, i1* %cond.ptr
+ %b = load i32, ptr %b.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_loop_begin
; CHECK: loop_begin:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
; CHECK-NEXT: br i1 %[[COND]], label %loop_begin.split.us, label %loop_begin.split
inner_loop_begin:
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_loop_exit, label %inner_loop_latch
inner_loop_latch:
; CHECK-NEXT: br label %inner_loop_begin.us
;
; CHECK: inner_loop_begin.us:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_exit.split.us
;
; CHECK: inner_loop_exit.split.us
; CHECK-NEXT: br label %inner_loop_begin
;
; CHECK: inner_loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_latch
;
; CHECK: inner_loop_latch:
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_loop_begin ]
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
; CHECK: inner_loop_exit:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit
loop_exit:
}
; Test that requires re-forming dedicated exits for the cloned loop.
-define i32 @test10a(i1* %ptr, i1 %cond, i32* %a.ptr) {
+define i32 @test10a(ptr %ptr, i1 %cond, ptr %a.ptr) {
; CHECK-LABEL: @test10a(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[FROZEN]], label %entry.split.us, label %entry.split
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %loop_begin
loop_b:
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us
;
; CHECK: loop_b.us:
; CHECK-NEXT: br label %loop_exit.split.us
;
; CHECK: loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us.loopexit, label %loop_begin.backedge.us
;
; CHECK: loop_begin.backedge.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b
;
; CHECK: loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %loop_begin.backedge
;
; CHECK: loop_begin.backedge:
}
; Test that requires re-forming dedicated exits for the original loop.
-define i32 @test10b(i1* %ptr, i1 %cond, i32* %a.ptr) {
+define i32 @test10b(ptr %ptr, i1 %cond, ptr %a.ptr) {
; CHECK-LABEL: @test10b(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[FROZEN]], label %entry.split.us, label %entry.split
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_begin, label %loop_exit
loop_b:
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us
;
; CHECK: loop_b.us:
; CHECK-NEXT: br label %loop_begin.backedge.us
;
; CHECK: loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge.us, label %loop_exit.split.us
;
; CHECK: loop_begin.backedge.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b
;
; CHECK: loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge, label %loop_exit.split.loopexit
;
; CHECK: loop_begin.backedge:
; exits even an outer loop, we don't add the cloned preheader to the outer
; loop and do add the needed LCSSA phi nodes for the new exit block from the
; outer loop.
-define i32 @test11a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test11a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test11a(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_latch, label %inner_loop_ph
; CHECK: loop_begin:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %inner_loop_ph
inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_loop_begin
; CHECK: inner_loop_ph:
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_loop_ph.split.us, label %inner_loop_ph.split
inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %loop_exit, label %inner_loop_a
inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_loop_exit, label %inner_loop_begin
; The cloned path doesn't actually loop and is an exit from the outer loop as
; well.
;
; CHECK: inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit.loopexit.split.us
;
; CHECK: loop_exit.loopexit.split.us:
;
; CHECK: inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 %[[B]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_a
;
; CHECK: inner_loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit, label %inner_loop_begin
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_latch, label %loop_exit
; CHECK: inner_loop_exit:
; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_loop_a ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %loop_exit.loopexit1
loop_latch:
; directly exits even an outer loop, we remove the original preheader from the
; outer loop and add needed LCSSA phi nodes for the new exit block from the
; outer loop.
-define i32 @test11b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test11b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test11b(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_latch, label %inner_loop_ph
; CHECK: loop_begin:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %inner_loop_ph
inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_loop_begin
; CHECK: inner_loop_ph:
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_loop_ph.split.us, label %inner_loop_ph.split
inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_loop_a, label %loop_exit
inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_loop_exit, label %inner_loop_begin
; The cloned path continues to loop without the exit out of the entire nest.
;
;
; CHECK: inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 %[[B]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_a.us
;
; CHECK: inner_loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.split.us, label %inner_loop_begin.us
;
; CHECK: inner_loop_exit.split.us:
;
; CHECK: inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %loop_exit.loopexit
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_latch, label %loop_exit
; CHECK: inner_loop_exit:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %loop_exit.loopexit1
loop_latch:
; another loop, we correctly attribute the cloned preheader to that outermost
; loop rather than only handling the case where the preheader is not in any loop
; at all.
-define i32 @test12a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test12a(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test12a(
entry:
br label %loop_begin
; CHECK-NEXT: br label %inner_loop_begin
inner_loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_loop_latch, label %inner_inner_loop_ph
; CHECK: inner_loop_begin:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_inner_loop_ph
inner_inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_inner_loop_begin
; CHECK: inner_inner_loop_ph:
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_inner_loop_ph.split.us, label %inner_inner_loop_ph.split
inner_inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_loop_exit, label %inner_inner_loop_a
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_exit, label %inner_inner_loop_begin
; The cloned path doesn't actually loop and is an exit from the outer loop as
; well.
;
; CHECK: inner_inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_exit.loopexit.split.us
;
; CHECK: inner_loop_exit.loopexit.split.us:
;
; CHECK: inner_inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 %[[B]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_inner_loop_a
;
; CHECK: inner_inner_loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit, label %inner_inner_loop_begin
inner_inner_loop_exit:
%a.inner_inner_lcssa = phi i32 [ %a, %inner_inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_loop_latch, label %inner_loop_exit
; CHECK: inner_inner_loop_exit:
; CHECK-NEXT: %[[A_INNER_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_inner_loop_a ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_loop_exit.loopexit1
inner_loop_latch:
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_inner_loop_begin ], [ %a.inner_inner_lcssa, %inner_inner_loop_exit ]
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_begin, label %loop_exit
; CHECK: inner_loop_exit.loopexit:
; CHECK-NEXT: br label %inner_loop_exit
;
; CHECK: inner_loop_exit:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_INNER_LCSSA_US]], %inner_loop_exit.loopexit ], [ %[[A_INNER_LCSSA]], %inner_loop_exit.loopexit1 ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit
loop_exit:
; another loop, we correctly sink the preheader to the outermost loop rather
; than only handling the case where the preheader is completely removed from
; a loop.
-define i32 @test12b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test12b(ptr %ptr, ptr %cond.ptr, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test12b(
entry:
br label %loop_begin
; CHECK-NEXT: br label %inner_loop_begin
inner_loop_begin:
- %b = load i32, i32* %b.ptr
- %v1 = load i1, i1* %ptr
+ %b = load i32, ptr %b.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %inner_loop_latch, label %inner_inner_loop_ph
; CHECK: inner_loop_begin:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_inner_loop_ph
inner_inner_loop_ph:
- %cond = load i1, i1* %cond.ptr
+ %cond = load i1, ptr %cond.ptr
br label %inner_inner_loop_begin
; CHECK: inner_inner_loop_ph:
-; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr
+; CHECK-NEXT: %[[COND:.*]] = load i1, ptr %cond.ptr
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %[[COND]]
; CHECK-NEXT: br i1 %[[FROZEN]], label %inner_inner_loop_ph.split.us, label %inner_inner_loop_ph.split
inner_inner_loop_begin:
call void @sink1(i32 %b)
- %a = load i32, i32* %a.ptr
+ %a = load i32, ptr %a.ptr
br i1 %cond, label %inner_inner_loop_a, label %inner_loop_exit
inner_inner_loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %inner_inner_loop_exit, label %inner_inner_loop_begin
; The cloned path continues to loop without the exit out of the entire nest.
;
;
; CHECK: inner_inner_loop_begin.us:
; CHECK-NEXT: call void @sink1(i32 %[[B]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_inner_loop_a.us
;
; CHECK: inner_inner_loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split.us, label %inner_inner_loop_begin.us
;
; CHECK: inner_inner_loop_exit.split.us:
;
; CHECK: inner_inner_loop_begin:
; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]])
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
; CHECK-NEXT: br label %inner_loop_exit.loopexit
inner_inner_loop_exit:
%a.inner_inner_lcssa = phi i32 [ %a, %inner_inner_loop_a ]
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %inner_loop_latch, label %inner_loop_exit
; CHECK: inner_inner_loop_exit:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_loop_exit.loopexit1
inner_loop_latch:
inner_loop_exit:
%a.inner_lcssa = phi i32 [ %a, %inner_inner_loop_begin ], [ %a.inner_inner_lcssa, %inner_inner_loop_exit ]
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_begin, label %loop_exit
; CHECK: inner_loop_exit.loopexit:
; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_inner_loop_begin ]
;
; CHECK: inner_loop_exit:
; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA]], %inner_loop_exit.loopexit ], [ %[[A_INNER_LCSSA_US]], %inner_loop_exit.loopexit1 ]
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit
loop_exit:
; exiting block that connects the inner loop to the cloned loop is not the header
; block. This ensures that we correctly handle interesting corner cases of
; traversing back to the header when establishing the cloned loop.
-define i32 @test13a(i1* %ptr, i1 %cond, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test13a(ptr %ptr, i1 %cond, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test13a(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[FROZEN]], label %entry.split.us, label %entry.split
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %loop_latch
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %cond, label %loop_b_inner_ph, label %loop_exit
loop_b_inner_ph:
br label %loop_b_inner_header
loop_b_inner_header:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_b_inner_latch, label %loop_b_inner_body
loop_b_inner_body:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_b_inner_latch, label %loop_b_inner_exit
loop_b_inner_latch:
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us
;
; CHECK: loop_b.us:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br label %loop_b_inner_ph.us
;
; CHECK: loop_b_inner_ph.us:
; CHECK-NEXT: br label %loop_b_inner_header.us
;
; CHECK: loop_b_inner_header.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch.us, label %loop_b_inner_body.us
;
; CHECK: loop_b_inner_body.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch.us, label %loop_b_inner_exit.us
;
; CHECK: loop_b_inner_exit.us:
; CHECK-NEXT: br label %loop_b_inner_header.us
;
; CHECK: loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us, label %loop_latch.us
;
; CHECK: loop_latch.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b
;
; CHECK: loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.loopexit, label %loop_latch
;
; CHECK: loop_b:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br label %loop_exit.split
;
; CHECK: loop_latch:
; the header block. This ensures that we correctly handle interesting corner
; cases of traversing back to the header when re-establishing the original loop
; still exists after unswitching.
-define i32 @test13b(i1* %ptr, i1 %cond, i32* %a.ptr, i32* %b.ptr) {
+define i32 @test13b(ptr %ptr, i1 %cond, ptr %a.ptr, ptr %b.ptr) {
; CHECK-LABEL: @test13b(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[FROZEN]], label %entry.split.us, label %entry.split
loop_begin:
- %a = load i32, i32* %a.ptr
- %v1 = load i1, i1* %ptr
+ %a = load i32, ptr %a.ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_a, label %loop_b
loop_a:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_exit, label %loop_latch
loop_b:
- %b = load i32, i32* %b.ptr
+ %b = load i32, ptr %b.ptr
br i1 %cond, label %loop_exit, label %loop_b_inner_ph
loop_b_inner_ph:
br label %loop_b_inner_header
loop_b_inner_header:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_b_inner_latch, label %loop_b_inner_body
loop_b_inner_body:
- %v4 = load i1, i1* %ptr
+ %v4 = load i1, ptr %ptr
br i1 %v4, label %loop_b_inner_latch, label %loop_b_inner_exit
loop_b_inner_latch:
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us
;
; CHECK: loop_b.us:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br label %loop_exit.split.us
;
; CHECK: loop_a.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us.loopexit, label %loop_latch.us
;
; CHECK: loop_latch.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[A:.*]] = load i32, ptr %a.ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b
;
; CHECK: loop_a:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %loop_latch
;
; CHECK: loop_b:
-; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr
+; CHECK-NEXT: %[[B:.*]] = load i32, ptr %b.ptr
; CHECK-NEXT: br label %loop_b_inner_ph
;
; CHECK: loop_b_inner_ph:
; CHECK-NEXT: br label %loop_b_inner_header
;
; CHECK: loop_b_inner_header:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch, label %loop_b_inner_body
;
; CHECK: loop_b_inner_body:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch, label %loop_b_inner_exit
;
; CHECK: loop_b_inner_latch:
; CHECK-NEXT: ret i32 %[[AB_PHI]]
}
-define i32 @test20(i32* %var, i32 %cond1, i32 %cond2) {
+define i32 @test20(ptr %var, i32 %cond1, i32 %cond2) {
; CHECK-LABEL: @test20(
entry:
br label %loop_begin
; CHECK-NEXT: ]
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond2, label %loop_exit [
i32 0, label %loop_a
i32 1, label %loop_a
; CHECK-NEXT: br label %[[LOOP_BEGIN_A:.*]]
;
; CHECK: [[LOOP_BEGIN_A]]:
-; CHECK-NEXT: %{{.*}} = load i32, i32* %var
+; CHECK-NEXT: %{{.*}} = load i32, ptr %var
; CHECK-NEXT: br label %[[LOOP_A:.*]]
;
; CHECK: [[LOOP_A]]:
; CHECK-NEXT: br label %[[LOOP_BEGIN_B:.*]]
;
; CHECK: [[LOOP_BEGIN_B]]:
-; CHECK-NEXT: %{{.*}} = load i32, i32* %var
+; CHECK-NEXT: %{{.*}} = load i32, ptr %var
; CHECK-NEXT: br label %[[LOOP_B:.*]]
;
; CHECK: [[LOOP_B]]:
; CHECK-NEXT: br label %[[LOOP_BEGIN_C:.*]]
;
; CHECK: [[LOOP_BEGIN_C]]:
-; CHECK-NEXT: %{{.*}} = load i32, i32* %var
+; CHECK-NEXT: %{{.*}} = load i32, ptr %var
; CHECK-NEXT: br label %[[LOOP_C:.*]]
;
; CHECK: [[LOOP_C]]:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V:.*]] = load i32, i32* %var
+; CHECK-NEXT: %[[V:.*]] = load i32, ptr %var
; CHECK-NEXT: br label %loop_exit
;
; CHECK: loop_exit:
; Negative test: we do not switch when the loop contains unstructured control
; flows as it would significantly complicate the process as novel loops might
; be formed, etc.
-define void @test_no_unswitch_unstructured_cfg(i1* %ptr, i1 %cond) {
+define void @test_no_unswitch_unstructured_cfg(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test_no_unswitch_unstructured_cfg(
entry:
br label %loop_begin
br i1 %cond, label %loop_left, label %loop_right
loop_left:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
br i1 %v1, label %loop_right, label %loop_merge
loop_right:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_left, label %loop_merge
loop_merge:
- %v3 = load i1, i1* %ptr
+ %v3 = load i1, ptr %ptr
br i1 %v3, label %loop_latch, label %loop_exit
loop_latch:
; skip whole subregions of the outer loop blocks but just because the header of
; the outer loop is also the preheader of an inner loop shouldn't confuse this
; walk.
-define void @test23(i1 %arg, i1* %ptr) {
+define void @test23(i1 %arg, ptr %ptr) {
; CHECK-LABEL: define void @test23(
entry:
br label %outer.header
br label %inner.latch
inner.latch:
- %inner.cond = load i1, i1* %ptr
+ %inner.cond = load i1, ptr %ptr
br i1 %inner.cond, label %inner.header, label %outer.body
outer.body:
br label %outer.latch
outer.latch:
- %outer.cond = load i1, i1* %ptr
+ %outer.cond = load i1, ptr %ptr
br i1 %outer.cond, label %outer.header, label %exit
exit:
; Non-trivial loop unswitching where there are two invariant conditions, but the
; second one is only in the cloned copy of the loop after unswitching.
-define i32 @test24(i1* %ptr, i1 %cond1, i1 %cond2) {
+define i32 @test24(ptr %ptr, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test24(
entry:
br label %loop_begin
; CHECK-NEXT: br label %latch.us.us
;
; CHECK: latch.us.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us.us, label %loop_exit.split.us.split.us
;
; CHECK: loop_exit.split.us.split.us:
; CHECK-NEXT: br label %latch
;
; CHECK: latch.us:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us.split
;
; CHECK: loop_exit.split.us.split:
; CHECK-NEXT: br label %latch
;
; CHECK: latch:
-; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split
;
; CHECK: loop_exit.split:
; CHECK-NEXT: br label %loop_exit
latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
}
; Non-trivial partial loop unswitching of an invariant input to an 'or'.
-define i32 @test25(i1* %ptr, i1 %cond) {
+define i32 @test25(ptr %ptr, i1 %cond) {
; CHECK-LABEL: @test25(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 [[FROZEN]], label %entry.split.us, label %entry.split
loop_begin:
- %v1 = load i1, i1* %ptr
+ %v1 = load i1, ptr %ptr
%cond_or = or i1 %v1, %cond
br i1 %cond_or, label %loop_a, label %loop_b
; CHECK-NEXT: br label %latch.us
;
; CHECK: latch.us:
-; CHECK-NEXT: %[[V2_US:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V2_US:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V2_US]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V1:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V1:.*]] = load i1, ptr %ptr
; CHECK-NEXT: %[[OR:.*]] = or i1 %[[V1]], false
; CHECK-NEXT: br i1 %[[OR]], label %loop_a, label %loop_b
;
; CHECK-NEXT: br label %latch
latch:
- %v2 = load i1, i1* %ptr
+ %v2 = load i1, ptr %ptr
br i1 %v2, label %loop_begin, label %loop_exit
; CHECK: latch:
-; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V2:.*]] = load i1, ptr %ptr
; CHECK-NEXT: br i1 %[[V2]], label %loop_begin, label %loop_exit.split
loop_exit:
; Non-trivial partial loop unswitching of multiple invariant inputs to an `and`
; chain.
-define i32 @test26(i1* %ptr1, i1* %ptr2, i1* %ptr3, i1 %cond1, i1 %cond2, i1 %cond3) {
+define i32 @test26(ptr %ptr1, ptr %ptr2, ptr %ptr3, i1 %cond1, i1 %cond2, i1 %cond3) {
; CHECK-LABEL: @test26(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[INV_AND]], label %entry.split, label %entry.split.us
loop_begin:
- %v1 = load i1, i1* %ptr1
- %v2 = load i1, i1* %ptr2
+ %v1 = load i1, ptr %ptr1
+ %v2 = load i1, ptr %ptr2
%cond_and1 = and i1 %v1, %cond1
%cond_or1 = or i1 %v2, %cond2
%cond_and2 = and i1 %cond_and1, %cond_or1
; CHECK-NEXT: br label %latch.us
;
; CHECK: latch.us:
-; CHECK-NEXT: %[[V3_US:.*]] = load i1, i1* %ptr3
+; CHECK-NEXT: %[[V3_US:.*]] = load i1, ptr %ptr3
; CHECK-NEXT: br i1 %[[V3_US]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V1:.*]] = load i1, i1* %ptr1
-; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr2
+; CHECK-NEXT: %[[V1:.*]] = load i1, ptr %ptr1
+; CHECK-NEXT: %[[V2:.*]] = load i1, ptr %ptr2
; CHECK-NEXT: %[[AND1:.*]] = and i1 %[[V1]], true
; CHECK-NEXT: %[[OR1:.*]] = or i1 %[[V2]], %cond2
; CHECK-NEXT: %[[AND2:.*]] = and i1 %[[AND1]], %[[OR1]]
; CHECK-NEXT: br label %latch
latch:
- %v3 = load i1, i1* %ptr3
+ %v3 = load i1, ptr %ptr3
br i1 %v3, label %loop_begin, label %loop_exit
; CHECK: latch:
-; CHECK-NEXT: %[[V3:.*]] = load i1, i1* %ptr3
+; CHECK-NEXT: %[[V3:.*]] = load i1, ptr %ptr3
; CHECK-NEXT: br i1 %[[V3]], label %loop_begin, label %loop_exit.split
loop_exit:
; Non-trivial partial loop unswitching of multiple invariant inputs to an `or`
; chain. Basically an inverted version of corresponding `and` test (test26).
-define i32 @test27(i1* %ptr1, i1* %ptr2, i1* %ptr3, i1 %cond1, i1 %cond2, i1 %cond3) {
+define i32 @test27(ptr %ptr1, ptr %ptr2, ptr %ptr3, i1 %cond1, i1 %cond2, i1 %cond3) {
; CHECK-LABEL: @test27(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[INV_OR]], label %entry.split.us, label %entry.split
loop_begin:
- %v1 = load i1, i1* %ptr1
- %v2 = load i1, i1* %ptr2
+ %v1 = load i1, ptr %ptr1
+ %v2 = load i1, ptr %ptr2
%cond_or1 = or i1 %v1, %cond1
%cond_and1 = and i1 %v2, %cond2
%cond_or2 = or i1 %cond_or1, %cond_and1
; CHECK-NEXT: br label %latch.us
;
; CHECK: latch.us:
-; CHECK-NEXT: %[[V3_US:.*]] = load i1, i1* %ptr3
+; CHECK-NEXT: %[[V3_US:.*]] = load i1, ptr %ptr3
; CHECK-NEXT: br i1 %[[V3_US]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V1:.*]] = load i1, i1* %ptr1
-; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr2
+; CHECK-NEXT: %[[V1:.*]] = load i1, ptr %ptr1
+; CHECK-NEXT: %[[V2:.*]] = load i1, ptr %ptr2
; CHECK-NEXT: %[[OR1:.*]] = or i1 %[[V1]], false
; CHECK-NEXT: %[[AND1:.*]] = and i1 %[[V2]], %cond2
; CHECK-NEXT: %[[OR2:.*]] = or i1 %[[OR1]], %[[AND1]]
; CHECK-NEXT: br label %latch
latch:
- %v3 = load i1, i1* %ptr3
+ %v3 = load i1, ptr %ptr3
br i1 %v3, label %loop_begin, label %loop_exit
; CHECK: latch:
-; CHECK-NEXT: %[[V3:.*]] = load i1, i1* %ptr3
+; CHECK-NEXT: %[[V3:.*]] = load i1, ptr %ptr3
; CHECK-NEXT: br i1 %[[V3]], label %loop_begin, label %loop_exit.split
loop_exit:
}
; Non-trivial unswitching of a switch.
-define i32 @test28(i1* %ptr, i32 %cond) {
+define i32 @test28(ptr %ptr, i32 %cond) {
; CHECK-LABEL: @test28(
entry:
br label %loop_begin
; CHECK-NEXT: br label %[[LOOP_LATCH_A:.*]]
;
; CHECK: [[LOOP_LATCH_A]]:
-; CHECK-NEXT: %[[V_A:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V_A:.*]] = load i1, ptr %ptr
; CHECK: br i1 %[[V_A]], label %[[LOOP_BEGIN_A]], label %[[LOOP_EXIT_A:.*]]
;
; CHECK: [[LOOP_EXIT_A]]:
; CHECK-NEXT: br label %[[LOOP_LATCH_B:.*]]
;
; CHECK: [[LOOP_LATCH_B]]:
-; CHECK-NEXT: %[[V_B:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V_B:.*]] = load i1, ptr %ptr
; CHECK: br i1 %[[V_B]], label %[[LOOP_BEGIN_B]], label %[[LOOP_EXIT_B:.*]]
;
; CHECK: [[LOOP_EXIT_B]]:
; CHECK-NEXT: br label %[[LOOP_LATCH_C:.*]]
;
; CHECK: [[LOOP_LATCH_C]]:
-; CHECK-NEXT: %[[V_C:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V_C:.*]] = load i1, ptr %ptr
; CHECK: br i1 %[[V_C]], label %[[LOOP_BEGIN_C]], label %[[LOOP_EXIT_C:.*]]
;
; CHECK: [[LOOP_EXIT_C]]:
; CHECK-NEXT: br label %loop_exit
latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
; Unswitched the 'latch' only loop.
;
; CHECK-NEXT: br label %[[LOOP_LATCH_LATCH:.*]]
;
; CHECK: [[LOOP_LATCH_LATCH]]:
-; CHECK-NEXT: %[[V_LATCH:.*]] = load i1, i1* %ptr
+; CHECK-NEXT: %[[V_LATCH:.*]] = load i1, ptr %ptr
; CHECK: br i1 %[[V_LATCH]], label %[[LOOP_BEGIN_LATCH]], label %[[LOOP_EXIT_LATCH:.*]]
;
; CHECK: [[LOOP_EXIT_LATCH]]:
; A < B < C
; into
; A < (B, C)
-define void @hoist_inner_loop1(i32* %ptr) {
+define void @hoist_inner_loop1(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop1(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %v1
; CHECK-NEXT: br i1 %[[FROZEN]], label %[[B_HEADER_SPLIT_US:.*]], label %[[B_HEADER_SPLIT:.*]]
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %a.exit.c
; CHECK: c.latch:
-; CHECK-NEXT: store i32 %x.a, i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %x.a, ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %c.header, label %a.exit.c
; A < B < C
; into
; (A < B), C
-define void @hoist_inner_loop2(i32* %ptr) {
+define void @hoist_inner_loop2(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop2(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %v1
; CHECK-NEXT: br i1 %[[FROZEN]], label %[[B_HEADER_SPLIT_US:.*]], label %[[B_HEADER_SPLIT:.*]]
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %exit
; CHECK: c.latch:
-; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %[[X_A_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %c.header, label %exit
; A < B < C < D
; into
; (A < B), (C < D)
-define void @hoist_inner_loop3(i32* %ptr) {
+define void @hoist_inner_loop3(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop3(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: %[[FROZEN:.+]] = freeze i1 %v1
; CHECK-NEXT: br i1 %[[FROZEN]], label %[[B_HEADER_SPLIT_US:.*]], label %[[B_HEADER_SPLIT:.*]]
; CHECK-NEXT: br label %c.body
c.body:
- %x.c = load i32, i32* %ptr
+ %x.c = load i32, ptr %ptr
br label %d.header
; CHECK: c.body:
-; CHECK-NEXT: %x.c = load i32, i32* %ptr
+; CHECK-NEXT: %x.c = load i32, ptr %ptr
; CHECK-NEXT: br label %d.header
d.header:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
- store i32 %x.c, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
+ store i32 %x.c, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %d.header, label %c.latch
; CHECK: d.header:
-; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %x.c, i32* %ptr
+; CHECK-NEXT: store i32 %[[X_A_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %x.c, ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %d.header, label %c.latch
; A < B < C < D
; into
; A < ((B < C), D)
-define void @hoist_inner_loop5(i32* %ptr) {
+define void @hoist_inner_loop5(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop5(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: br label %c.header
c.header:
- %x.c = load i32, i32* %ptr
+ %x.c = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %d.header
; CHECK: c.header:
-; CHECK-NEXT: %x.c = load i32, i32* %ptr
+; CHECK-NEXT: %x.c = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: [[FROZEN:%.+]] = freeze i1 %v1
; CHECK-NEXT: br i1 [[FROZEN]], label %[[C_HEADER_SPLIT_US:.*]], label %[[C_HEADER_SPLIT:.*]]
d.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
- store i32 %x.c, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
+ store i32 %x.c, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %d.header, label %a.latch
; CHECK: d.latch:
-; CHECK-NEXT: store i32 %x.a, i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_C_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %x.a, ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_C_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %d.header, label %a.latch
; CHECK-NEXT: ret void
}
-define void @hoist_inner_loop_switch(i32* %ptr) {
+define void @hoist_inner_loop_switch(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop_switch(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i32 @cond.i32()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i32 @cond.i32()
; CHECK-NEXT: [[FROZEN:%.+]] = freeze i32 %v1
; CHECK-NEXT: switch i32 [[FROZEN]], label %[[B_HEADER_SPLIT:.*]] [
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %exit
; CHECK: c.latch:
-; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %[[X_A_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %c.header, label %exit
; Non-trivial partial loop unswitching of multiple invariant inputs to an `and`
; chain (select version).
-define i32 @test32(i1* %ptr1, i1* %ptr2, i1* %ptr3, i1 %cond1, i1 %cond2) {
+define i32 @test32(ptr %ptr1, ptr %ptr2, ptr %ptr3, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test32(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[INV_AND]], label %entry.split, label %entry.split.us
loop_begin:
- %v1 = load i1, i1* %ptr1
- %v2 = load i1, i1* %ptr2
+ %v1 = load i1, ptr %ptr1
+ %v2 = load i1, ptr %ptr2
%cond_and1 = select i1 %v1, i1 %cond1, i1 false
%cond_and2 = select i1 %cond_and1, i1 %cond2, i1 false
br i1 %cond_and2, label %loop_a, label %loop_b
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V2_US]] = load i1, i1* %ptr2, align 1
+; CHECK-NEXT: %[[V2_US]] = load i1, ptr %ptr2, align 1
; CHECK-NEXT: br label %loop_b.us
;
; CHECK: loop_b.us:
; CHECK-NEXT: br label %latch.us
;
; CHECK: latch.us:
-; CHECK-NEXT: %[[V3_US:.*]] = load i1, i1* %ptr3, align 1
+; CHECK-NEXT: %[[V3_US:.*]] = load i1, ptr %ptr3, align 1
; CHECK-NEXT: br i1 %[[V3_US]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V1:.*]] = load i1, i1* %ptr1
-; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr2
+; CHECK-NEXT: %[[V1:.*]] = load i1, ptr %ptr1
+; CHECK-NEXT: %[[V2:.*]] = load i1, ptr %ptr2
; CHECK-NEXT: %[[AND1:.*]] = select i1 %[[V1]], i1 true, i1 false
; CHECK-NEXT: %[[AND2:.*]] = select i1 %[[AND1]], i1 true, i1 false
; CHECK-NEXT: br i1 %[[AND2]], label %loop_a, label %loop_b
; CHECK-NEXT: br label %latch
latch:
- %v3 = load i1, i1* %ptr3
+ %v3 = load i1, ptr %ptr3
br i1 %v3, label %loop_begin, label %loop_exit
; CHECK: latch:
-; CHECK-NEXT: %[[V3:.*]] = load i1, i1* %ptr3, align 1
+; CHECK-NEXT: %[[V3:.*]] = load i1, ptr %ptr3, align 1
; CHECK-NEXT: br i1 %[[V3]], label %loop_begin, label %loop_exit.split
loop_exit:
; Non-trivial partial loop unswitching of multiple invariant inputs to an `or`
; chain (select version).
-define i32 @test33(i1* %ptr1, i1* %ptr2, i1* %ptr3, i1 %cond1, i1 %cond2) {
+define i32 @test33(ptr %ptr1, ptr %ptr2, ptr %ptr3, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test33(
entry:
br label %loop_begin
; CHECK-NEXT: br i1 %[[INV_OR]], label %entry.split.us, label %entry.split
loop_begin:
- %v1 = load i1, i1* %ptr1
- %v2 = load i1, i1* %ptr2
+ %v1 = load i1, ptr %ptr1
+ %v2 = load i1, ptr %ptr2
%cond_and1 = select i1 %v1, i1 true, i1 %cond1
%cond_and2 = select i1 %cond_and1, i1 true, i1 %cond2
br i1 %cond_and2, label %loop_b, label %loop_a
; CHECK-NEXT: br label %loop_begin.us
;
; CHECK: loop_begin.us:
-; CHECK-NEXT: %[[V2_US]] = load i1, i1* %ptr2, align 1
+; CHECK-NEXT: %[[V2_US]] = load i1, ptr %ptr2, align 1
; CHECK-NEXT: br label %loop_b.us
;
; CHECK: loop_b.us:
; CHECK-NEXT: br label %latch.us
;
; CHECK: latch.us:
-; CHECK-NEXT: %[[V3_US:.*]] = load i1, i1* %ptr3, align 1
+; CHECK-NEXT: %[[V3_US:.*]] = load i1, ptr %ptr3, align 1
; CHECK-NEXT: br i1 %[[V3_US]], label %loop_begin.us, label %loop_exit.split.us
;
; CHECK: loop_exit.split.us:
; CHECK-NEXT: br label %loop_begin
;
; CHECK: loop_begin:
-; CHECK-NEXT: %[[V1:.*]] = load i1, i1* %ptr1
-; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr2
+; CHECK-NEXT: %[[V1:.*]] = load i1, ptr %ptr1
+; CHECK-NEXT: %[[V2:.*]] = load i1, ptr %ptr2
; CHECK-NEXT: %[[AND1:.*]] = select i1 %[[V1]], i1 true, i1 false
; CHECK-NEXT: %[[AND2:.*]] = select i1 %[[AND1]], i1 true, i1 false
; CHECK-NEXT: br i1 %[[AND2]], label %loop_b, label %loop_a
; CHECK-NEXT: br label %latch
latch:
- %v3 = load i1, i1* %ptr3
+ %v3 = load i1, ptr %ptr3
br i1 %v3, label %loop_begin, label %loop_exit
; CHECK: latch:
-; CHECK-NEXT: %[[V3:.*]] = load i1, i1* %ptr3, align 1
+; CHECK-NEXT: %[[V3:.*]] = load i1, ptr %ptr3, align 1
; CHECK-NEXT: br i1 %[[V3]], label %loop_begin, label %loop_exit.split
loop_exit:
; NOTRIVIAL-NOT: split
; TRIVIAL: split
-define i32 @test1(i32* %var, i1 %cond1, i1 %cond2) {
+define i32 @test1(ptr %var, i1 %cond1, i1 %cond2) {
entry:
br label %loop_begin
br i1 %cond1, label %continue, label %loop_exit ; first trivial condition
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
br i1 %cond2, label %do_something, label %loop_exit ; second trivial condition
do_something:
; Partial unswitching is possible, because the store in %noclobber does not
; alias the load of the condition.
-define i32 @partial_unswitch_true_successor_noclobber(i32* noalias %ptr.1, i32* noalias %ptr.2, i32 %N) {
+define i32 @partial_unswitch_true_successor_noclobber(ptr noalias %ptr.1, ptr noalias %ptr.2, i32 %N) {
; THRESHOLD-0-LABEL: @partial_unswitch_true_successor
; THRESHOLD-0: entry:
; THRESHOLD-0: br label %loop.header
;
; THRESHOLD-DEFAULT-LABEL: @partial_unswitch_true_successor
; THRESHOLD-DEFAULT-NEXT: entry:
-; THRESHOLD-DEFAULT-NEXT: [[LV:%[0-9]+]] = load i32, i32* %ptr.1, align 4
+; THRESHOLD-DEFAULT-NEXT: [[LV:%[0-9]+]] = load i32, ptr %ptr.1, align 4
; THRESHOLD-DEFAULT-NEXT: [[C:%[0-9]+]] = icmp eq i32 [[LV]], 100
; THRESHOLD-DEFAULT-NEXT: br i1 [[C]]
;
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr.1
+ %lv = load i32, ptr %ptr.1
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
noclobber:
- %gep.1 = getelementptr i32, i32* %ptr.2, i32 %iv
- store i32 %lv, i32* %gep.1
+ %gep.1 = getelementptr i32, ptr %ptr.2, i32 %iv
+ store i32 %lv, ptr %gep.1
br label %loop.latch
clobber:
; Check that MemorySSA updating can deal with a clobbering access of a
; duplicated load being a MemoryPHI outside the loop.
-define void @partial_unswitch_memssa_update(i32* noalias %ptr, i1 %c) {
+define void @partial_unswitch_memssa_update(ptr noalias %ptr, i1 %c) {
; CHECK-LABEL: @partial_unswitch_memssa_update(
; CHECK-LABEL: loop.ph:
-; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i32, i32* %ptr, align 4
+; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i32, ptr %ptr, align 4
; CHECK-NEXT: [[C:%[a-z0-9]+]] = icmp eq i32 [[LV]], 0
; CHECK-NEXT: br i1 [[C]]
entry:
br label %loop.header
loop.header:
- %lv = load i32, i32* %ptr, align 4
+ %lv = load i32, ptr %ptr, align 4
%hc = icmp eq i32 %lv, 0
br i1 %hc, label %if, label %then
; Check that MemorySSA updating can deal with skipping defining accesses in the
; loop body until it finds the first defining access outside the loop.
-define void @partial_unswitch_inloop_stores_beteween_outside_defining_access(i64* noalias %ptr, i16* noalias %src) {
+define void @partial_unswitch_inloop_stores_beteween_outside_defining_access(ptr noalias %ptr, ptr noalias %src) {
; CHECK-LABEL: @partial_unswitch_inloop_stores_beteween_outside_defining_access
; CHECK-LABEL: entry:
-; CHECK-NEXT: store i64 0, i64* %ptr, align 1
-; CHECK-NEXT: store i64 1, i64* %ptr, align 1
-; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i16, i16* %src, align 1
+; CHECK-NEXT: store i64 0, ptr %ptr, align 1
+; CHECK-NEXT: store i64 1, ptr %ptr, align 1
+; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i16, ptr %src, align 1
; CHECK-NEXT: [[C:%[a-z0-9]+]] = icmp eq i16 [[LV]], 0
; CHECK-NEXT: br i1 [[C]]
;
entry:
- store i64 0, i64* %ptr, align 1
- store i64 1, i64* %ptr, align 1
+ store i64 0, ptr %ptr, align 1
+ store i64 1, ptr %ptr, align 1
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- store i64 2, i64* %ptr, align 1
- %lv = load i16, i16* %src, align 1
+ store i64 2, ptr %ptr, align 1
+ %lv = load i16, ptr %src, align 1
%invar.cond = icmp eq i16 %lv, 0
br i1 %invar.cond, label %noclobber, label %loop.latch
declare void @clobber()
-define i32 @partial_unswitch_true_successor(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_true_successor(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
ret i32 10
}
-define i32 @partial_unswitch_false_successor(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_false_successor(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_false_successor(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_US:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[CLOBBER:%.*]], label [[NOCLOBBER:%.*]]
; CHECK: clobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %clobber, label %noclobber
ret i32 10
}
-define i32 @partial_unswtich_gep_load_icmp(i32** %ptr, i32 %N) {
+define i32 @partial_unswtich_gep_load_icmp(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswtich_gep_load_icmp(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32*, i32** [[PTR:%.*]], i32 1
-; CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP0]], align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr ptr, ptr [[PTR:%.*]], i32 1
+; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 100
; CHECK-NEXT: br i1 [[TMP3]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32*, i32** [[PTR]], i32 1
-; CHECK-NEXT: [[LV_1:%.*]] = load i32*, i32** [[GEP]], align 8
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[LV_1]], align 4
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr ptr, ptr [[PTR]], i32 1
+; CHECK-NEXT: [[LV_1:%.*]] = load ptr, ptr [[GEP]], align 8
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[LV_1]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %gep = getelementptr i32*, i32** %ptr, i32 1
- %lv.1 = load i32*, i32** %gep
- %lv = load i32, i32* %lv.1
+ %gep = getelementptr ptr, ptr %ptr, i32 1
+ %lv.1 = load ptr, ptr %gep
+ %lv = load i32, ptr %lv.1
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
ret i32 10
}
-define i32 @partial_unswitch_reduction_phi(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_reduction_phi(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_reduction_phi(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_US:%.*]]
; CHECK: entry.split.us:
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT: [[RED:%.*]] = phi i32 [ 20, [[ENTRY_SPLIT]] ], [ [[RED_NEXT:%.*]], [[LOOP_LATCH]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[CLOBBER:%.*]], label [[NOCLOBBER:%.*]]
; CHECK: clobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
%red = phi i32 [ 20, %entry ], [ %red.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %clobber, label %noclobber
; Partial unswitching is possible, because the store in %noclobber does not
; alias the load of the condition.
-define i32 @partial_unswitch_true_successor_noclobber(i32* noalias %ptr.1, i32* noalias %ptr.2, i32 %N) {
+define i32 @partial_unswitch_true_successor_noclobber(ptr noalias %ptr.1, ptr noalias %ptr.2, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_noclobber(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR_1:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR_1:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
; CHECK: loop.header.us:
; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: [[LV_US:%.*]] = load i32, i32* [[PTR_1]], align 4
+; CHECK-NEXT: [[LV_US:%.*]] = load i32, ptr [[PTR_1]], align 4
; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
; CHECK: noclobber.us:
-; CHECK-NEXT: [[GEP_1_US:%.*]] = getelementptr i32, i32* [[PTR_2:%.*]], i32 [[IV_US]]
-; CHECK-NEXT: store i32 [[LV_US]], i32* [[GEP_1_US]], align 4
+; CHECK-NEXT: [[GEP_1_US:%.*]] = getelementptr i32, ptr [[PTR_2:%.*]], i32 [[IV_US]]
+; CHECK-NEXT: store i32 [[LV_US]], ptr [[GEP_1_US]], align 4
; CHECK-NEXT: br label [[LOOP_LATCH_US]]
; CHECK: loop.latch.us:
; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR_1]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR_1]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
-; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[PTR_2]], i32 [[IV]]
-; CHECK-NEXT: store i32 [[LV]], i32* [[GEP_1]], align 4
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, ptr [[PTR_2]], i32 [[IV]]
+; CHECK-NEXT: store i32 [[LV]], ptr [[GEP_1]], align 4
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: clobber:
; CHECK-NEXT: call void @clobber()
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr.1
+ %lv = load i32, ptr %ptr.1
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
noclobber:
- %gep.1 = getelementptr i32, i32* %ptr.2, i32 %iv
- store i32 %lv, i32* %gep.1
+ %gep.1 = getelementptr i32, ptr %ptr.2, i32 %iv
+ store i32 %lv, ptr %gep.1
br label %loop.latch
clobber:
ret void
}
-define void @no_partial_unswitch_clobber_latch(i32* %ptr, i32 %N) {
+define void @no_partial_unswitch_clobber_latch(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_clobber_latch(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
ret void
}
-define void @no_partial_unswitch_clobber_header(i32* %ptr, i32 %N) {
+define void @no_partial_unswitch_clobber_header(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_clobber_header(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT: call void @clobber()
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
call void @clobber()
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
ret void
}
-define void @no_partial_unswitch_clobber_both(i32* %ptr, i32 %N) {
+define void @no_partial_unswitch_clobber_both(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_clobber_both(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
ret void
}
-define i32 @no_partial_unswitch_true_successor_storeclobber(i32* %ptr.1, i32* %ptr.2, i32 %N) {
+define i32 @no_partial_unswitch_true_successor_storeclobber(ptr %ptr.1, ptr %ptr.2, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_true_successor_storeclobber(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR_1:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR_1:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
-; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[PTR_2:%.*]], i32 [[IV]]
-; CHECK-NEXT: store i32 [[LV]], i32* [[GEP_1]], align 4
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, ptr [[PTR_2:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 [[LV]], ptr [[GEP_1]], align 4
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: clobber:
; CHECK-NEXT: call void @clobber()
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr.1
+ %lv = load i32, ptr %ptr.1
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
noclobber:
- %gep.1 = getelementptr i32, i32* %ptr.2, i32 %iv
- store i32 %lv, i32* %gep.1
+ %gep.1 = getelementptr i32, ptr %ptr.2, i32 %iv
+ store i32 %lv, ptr %gep.1
br label %loop.latch
clobber:
; executes when the loop body also executes. Do not check the unswitched code,
; because it is already checked in the @partial_unswitch_true_successor test
; case.
-define i32 @partial_unswitch_true_successor_preheader_insertion(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_true_successor_preheader_insertion(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_preheader_insertion(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[EC:%.*]] = icmp ne i32* [[PTR:%.*]], null
+; CHECK-NEXT: [[EC:%.*]] = icmp ne ptr [[PTR:%.*]], null
; CHECK-NEXT: br i1 [[EC]], label [[LOOP_PH:%.*]], label [[EXIT:%.*]]
; CHECK: loop.ph:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[LOOP_PH_SPLIT_US:%.*]], label [[LOOP_PH_SPLIT:%.*]]
; CHECK: loop.ph.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[LOOP_PH_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
;
entry:
- %ec = icmp ne i32* %ptr, null
+ %ec = icmp ne ptr %ptr, null
br i1 %ec, label %loop.ph, label %exit
loop.ph:
loop.header:
%iv = phi i32 [ 0, %loop.ph ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
; Make sure the duplicated instructions are hoisted just before the branch of
; the preheader. Do not check the unswitched code, because it is already checked
; in the @partial_unswitch_true_successor test case
-define i32 @partial_unswitch_true_successor_insert_point(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_true_successor_insert_point(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_insert_point(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @clobber()
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
; Make sure invariant instructions in the loop are also hoisted to the preheader.
; Do not check the unswitched code, because it is already checked in the
; @partial_unswitch_true_successor test case
-define i32 @partial_unswitch_true_successor_hoist_invariant(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_true_successor_hoist_invariant(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_hoist_invariant(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 100
; CHECK-NEXT: br i1 [[TMP2]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[PTR]], i64 1
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[GEP]], align 4
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[PTR]], i64 1
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[GEP]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %gep = getelementptr i32, i32* %ptr, i64 1
- %lv = load i32, i32* %gep
+ %gep = getelementptr i32, ptr %ptr, i64 1
+ %lv = load i32, ptr %gep
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
; Do not unswitch if the condition depends on an atomic load. Duplicating such
; loads is not safe.
-define i32 @no_partial_unswitch_atomic_load_unordered(i32* %ptr, i32 %N) {
+define i32 @no_partial_unswitch_atomic_load_unordered(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_atomic_load_unordered(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load atomic i32, i32* [[PTR:%.*]] unordered, align 4
+; CHECK-NEXT: [[LV:%.*]] = load atomic i32, ptr [[PTR:%.*]] unordered, align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load atomic i32, i32* %ptr unordered, align 4
+ %lv = load atomic i32, ptr %ptr unordered, align 4
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
; Do not unswitch if the condition depends on an atomic load. Duplicating such
; loads is not safe.
-define i32 @no_partial_unswitch_atomic_load_monotonic(i32* %ptr, i32 %N) {
+define i32 @no_partial_unswitch_atomic_load_monotonic(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_atomic_load_monotonic(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load atomic i32, i32* [[PTR:%.*]] monotonic, align 4
+; CHECK-NEXT: [[LV:%.*]] = load atomic i32, ptr [[PTR:%.*]] monotonic, align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load atomic i32, i32* %ptr monotonic, align 4
+ %lv = load atomic i32, ptr %ptr monotonic, align 4
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
; Do not unswitch if the condition depends on a call, that may clobber memory.
; Duplicating such a call is not safe.
-define i32 @no_partial_unswitch_cond_call(i32* %ptr, i32 %N) {
+define i32 @no_partial_unswitch_cond_call(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_cond_call(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
ret i32 10
}
-define i32 @no_partial_unswitch_true_successor_exit(i32* %ptr, i32 %N) {
+define i32 @no_partial_unswitch_true_successor_exit(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_true_successor_exit(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[EXIT:%.*]], label [[CLOBBER:%.*]]
; CHECK: clobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %exit, label %clobber
ret i32 10
}
-define i32 @no_partial_unswitch_true_same_successor(i32* %ptr, i32 %N) {
+define i32 @no_partial_unswitch_true_same_successor(ptr %ptr, i32 %N) {
; CHECK-LABEL: @no_partial_unswitch_true_same_successor(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[NOCLOBBER]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %noclobber
ret i32 10
}
-define i32 @partial_unswitch_true_to_latch(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_true_to_latch(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_to_latch(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[LOOP_LATCH]], label [[CLOBBER:%.*]]
; CHECK: clobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %loop.latch, label %clobber
; There could be multiple unswitch candidates which include partially invariant
; condition. When the exiting block is selected as best unswitch one, clone loop
; blocks.
-define i32 @partial_unswitch_exiting_block_with_multiple_unswitch_candidates(i32 %0, i32 %1, i32* %ptr) {
+define i32 @partial_unswitch_exiting_block_with_multiple_unswitch_candidates(i32 %0, i32 %1, ptr %ptr) {
; CHECK-LABEL: @partial_unswitch_exiting_block_with_multiple_unswitch_candidates(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp ne i32 [[TMP0:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[PTR:%.*]], align 16
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[PTR:%.*]], align 16
; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 41
; CHECK-NEXT: br i1 [[TMP3]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_US:%.*]]
; CHECK: entry.split.us:
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[PTR]], align 16
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[PTR]], align 16
; CHECK-NEXT: [[IF_COND:%.*]] = icmp ult i32 [[VAL]], 41
; CHECK-NEXT: br i1 [[IF_COND]], label [[IF_THEN:%.*]], label [[EXITING:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[TMP1:%.*]], i32* [[PTR]], align 16
+; CHECK-NEXT: store i32 [[TMP1:%.*]], ptr [[PTR]], align 16
; CHECK-NEXT: br label [[EXITING]]
; CHECK: exiting:
; CHECK-NEXT: br i1 [[EXIT_COND]], label [[LOOP]], label [[EXIT_SPLIT:%.*]], !llvm.loop [[LOOP10:![0-9]+]]
br label %loop
loop:
- %val = load i32, i32* %ptr, align 16
+ %val = load i32, ptr %ptr, align 16
%if.cond = icmp ult i32 %val, 41
br i1 %if.cond, label %if.then, label %exiting
if.then:
- store i32 %1, i32* %ptr, align 16
+ store i32 %1, ptr %ptr, align 16
br label %exiting
exiting:
; The path with noclobber block is only duplicated so we need to calculate only
; the cost of the path with noclobber.
-define i32 @partial_unswitch_true_successor_for_cost_calculation(i32* %ptr, i32 %N) {
+define i32 @partial_unswitch_true_successor_for_cost_calculation(ptr %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_for_cost_calculation(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
; CHECK: entry.split.us:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
loop.header:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr
+ %lv = load i32, ptr %ptr
%sc = icmp eq i32 %lv, 100
br i1 %sc, label %noclobber, label %clobber
; TRIVIAL-NOT: loop_begin.us:
; NONTRIVIAL: loop_begin.us:
-define i32 @test1(i1* %ptr, i1 %cond1, i1 %cond2) {
+define i32 @test1(ptr %ptr, i1 %cond1, i1 %cond2) {
entry:
br label %loop_begin
br label %latch
latch:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop_begin, label %loop_exit
loop_exit:
}
; CHECK-NOT: loop2_begin.us:
-define i32 @test2(i1* %ptr, i1 %cond1, i1 %cond2) optsize {
+define i32 @test2(ptr %ptr, i1 %cond1, i1 %cond2) optsize {
entry:
br label %loop2_begin
br label %latch2
latch2:
- %v = load i1, i1* %ptr
+ %v = load i1, ptr %ptr
br i1 %v, label %loop2_begin, label %loop2_exit
loop2_exit:
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
target triple = "armv6-apple-darwin9"
-@delim1 = external global i32 ; <i32*> [#uses=1]
-@delim2 = external global i32 ; <i32*> [#uses=1]
+@delim1 = external global i32 ; <ptr> [#uses=1]
+@delim2 = external global i32 ; <ptr> [#uses=1]
-define i32 @ineqn(i8* %s, i8* %p) nounwind readonly {
+define i32 @ineqn(ptr %s, ptr %p) nounwind readonly {
entry:
- %0 = load i32, i32* @delim1, align 4 ; <i32> [#uses=1]
- %1 = load i32, i32* @delim2, align 4 ; <i32> [#uses=1]
+ %0 = load i32, ptr @delim1, align 4 ; <i32> [#uses=1]
+ %1 = load i32, ptr @delim2, align 4 ; <i32> [#uses=1]
br label %bb8.outer
bb: ; preds = %bb8
- %2 = icmp eq i8* %p_addr.0, %s ; <i1> [#uses=1]
+ %2 = icmp eq ptr %p_addr.0, %s ; <i1> [#uses=1]
br i1 %2, label %bb10, label %bb2
bb2: ; preds = %bb
- %3 = getelementptr inbounds i8, i8* %p_addr.0, i32 1 ; <i8*> [#uses=3]
+ %3 = getelementptr inbounds i8, ptr %p_addr.0, i32 1 ; <ptr> [#uses=3]
switch i32 %ineq.0.ph, label %bb8.backedge [
i32 0, label %bb3
i32 1, label %bb6
br i1 %5, label %bb7, label %bb8.backedge
bb7: ; preds = %bb6
- %.lcssa1 = phi i8* [ %3, %bb6 ] ; <i8*> [#uses=1]
+ %.lcssa1 = phi ptr [ %3, %bb6 ] ; <ptr> [#uses=1]
br label %bb8.outer.backedge
bb8.outer.backedge: ; preds = %bb8.outer.loopexit, %bb7
- %.lcssa2 = phi i8* [ %.lcssa1, %bb7 ], [ %.lcssa, %bb8.outer.loopexit ] ; <i8*> [#uses=1]
+ %.lcssa2 = phi ptr [ %.lcssa1, %bb7 ], [ %.lcssa, %bb8.outer.loopexit ] ; <ptr> [#uses=1]
%ineq.0.ph.be = phi i32 [ 0, %bb7 ], [ 1, %bb8.outer.loopexit ] ; <i32> [#uses=1]
br label %bb8.outer
bb8.outer.loopexit: ; preds = %bb3
- %.lcssa = phi i8* [ %3, %bb3 ] ; <i8*> [#uses=1]
+ %.lcssa = phi ptr [ %3, %bb3 ] ; <ptr> [#uses=1]
br label %bb8.outer.backedge
bb8.outer: ; preds = %bb8.outer.backedge, %entry
%ineq.0.ph = phi i32 [ 0, %entry ], [ %ineq.0.ph.be, %bb8.outer.backedge ] ; <i32> [#uses=3]
- %p_addr.0.ph = phi i8* [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <i8*> [#uses=1]
+ %p_addr.0.ph = phi ptr [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <ptr> [#uses=1]
%6 = icmp eq i32 %ineq.0.ph, 1 ; <i1> [#uses=1]
br label %bb8
bb8: ; preds = %bb8.outer, %bb8.backedge
- %p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3]
- %7 = load i8, i8* %p_addr.0, align 1 ; <i8> [#uses=2]
+ %p_addr.0 = phi ptr [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <ptr> [#uses=3]
+ %7 = load i8, ptr %p_addr.0, align 1 ; <i8> [#uses=2]
%8 = sext i8 %7 to i32 ; <i32> [#uses=2]
%9 = icmp eq i8 %7, 0 ; <i1> [#uses=1]
br i1 %9, label %bb10, label %bb
br label %while.cond.i
while.cond.i: ; preds = %while.cond.i.backedge, %entry
- %call.i25 = call i8* @pci_get_device() nounwind noredzone ; <i8*> [#uses=2]
+ %call.i25 = call ptr @pci_get_device() nounwind noredzone ; <ptr> [#uses=2]
br i1 undef, label %if.then65, label %while.body.i
while.body.i: ; preds = %while.cond.i
]
if.then42.i.i: ; preds = %if.then31.i.i, %if.then31.i.i
- %call.i25.lcssa48 = phi i8* [ %call.i25, %if.then31.i.i ], [ %call.i25, %if.then31.i.i ] ; <i8*> [#uses=0]
+ %call.i25.lcssa48 = phi ptr [ %call.i25, %if.then31.i.i ], [ %call.i25, %if.then31.i.i ] ; <ptr> [#uses=0]
unreachable
if.then65: ; preds = %while.cond.i
unreachable
}
-declare i8* @pci_get_device() noredzone
+declare ptr @pci_get_device() noredzone
declare void @some_func() noreturn
-define i32 @test1(i32* %var, i1 %cond1, i1 %cond2) {
+define i32 @test1(ptr %var, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test1(
entry:
br label %loop_begin
br i1 %cond1, label %continue, label %loop_exit ; first trivial condition
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%maybe_cond = select i1 %cond1, i1 %cond2, i1 %var_cond
br i1 %maybe_cond, label %do_something, label %loop_exit ; second trivial condition
}
; Check that loop unswitch looks through a combination of or and select instructions.
-define i32 @test_partial_condition_unswitch_or_select(i32* %var, i1 %cond1, i1 %cond2, i1 %cond3, i1 %cond4, i1 %cond5, i1 %cond6) {
+define i32 @test_partial_condition_unswitch_or_select(ptr %var, i1 %cond1, i1 %cond2, i1 %cond3, i1 %cond4, i1 %cond5, i1 %cond6) {
; CHECK-LABEL: @test_partial_condition_unswitch_or_select(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND4_FR:%.*]] = freeze i1 [[COND4:%.*]]
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, i32* [[VAR:%.*]], align 4
+; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, ptr [[VAR:%.*]], align 4
; CHECK-NEXT: [[VAR_COND:%.*]] = trunc i32 [[VAR_VAL]] to i1
; CHECK-NEXT: [[COND_OR1:%.*]] = or i1 [[VAR_COND]], false
; CHECK-NEXT: [[COND_OR2:%.*]] = or i1 false, false
br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_or1 = or i1 %var_cond, %cond1
%cond_or2 = or i1 %cond2, %cond3
; Same as test_partial_condition_unswitch_or_select, but with arguments marked
; as noundef.
-define i32 @test_partial_condition_unswitch_or_select_noundef(i32* noundef %var, i1 noundef %cond1, i1 noundef %cond2, i1 noundef %cond3, i1 noundef %cond4, i1 noundef %cond5, i1 noundef %cond6) {
+define i32 @test_partial_condition_unswitch_or_select_noundef(ptr noundef %var, i1 noundef %cond1, i1 noundef %cond2, i1 noundef %cond3, i1 noundef %cond4, i1 noundef %cond5, i1 noundef %cond6) {
; CHECK-LABEL: @test_partial_condition_unswitch_or_select_noundef(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[COND4:%.*]], [[COND2:%.*]]
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, i32* [[VAR:%.*]], align 4
+; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, ptr [[VAR:%.*]], align 4
; CHECK-NEXT: [[VAR_COND:%.*]] = trunc i32 [[VAR_VAL]] to i1
; CHECK-NEXT: [[COND_OR1:%.*]] = or i1 [[VAR_COND]], false
; CHECK-NEXT: [[COND_OR2:%.*]] = or i1 false, false
br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_or1 = or i1 %var_cond, %cond1
%cond_or2 = or i1 %cond2, %cond3
declare void @some_func()
; Test for a trivially unswitchable switch with non-default case exiting.
-define i32 @test2(i32* %var, i32 %cond1, i32 %cond2) {
+define i32 @test2(ptr %var, i32 %cond1, i32 %cond2) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[COND2:%.*]], label [[ENTRY_SPLIT:%.*]] [
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, i32* [[VAR:%.*]]
+; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, ptr [[VAR:%.*]]
; CHECK-NEXT: switch i32 [[COND2]], label [[LOOP2:%.*]] [
; CHECK-NEXT: i32 0, label [[LOOP0:%.*]]
; CHECK-NEXT: i32 1, label [[LOOP1:%.*]]
br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond2, label %loop2 [
i32 0, label %loop0
i32 1, label %loop1
}
; Test for a trivially unswitchable switch with only the default case exiting.
-define i32 @test3(i32* %var, i32 %cond1, i32 %cond2) {
+define i32 @test3(ptr %var, i32 %cond1, i32 %cond2) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[COND2:%.*]], label [[LOOP_EXIT2:%.*]] [
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, i32* [[VAR:%.*]]
+; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, ptr [[VAR:%.*]]
; CHECK-NEXT: switch i32 [[COND2]], label [[LOOP2:%.*]] [
; CHECK-NEXT: i32 0, label [[LOOP0:%.*]]
; CHECK-NEXT: i32 1, label [[LOOP1:%.*]]
br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond2, label %loop_exit2 [
i32 0, label %loop0
i32 1, label %loop1
; Test for a trivially unswitchable switch with multiple exiting cases and
; multiple looping cases.
-define i32 @test4(i32* %var, i32 %cond1, i32 %cond2) {
+define i32 @test4(ptr %var, i32 %cond1, i32 %cond2) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[COND2:%.*]], label [[LOOP_EXIT2:%.*]] [
; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_BEGIN:%.*]]
; CHECK: loop_begin:
-; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, i32* [[VAR:%.*]]
+; CHECK-NEXT: [[VAR_VAL:%.*]] = load i32, ptr [[VAR:%.*]]
; CHECK-NEXT: switch i32 [[COND2]], label [[LOOP2:%.*]] [
; CHECK-NEXT: i32 0, label [[LOOP0:%.*]]
; CHECK-NEXT: i32 1, label [[LOOP1:%.*]]
br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond2, label %loop_exit2 [
i32 0, label %loop0
i32 1, label %loop1
; This test contains two trivial unswitch condition in one loop.
; LoopUnswitch pass should be able to unswitch the second one
; after unswitching the first one.
-define i32 @test1(i32* %var, i1 %cond1, i1 %cond2) {
+define i32 @test1(ptr %var, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test1(
entry:
br label %loop_begin
; CHECK-NEXT: br label %continue
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
br i1 %cond2, label %do_something, label %loop_exit ; second trivial condition
; CHECK: continue:
; CHECK-NEXT: load
}
; Test for two trivially unswitchable switches.
-define i32 @test3(i32* %var, i32 %cond1, i32 %cond2) {
+define i32 @test3(ptr %var, i32 %cond1, i32 %cond2) {
; CHECK-LABEL: @test3(
entry:
br label %loop_begin
; CHECK-NEXT: br label %continue
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond2, label %loop_exit2 [
i32 0, label %do_something
i32 42, label %loop_exit2
; Test for a trivially unswitchable switch with multiple exiting cases and
; multiple looping cases.
-define i32 @test4(i32* %var, i32 %cond1, i32 %cond2) {
+define i32 @test4(ptr %var, i32 %cond1, i32 %cond2) {
; CHECK-LABEL: @test4(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond2, label %loop_exit2 [
i32 0, label %loop0
i32 1, label %loop1
; This test contains a trivially unswitchable branch with a real phi node in LCSSA
; position in a shared exit block where a different path through the loop
; produces a non-invariant input to the PHI node.
-define i32 @test6(i32* %var, i1 %cond1, i1 %cond2, i32 %x, i32 %y) {
+define i32 @test6(ptr %var, i1 %cond1, i1 %cond2, i32 %x, i32 %y) {
; CHECK-LABEL: @test6(
entry:
br label %loop_begin
; CHECK-NEXT: br label %continue
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
br i1 %cond2, label %latch, label %loop_exit
; CHECK: continue:
; CHECK-NEXT: load
; This test contains a trivially unswitchable switch with a real phi node in
; LCSSA position in a shared exit block where a different path through the loop
; produces a non-invariant input to the PHI node.
-define i32 @test8(i32* %var, i32 %cond1, i32 %cond2, i32 %x, i32 %y) {
+define i32 @test8(ptr %var, i32 %cond1, i32 %cond2, i32 %x, i32 %y) {
; CHECK-LABEL: @test8(
entry:
br label %loop_begin
; CHECK-NEXT: br label %continue
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond2, label %latch [
i32 0, label %loop_exit
]
; This test, extracted from the LLVM test suite, has an interesting dominator
; tree to update as there are edges to sibling domtree nodes within child
; domtree nodes of the unswitched node.
-define void @xgets(i1 %cond1, i1* %cond2.ptr) {
+define void @xgets(i1 %cond1, ptr %cond2.ptr) {
; CHECK-LABEL: @xgets(
entry:
br label %for.cond.preheader
; CHECK-NEXT: br label %if.then20
if.then20:
- %cond2 = load volatile i1, i1* %cond2.ptr
+ %cond2 = load volatile i1, ptr %cond2.ptr
br i1 %cond2, label %if.then23, label %if.else
; CHECK: if.then20:
-; CHECK-NEXT: %[[COND2:.*]] = load volatile i1, i1* %cond2.ptr
+; CHECK-NEXT: %[[COND2:.*]] = load volatile i1, ptr %cond2.ptr
; CHECK-NEXT: br i1 %[[COND2]], label %if.then23, label %if.else
if.else:
; CHECK-NEXT: ret void
}
-define i32 @test_partial_condition_unswitch_and(i32* %var, i1 %cond1, i1 %cond2) {
+define i32 @test_partial_condition_unswitch_and(ptr %var, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test_partial_condition_unswitch_and(
entry:
br label %loop_begin
; CHECK-NEXT: br label %continue
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_and = and i1 %var_cond, %cond2
br i1 %cond_and, label %do_something, label %loop_exit
; CHECK-NEXT: ret
}
-define i32 @test_partial_condition_unswitch_and_select(i32* %var, i1 %cond1, i1 %cond2) {
+define i32 @test_partial_condition_unswitch_and_select(ptr %var, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test_partial_condition_unswitch_and_select(
entry:
br label %loop_begin
; CHECK-NEXT: br label %continue
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_and = select i1 %var_cond, i1 %cond2, i1 false
br i1 %cond_and, label %do_something, label %loop_exit
; CHECK-NEXT: ret
}
-define i32 @test_partial_condition_unswitch_or_simple_select(i32* %var, i1 %cond1, i1 %cond2) {
+define i32 @test_partial_condition_unswitch_or_simple_select(ptr %var, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: @test_partial_condition_unswitch_or_simple_select(
entry:
br label %loop_begin
; CHECK-NEXT: br label %continue
continue:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_or = select i1 %var_cond, i1 true, i1 %cond2
br i1 %cond_or, label %loop_exit, label %do_something
; CHECK-NEXT: ret
}
-define i32 @test_partial_condition_unswitch_or(i32* %var, i1 %cond1, i1 %cond2, i1 %cond3, i1 %cond4, i1 %cond5, i1 %cond6) {
+define i32 @test_partial_condition_unswitch_or(ptr %var, i1 %cond1, i1 %cond2, i1 %cond3, i1 %cond4, i1 %cond5, i1 %cond6) {
; CHECK-LABEL: @test_partial_condition_unswitch_or(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_or1 = or i1 %var_cond, %cond1
%cond_or2 = or i1 %cond2, %cond3
; CHECK-NEXT: ret
}
-define i32 @test_partial_condition_unswitch_with_lcssa_phi1(i32* %var, i1 %cond, i32 %x) {
+define i32 @test_partial_condition_unswitch_with_lcssa_phi1(ptr %var, i1 %cond, i32 %x) {
; CHECK-LABEL: @test_partial_condition_unswitch_with_lcssa_phi1(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_and = and i1 %var_cond, %cond
br i1 %cond_and, label %do_something, label %loop_exit
; CHECK-NEXT: ret i32 %[[LCSSA_SPLIT]]
}
-define i32 @test_partial_condition_unswitch_with_lcssa_phi2(i32* %var, i1 %cond, i32 %x, i32 %y) {
+define i32 @test_partial_condition_unswitch_with_lcssa_phi2(ptr %var, i1 %cond, i32 %x, i32 %y) {
; CHECK-LABEL: @test_partial_condition_unswitch_with_lcssa_phi2(
entry:
br label %loop_begin
; CHECK-NEXT: br label %loop_begin
loop_begin:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
%var_cond = trunc i32 %var_val to i1
%cond_and = and i1 %var_cond, %cond
br i1 %cond_and, label %do_something, label %loop_exit
; A < B < C
; into
; A < (B, C)
-define void @hoist_inner_loop1(i32* %ptr) {
+define void @hoist_inner_loop1(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop1(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: br i1 %v1, label %b.latch, label %[[B_HEADER_SPLIT:.*]]
;
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %a.exit.c
; CHECK: c.latch:
-; CHECK-NEXT: store i32 %x.a, i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %x.a, ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %c.header, label %a.exit.c
; A < B < C
; into
; (A < B), C
-define void @hoist_inner_loop2(i32* %ptr) {
+define void @hoist_inner_loop2(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop2(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: br i1 %v1, label %b.latch, label %[[B_HEADER_SPLIT:.*]]
;
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %exit
; CHECK: c.latch:
-; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %[[X_A_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %c.header, label %exit
; A < B < C < D
; into
; (A < B), (C < D)
-define void @hoist_inner_loop3(i32* %ptr) {
+define void @hoist_inner_loop3(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop3(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: br i1 %v1, label %b.latch, label %[[B_HEADER_SPLIT:.*]]
;
; CHECK-NEXT: br label %c.body
c.body:
- %x.c = load i32, i32* %ptr
+ %x.c = load i32, ptr %ptr
br label %d.header
; CHECK: c.body:
-; CHECK-NEXT: %x.c = load i32, i32* %ptr
+; CHECK-NEXT: %x.c = load i32, ptr %ptr
; CHECK-NEXT: br label %d.header
d.header:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
- store i32 %x.c, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
+ store i32 %x.c, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %d.header, label %c.latch
; CHECK: d.header:
-; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %x.c, i32* %ptr
+; CHECK-NEXT: store i32 %[[X_A_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %x.c, ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %d.header, label %c.latch
; A < B < C < D
; into
; A < ((B < C), D)
-define void @hoist_inner_loop5(i32* %ptr) {
+define void @hoist_inner_loop5(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop5(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: br label %c.header
c.header:
- %x.c = load i32, i32* %ptr
+ %x.c = load i32, ptr %ptr
%v1 = call i1 @cond()
br label %d.header
; CHECK: c.header:
-; CHECK-NEXT: %x.c = load i32, i32* %ptr
+; CHECK-NEXT: %x.c = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i1 @cond()
; CHECK-NEXT: br i1 %v1, label %c.latch, label %[[C_HEADER_SPLIT:.*]]
;
d.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
- store i32 %x.c, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
+ store i32 %x.c, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %d.header, label %a.latch
; CHECK: d.latch:
-; CHECK-NEXT: store i32 %x.a, i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_C_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %x.a, ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_C_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %d.header, label %a.latch
; A < B < C
; into
; (A < B), C
-define void @hoist_inner_loop_switch(i32* %ptr) {
+define void @hoist_inner_loop_switch(ptr %ptr) {
; CHECK-LABEL: define void @hoist_inner_loop_switch(
entry:
br label %a.header
; CHECK-NEXT: br label %a.header
a.header:
- %x.a = load i32, i32* %ptr
+ %x.a = load i32, ptr %ptr
br label %b.header
; CHECK: a.header:
-; CHECK-NEXT: %x.a = load i32, i32* %ptr
+; CHECK-NEXT: %x.a = load i32, ptr %ptr
; CHECK-NEXT: br label %b.header
b.header:
- %x.b = load i32, i32* %ptr
+ %x.b = load i32, ptr %ptr
%v1 = call i32 @cond.i32()
br label %c.header
; CHECK: b.header:
-; CHECK-NEXT: %x.b = load i32, i32* %ptr
+; CHECK-NEXT: %x.b = load i32, ptr %ptr
; CHECK-NEXT: %v1 = call i32 @cond.i32()
; CHECK-NEXT: switch i32 %v1, label %[[B_HEADER_SPLIT:.*]] [
; CHECK-NEXT: i32 1, label %b.latch
c.latch:
; Use values from other loops to check LCSSA form.
- store i32 %x.a, i32* %ptr
- store i32 %x.b, i32* %ptr
+ store i32 %x.a, ptr %ptr
+ store i32 %x.b, ptr %ptr
%v2 = call i1 @cond()
br i1 %v2, label %c.header, label %exit
; CHECK: c.latch:
-; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr
-; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr
+; CHECK-NEXT: store i32 %[[X_A_LCSSA]], ptr %ptr
+; CHECK-NEXT: store i32 %[[X_B_LCSSA]], ptr %ptr
; CHECK-NEXT: %v2 = call i1 @cond()
; CHECK-NEXT: br i1 %v2, label %c.header, label %exit
; CHECK-NEXT: ret void
}
-define void @test_unswitch_to_common_succ_with_phis(i32* %var, i32 %cond) {
+define void @test_unswitch_to_common_succ_with_phis(ptr %var, i32 %cond) {
; CHECK-LABEL: @test_unswitch_to_common_succ_with_phis(
entry:
br label %header
; CHECK-NEXT: br label %header
header:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond, label %loopexit1 [
i32 0, label %latch
i32 1, label %latch
; CHECK-NEXT: ret
}
-define void @test_unswitch_to_default_common_succ_with_phis(i32* %var, i32 %cond) {
+define void @test_unswitch_to_default_common_succ_with_phis(ptr %var, i32 %cond) {
; CHECK-LABEL: @test_unswitch_to_default_common_succ_with_phis(
entry:
br label %header
; CHECK-NEXT: br label %header
header:
- %var_val = load i32, i32* %var
+ %var_val = load i32, ptr %var
switch i32 %cond, label %latch [
i32 0, label %latch
i32 1, label %latch