ASoC: rl6231: avoid using divisible by 3 for DMIC clk

Few codecs will meet no DMIC clock output issue when select a divided
number which is divisible by 3. To prevent this issue, the patch ignore
the numbers when calculating the DMIC clock divider.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/rl6231.c b/sound/soc/codecs/rl6231.c
index aca479f..18b4292 100644 (file)
--- a/sound/soc/codecs/rl6231.c
+++ b/sound/soc/codecs/rl6231.c
@@ -80,6 +80,8 @@ int rl6231_calc_dmic_clk(int rate)
        }
 
        for (i = 0; i < ARRAY_SIZE(div); i++) {
+               if ((div[i] % 3) == 0)
+                       continue;
                /* find divider that gives DMIC frequency below 3MHz */
                if (3000000 * div[i] >= rate)
                        return i;