dm: powerpc: P2041RDB: add i2c DM support
authorBiwen Li <biwen.li@nxp.com>
Fri, 1 May 2020 12:04:05 +0000 (20:04 +0800)
committerPriyanka Jain <priyanka.jain@nxp.com>
Mon, 4 May 2020 03:42:36 +0000 (09:12 +0530)
This supports i2c DM for board P2041RDB

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/powerpc/dts/p2041.dtsi
include/configs/P2041RDB.h

index 0f5e7db..95931e2 100644 (file)
@@ -3,7 +3,7 @@
  * P2041 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2011 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -86,6 +86,9 @@
                        reg = <0x114000 0x1000>;
                        clock-frequency = <0>;
                };
+
+               /include/ "qoriq-i2c-0.dtsi"
+               /include/ "qoriq-i2c-1.dtsi"
        };
 
        pcie@ffe200000 {
index 0dcba7d..dfc8458 100644 (file)
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -267,14 +268,20 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
 #define CONFIG_SYS_FSL_I2C2_SPEED      400000
 #define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET     0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER  0
+#endif
+#define CONFIG_SYS_I2C_FSL
+
 
 /*
  * RapidIO