media: ti-vpe: cal: rename CAL_HL_IRQ_MASK
authorTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Mon, 14 Jun 2021 11:23:22 +0000 (13:23 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 12 Jul 2021 10:49:11 +0000 (12:49 +0200)
CAL_HL_IRQ_MASK macro is used for both WDMA start and end status bits.
For clarity, rename CAL_HL_IRQ_MASK macro to CAL_HL_IRQ_WDMA_END_MASK
and CAL_HL_IRQ_WDMA_START_MASK.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/platform/ti-vpe/cal.c
drivers/media/platform/ti-vpe/cal_regs.h

index 21584ff7062f721c0ccf591aba9e29829134cc0b..673952b3e3826d229cd99dd9a427c4440db4b0ca 100644 (file)
@@ -452,9 +452,9 @@ void cal_ctx_start(struct cal_ctx *ctx)
 
        /* Enable IRQ_WDMA_END and IRQ_WDMA_START. */
        cal_write(ctx->cal, CAL_HL_IRQENABLE_SET(1),
-                 CAL_HL_IRQ_MASK(ctx->dma_ctx));
+                 CAL_HL_IRQ_WDMA_END_MASK(ctx->dma_ctx));
        cal_write(ctx->cal, CAL_HL_IRQENABLE_SET(2),
-                 CAL_HL_IRQ_MASK(ctx->dma_ctx));
+                 CAL_HL_IRQ_WDMA_START_MASK(ctx->dma_ctx));
 }
 
 void cal_ctx_stop(struct cal_ctx *ctx)
@@ -478,9 +478,9 @@ void cal_ctx_stop(struct cal_ctx *ctx)
 
        /* Disable IRQ_WDMA_END and IRQ_WDMA_START. */
        cal_write(ctx->cal, CAL_HL_IRQENABLE_CLR(1),
-                 CAL_HL_IRQ_MASK(ctx->dma_ctx));
+                 CAL_HL_IRQ_WDMA_END_MASK(ctx->dma_ctx));
        cal_write(ctx->cal, CAL_HL_IRQENABLE_CLR(2),
-                 CAL_HL_IRQ_MASK(ctx->dma_ctx));
+                 CAL_HL_IRQ_WDMA_START_MASK(ctx->dma_ctx));
 
        ctx->dma.state = CAL_DMA_STOPPED;
 }
@@ -588,7 +588,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
                cal_write(cal, CAL_HL_IRQSTATUS(1), status);
 
                for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) {
-                       if (status & CAL_HL_IRQ_MASK(i))
+                       if (status & CAL_HL_IRQ_WDMA_END_MASK(i))
                                cal_irq_wdma_end(cal->ctx[i]);
                }
        }
@@ -602,7 +602,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
                cal_write(cal, CAL_HL_IRQSTATUS(2), status);
 
                for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) {
-                       if (status & CAL_HL_IRQ_MASK(i))
+                       if (status & CAL_HL_IRQ_WDMA_START_MASK(i))
                                cal_irq_wdma_start(cal->ctx[i]);
                }
        }
index bf937919a1e96fbd63fe9c48572a52c4acf811cb..94cb4f329cf31cb0df34ff13e81da55d9d565c02 100644 (file)
 #define CAL_HL_IRQ_EOI_LINE_NUMBER_READ0               0
 #define CAL_HL_IRQ_EOI_LINE_NUMBER_EOI0                        0
 
-#define CAL_HL_IRQ_MASK(m)                     BIT(m)
+#define CAL_HL_IRQ_WDMA_END_MASK(m)            BIT(m)
+#define CAL_HL_IRQ_WDMA_START_MASK(m)          BIT(m)
 
 #define CAL_HL_IRQ_OCPO_ERR_MASK               BIT(6)