vc4/hdmi: Update MAI_THR for D0

2712D0 has increased the fifo sizes of MAI_THR blocks,
resulting in adjusted bit offsets. Handle that.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 1505f06..b56d736 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -2597,7 +2597,13 @@ static int vc4_hdmi_audio_prepare(struct device *dev, void *data,
                                             VC4_HDMI_AUDIO_PACKET_CEA_MASK);
 
        /* Set the MAI threshold */
-       if (vc4->gen >= VC4_GEN_5)
+       if (vc4->gen >= VC4_GEN_5 && vc4->step_d0)
+               HDMI_WRITE(HDMI_MAI_THR,
+                       VC4_SET_FIELD(0x10, VC4_D0_HD_MAI_THR_PANICHIGH) |
+                       VC4_SET_FIELD(0x10, VC4_D0_HD_MAI_THR_PANICLOW) |
+                       VC4_SET_FIELD(0x1c, VC4_D0_HD_MAI_THR_DREQHIGH) |
+                       VC4_SET_FIELD(0x1c, VC4_D0_HD_MAI_THR_DREQLOW));
+       else if (vc4->gen >= VC4_GEN_5)
                HDMI_WRITE(HDMI_MAI_THR,
                        VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
                        VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |

diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index 2f7b6da..7b22841 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -1039,6 +1039,15 @@ enum {
 # define VC4_HD_MAI_THR_DREQLOW_MASK           VC4_MASK(5, 0)
 # define VC4_HD_MAI_THR_DREQLOW_SHIFT          0
 
+# define VC4_D0_HD_MAI_THR_PANICHIGH_MASK              VC4_MASK(29, 23)
+# define VC4_D0_HD_MAI_THR_PANICHIGH_SHIFT             23
+# define VC4_D0_HD_MAI_THR_PANICLOW_MASK               VC4_MASK(21, 15)
+# define VC4_D0_HD_MAI_THR_PANICLOW_SHIFT              15
+# define VC4_D0_HD_MAI_THR_DREQHIGH_MASK               VC4_MASK(13, 7)
+# define VC4_D0_HD_MAI_THR_DREQHIGH_SHIFT              7
+# define VC4_D0_HD_MAI_THR_DREQLOW_MASK                VC4_MASK(6, 0)
+# define VC4_D0_HD_MAI_THR_DREQLOW_SHIFT               0
+
 /* Divider from HDMI HSM clock to MAI serial clock.  Sampling period
  * converges to N / (M + 1) cycles.
  */