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i965: bump up BRW_EU_MAX_INSN
author
Brian Paul
<brianp@vmware.com>
Fri, 6 Mar 2009 22:39:14 +0000
(15:39 -0700)
committer
Brian Paul
<brianp@vmware.com>
Fri, 6 Mar 2009 23:21:20 +0000
(16:21 -0700)
This is the size of the intermediate instruction buffer.
src/mesa/drivers/dri/i965/brw_eu.h
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diff --git
a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index
b36a197
..
b15e840
100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_eu.h
+++ b/
src/mesa/drivers/dri/i965/brw_eu.h
@@
-97,7
+97,7
@@
struct brw_glsl_call;
#define BRW_EU_MAX_INSN_STACK 5
-#define BRW_EU_MAX_INSN
12
00
+#define BRW_EU_MAX_INSN
40
00
struct brw_compile {
struct brw_instruction store[BRW_EU_MAX_INSN];