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arm64: dts: rockchip: reorder rk3399 hdmi clocks
author
Sascha Hauer
<s.hauer@pengutronix.de>
Wed, 26 Jan 2022 14:55:40 +0000
(15:55 +0100)
committer
Heiko Stuebner
<heiko@sntech.de>
Tue, 8 Feb 2022 12:21:09 +0000
(13:21 +0100)
The binding specifies the clock order to "cec", "grf", "vpll". Reorder
the clocks accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link:
https://lore.kernel.org/r/20220126145549.617165-19-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3399.dtsi
patch
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diff --git
a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d3cdf6f42a30367d7255cd6ce7907b551a081f70..080457a68e3c70e99a8fc517e3a24290463ba6dc 100644
(file)
--- a/
arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/
arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@
-1881,10
+1881,10
@@
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_HDMI_CTRL>,
<&cru SCLK_HDMI_SFR>,
- <&cru
PLL_VPLL
>,
+ <&cru
SCLK_HDMI_CEC
>,
<&cru PCLK_VIO_GRF>,
- <&cru
SCLK_HDMI_CEC
>;
- clock-names = "iahb", "isfr", "
vpll", "grf", "cec
";
+ <&cru
PLL_VPLL
>;
+ clock-names = "iahb", "isfr", "
cec", "grf", "vpll
";
power-domains = <&power RK3399_PD_HDCP>;
reg-io-width = <4>;
rockchip,grf = <&grf>;