octeontx2-af: Fix mapping for NIX block from CGX connection

Firmware configures NIX block mapping for all MAC blocks.
The current implementation reads the configuration and
creates the mapping between RVU PF  and NIX blocks. But
this configuration is only valid for silicons that support
multiple blocks. For all other silicons, all MAC blocks
map to NIX0.

This patch corrects the mapping by adding a check for the same.

Fixes: c5a73b632b90 ("octeontx2-af: Map NIX block from CGX connection")
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index b5a7ee63508c6a50e616256eff237b337a74c4ad..d4b8d4546de2e702478dfb34fede10f7cc6fbf65 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -23,6 +23,7 @@
 #define        PCI_DEVID_OCTEONTX2_LBK                 0xA061
 
 /* Subsystem Device ID */
+#define PCI_SUBSYS_DEVID_98XX                  0xB100
 #define PCI_SUBSYS_DEVID_96XX                  0xB200
 #define PCI_SUBSYS_DEVID_CN10K_A              0xB900
 #define PCI_SUBSYS_DEVID_CNF10K_B              0xBC00
@@ -686,6 +687,16 @@ static inline u16 rvu_nix_chan_cpt(struct rvu *rvu, u8 chan)
        return rvu->hw->cpt_chan_base + chan;
 }
 
+static inline bool is_rvu_supports_nix1(struct rvu *rvu)
+{
+       struct pci_dev *pdev = rvu->pdev;
+
+       if (pdev->subsystem_device == PCI_SUBSYS_DEVID_98XX)
+               return true;
+
+       return false;
+}
+
 /* Function Prototypes
  * RVU
  */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index 83b342fa8d753cd880ffd6a29bf8e82d1775b9ba..48611e60322841b8ee92a96b452d771b78c74ba3 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -114,7 +114,7 @@ static void rvu_map_cgx_nix_block(struct rvu *rvu, int pf,
        p2x = cgx_lmac_get_p2x(cgx_id, lmac_id);
        /* Firmware sets P2X_SELECT as either NIX0 or NIX1 */
        pfvf->nix_blkaddr = BLKADDR_NIX0;
-       if (p2x == CMR_P2X_SEL_NIX1)
+       if (is_rvu_supports_nix1(rvu) && p2x == CMR_P2X_SEL_NIX1)
                pfvf->nix_blkaddr = BLKADDR_NIX1;
 }