mt76: run MAC work every 100ms
authorFelix Fietkau <nbd@nbd.name>
Sun, 3 Feb 2019 13:13:06 +0000 (14:13 +0100)
committerFelix Fietkau <nbd@nbd.name>
Mon, 18 Feb 2019 18:54:33 +0000 (19:54 +0100)
ED/CCA Tx blocking checks need to be run every 100 ms in order to avoid
triggering too late and keeping tx blocking on for too long

Signed-off-by: Felix Fietkau <nbd@nbd.name>
drivers/net/wireless/mediatek/mt76/mt76x0/pci.c
drivers/net/wireless/mediatek/mt76/mt76x0/usb.c
drivers/net/wireless/mediatek/mt76/mt76x02.h
drivers/net/wireless/mediatek/mt76/mt76x02_mac.c
drivers/net/wireless/mediatek/mt76/mt76x2/pci_main.c
drivers/net/wireless/mediatek/mt76/mt76x2/usb_main.c

index 1472c86..6992b3d 100644 (file)
@@ -30,7 +30,7 @@ static int mt76x0e_start(struct ieee80211_hw *hw)
        mt76x02_mac_start(dev);
        mt76x0_phy_calibrate(dev, true);
        ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work,
-                                    MT_CALIBRATE_INTERVAL);
+                                    MT_MAC_WORK_INTERVAL);
        ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work,
                                     MT_CALIBRATE_INTERVAL);
        set_bit(MT76_STATE_RUNNING, &dev->mt76.state);
index 3987ada..91d8afd 100644 (file)
@@ -118,7 +118,7 @@ static int mt76x0u_start(struct ieee80211_hw *hw)
 
        mt76x0_phy_calibrate(dev, true);
        ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work,
-                                    MT_CALIBRATE_INTERVAL);
+                                    MT_MAC_WORK_INTERVAL);
        ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work,
                                     MT_CALIBRATE_INTERVAL);
        set_bit(MT76_STATE_RUNNING, &dev->mt76.state);
index 6d9d9dd..7e40529 100644 (file)
@@ -27,6 +27,7 @@
 #include "mt76x02_dma.h"
 
 #define MT_CALIBRATE_INTERVAL  HZ
+#define MT_MAC_WORK_INTERVAL   (HZ / 10)
 
 #define MT_WATCHDOG_TIME       (HZ / 10)
 #define MT_TX_HANG_TH          10
index 636e69a..89c7368 100644 (file)
@@ -929,7 +929,7 @@ static void mt76x02_edcca_check(struct mt76x02_dev *dev)
        u32 val, busy;
 
        val = mt76_rr(dev, MT_ED_CCA_TIMER);
-       busy = (val * 100) / jiffies_to_usecs(MT_CALIBRATE_INTERVAL);
+       busy = (val * 100) / jiffies_to_usecs(MT_MAC_WORK_INTERVAL);
        busy = min_t(u32, busy, 100);
 
        if (busy > MT_EDCCA_TH) {
@@ -975,7 +975,7 @@ void mt76x02_mac_work(struct work_struct *work)
        mt76_tx_status_check(&dev->mt76, NULL, false);
 
        ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mac_work,
-                                    MT_CALIBRATE_INTERVAL);
+                                    MT_MAC_WORK_INTERVAL);
 }
 
 void mt76x02_mac_set_bssid(struct mt76x02_dev *dev, u8 idx, const u8 *addr)
index 06a26a1..878ce92 100644 (file)
@@ -33,7 +33,7 @@ mt76x2_start(struct ieee80211_hw *hw)
                goto out;
 
        ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mac_work,
-                                    MT_CALIBRATE_INTERVAL);
+                                    MT_MAC_WORK_INTERVAL);
        ieee80211_queue_delayed_work(mt76_hw(dev), &dev->wdt_work,
                                     MT_WATCHDOG_TIME);
 
index 5256c6f..10633b8 100644 (file)
@@ -28,7 +28,7 @@ static int mt76x2u_start(struct ieee80211_hw *hw)
                goto out;
 
        ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mac_work,
-                                    MT_CALIBRATE_INTERVAL);
+                                    MT_MAC_WORK_INTERVAL);
        set_bit(MT76_STATE_RUNNING, &dev->mt76.state);
 
 out: