spi: Add clock, reset and pinctrl

driver:spi: Add reset handle.
dts:starfive:dtsi: Add clock and reset node.
dts:starfive:pinctrl: Modify spi gpio and Add pinctrl.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index f6aabc2..4c8766f 100755 (executable)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -1029,8 +1029,10 @@
                spi0: spi0@10060000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x0 0x10060000 0x0 0x10000>;
-                       clocks = <&ahb1clk>;
+                       clocks = <&clkgen JH7110_SPI0_CLK_APB>;
                        clock-names = "apb_pclk";
+                       resets = <&rstgen RSTN_U0_SSP_SPI_APB>;
+                       reset-names = "rst_apb";
                        interrupts = <38>;
                        dmas = <&dma 14 1>, <&dma 15 1>;
                        dma-names = "rx","tx";

diff --git a/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi b/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
old mode 100644 (file)
new mode 100755 (executable)
index 4f94b25..328560d
--- a/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
@@ -259,32 +259,32 @@
 
        ssp0_pins: ssp0-pins {
                ssp0-pins_tx {
-                       sf,pins = <PAD_GPIO57>;
-                       sf,pinmux = <PAD_GPIO57_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO36>;
+                       sf,pinmux = <PAD_GPIO36_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI0_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp0-pins_rx {
-                       sf,pins = <PAD_GPIO58>;
-                       sf,pinmux = <PAD_GPIO58_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO35>;
+                       sf,pinmux = <PAD_GPIO35_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI0_SSPRXD>;
                };
 
                ssp0-pins_clk {
-                       sf,pins = <PAD_GPIO61>;
-                       sf,pinmux = <PAD_GPIO61_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO34>;
+                       sf,pinmux = <PAD_GPIO34_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI0_SSPCLKOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp0-pins_cs {
-                       sf,pins = <PAD_GPIO14>;
-                       sf,pinmux = <PAD_GPIO14_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO33>;
+                       sf,pinmux = <PAD_GPIO33_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI0_SSPFSSOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -766,3 +766,9 @@
        pinctrl-0 = <&dvp_pins>;
        status = "okay";        
 };
+
+&spi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&ssp0_pins>;
+       status = "okay";
+};

diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
old mode 100644 (file)
new mode 100755 (executable)
index e4484ac..5e1ee45
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -33,6 +33,7 @@
 #include <linux/pm_runtime.h>
 #include <linux/of.h>
 #include <linux/pinctrl/consumer.h>
+#include <linux/reset.h>
 
 /*
  * This macro is used to define some register default values.
@@ -370,6 +371,7 @@ struct pl022 {
        resource_size_t                 phybase;
        void __iomem                    *virtbase;
        struct clk                      *clk;
+       struct reset_control    *rst;
        struct spi_master               *master;
        struct pl022_ssp_controller     *master_info;
        /* Message per-transfer pump */
@@ -2182,6 +2184,19 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id)
                goto err_no_clk_en;
        }
 
+       pl022->rst = devm_reset_control_get_exclusive(&adev->dev, "rst_apb");
+       if (!IS_ERR(pl022->rst)) {
+               status = reset_control_deassert(pl022->rst);
+               if(status){
+                       dev_err(&adev->dev, "could not deassert SSP/SPI bus reset\n");
+                       goto err_no_rst_clr;
+               }
+       } else {
+               status = PTR_ERR(pl022->rst);
+               dev_err(&adev->dev, "could not retrieve SSP/SPI bus reset\n");
+               goto err_no_rst;
+       }
+
        /* Initialize transfer pump */
        tasklet_init(&pl022->pump_transfers, pump_transfers,
                     (unsigned long)pl022);
@@ -2241,6 +2256,9 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id)
        if (platform_info->enable_dma)
                pl022_dma_remove(pl022);
  err_no_irq:
+       reset_control_assert(pl022->rst);
+ err_no_rst_clr:
+ err_no_rst:
        clk_disable_unprepare(pl022->clk);
  err_no_clk_en:
  err_no_clk: