drm/amdgpu/gmc8: disable legacy vga features in gmc init

Needs to be done when the MC is set up.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index c9dfe15..85c937b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -35,6 +35,9 @@
 #include "oss/oss_3_0_d.h"
 #include "oss/oss_3_0_sh_mask.h"
 
+#include "dce/dce_10_0_d.h"
+#include "dce/dce_10_0_sh_mask.h"
+
 #include "vid.h"
 #include "vi.h"
 
@@ -438,6 +441,17 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
        if (gmc_v8_0_wait_for_idle((void *)adev)) {
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
        }
+       if (adev->mode_info.num_crtc) {
+               /* Lockout access through VGA aperture*/
+               tmp = RREG32(mmVGA_HDP_CONTROL);
+               tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1);
+               WREG32(mmVGA_HDP_CONTROL, tmp);
+
+               /* disable VGA render */
+               tmp = RREG32(mmVGA_RENDER_CONTROL);
+               tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
+               WREG32(mmVGA_RENDER_CONTROL, tmp);
+       }
        /* Update configuration */
        WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
               adev->mc.vram_start >> 12);