mmc: sdhci-sprd: Fix eMMC init failure after hw reset
authorWenchao Chen <wenchao.chen@unisoc.com>
Mon, 4 Dec 2023 06:49:34 +0000 (14:49 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 10 Jan 2024 16:17:01 +0000 (17:17 +0100)
commit 8abf77c88929b6d20fa4f9928b18d6448d64e293 upstream.

Some eMMC devices that do not close the auto clk gate after hw reset will
cause eMMC initialization to fail. Let's fix this.

Signed-off-by: Wenchao Chen <wenchao.chen@unisoc.com>
Fixes: ff874dbc4f86 ("mmc: sdhci-sprd: Disable CLK_AUTO when the clock is less than 400K")
Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231204064934.21236-1-wenchao.chen@unisoc.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mmc/host/sdhci-sprd.c

index 6b8a57e..bed57a1 100644 (file)
@@ -239,15 +239,19 @@ static inline void _sdhci_sprd_set_clock(struct sdhci_host *host,
        div = ((div & 0x300) >> 2) | ((div & 0xFF) << 8);
        sdhci_enable_clk(host, div);
 
+       val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);
+       mask = SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN | SDHCI_SPRD_BIT_INNR_CLK_AUTO_EN;
        /* Enable CLK_AUTO when the clock is greater than 400K. */
        if (clk > 400000) {
-               val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);
-               mask = SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN |
-                       SDHCI_SPRD_BIT_INNR_CLK_AUTO_EN;
                if (mask != (val & mask)) {
                        val |= mask;
                        sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI);
                }
+       } else {
+               if (val & mask) {
+                       val &= ~mask;
+                       sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI);
+               }
        }
 }